powerpc: MPC8548: Move CONFIG_MPC8548 to Kconfig option

Replace CONFIG_MPC8548 with ARCH_MPC8548 in Kconfig.

Signed-off-by: York Sun <york.sun@nxp.com>
master
York Sun 8 years ago
parent f33f3e07f3
commit 281ed4c74b
  1. 6
      arch/powerpc/cpu/mpc85xx/Kconfig
  2. 2
      arch/powerpc/cpu/mpc85xx/Makefile
  3. 2
      arch/powerpc/cpu/mpc85xx/cpu_init.c
  4. 2
      arch/powerpc/include/asm/config_mpc85xx.h
  5. 8
      arch/powerpc/include/asm/immap_85xx.h
  6. 2
      board/xes/common/fsl_8xxx_pci.c
  7. 1
      include/configs/MPC8548CDS.h
  8. 1
      include/configs/sbc8548.h
  9. 1
      include/configs/xpedite520x.h
  10. 1
      scripts/config_whitelist.txt

@ -10,6 +10,7 @@ choice
config TARGET_SBC8548
bool "Support sbc8548"
select ARCH_MPC8548
config TARGET_SOCRATES
bool "Support socrates"
@ -63,6 +64,7 @@ config TARGET_MPC8544DS
config TARGET_MPC8548CDS
bool "Support MPC8548CDS"
select ARCH_MPC8548
config TARGET_MPC8555CDS
bool "Support MPC8555CDS"
@ -156,6 +158,7 @@ config TARGET_KMP204X
config TARGET_XPEDITE520X
bool "Support xpedite520x"
select ARCH_MPC8548
config TARGET_XPEDITE537X
bool "Support xpedite537x"
@ -172,6 +175,9 @@ config TARGET_CYRUS
endchoice
config ARCH_MPC8548
bool
source "board/freescale/b4860qds/Kconfig"
source "board/freescale/bsc9131rdb/Kconfig"
source "board/freescale/bsc9132qds/Kconfig"

@ -68,7 +68,7 @@ obj-$(CONFIG_SYS_FSL_QORIQ_CHASSIS2) += fsl_corenet2_serdes.o
obj-$(CONFIG_PPC_C29X) += c29x_serdes.o
obj-$(CONFIG_MPC8536) += mpc8536_serdes.o
obj-$(CONFIG_MPC8544) += mpc8544_serdes.o
obj-$(CONFIG_MPC8548) += mpc8548_serdes.o
obj-$(CONFIG_ARCH_MPC8548) += mpc8548_serdes.o
obj-$(CONFIG_MPC8568) += mpc8568_serdes.o
obj-$(CONFIG_MPC8569) += mpc8569_serdes.o
obj-$(CONFIG_MPC8572) += mpc8572_serdes.o

@ -442,7 +442,7 @@ ulong cpu_init_f(void)
#if defined(CONFIG_SECURE_BOOT) && !defined(CONFIG_SYS_RAMBOOT)
struct law_entry law;
#endif
#ifdef CONFIG_MPC8548
#ifdef CONFIG_ARCH_MPC8548
ccsr_local_ecm_t *ecm = (void *)(CONFIG_SYS_MPC85xx_ECM_ADDR);
uint svr = get_svr();

@ -66,7 +66,7 @@
#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
#define CONFIG_SYS_FSL_ERRATUM_A005125
#elif defined(CONFIG_MPC8548)
#elif defined(CONFIG_ARCH_MPC8548)
#define CONFIG_MAX_CPUS 1
#define CONFIG_SYS_FSL_NUM_LAWS 10
#define CONFIG_SYS_FSL_DDRC_GEN2

@ -124,10 +124,10 @@ typedef struct ccsr_i2c {
u8 res[4096 - 1 * sizeof(struct fsl_i2c_base)];
} ccsr_i2c_t;
#if defined(CONFIG_MPC8540) \
|| defined(CONFIG_MPC8541) \
|| defined(CONFIG_MPC8548) \
|| defined(CONFIG_MPC8555)
#if defined(CONFIG_MPC8540) || \
defined(CONFIG_MPC8541) || \
defined(CONFIG_ARCH_MPC8548) || \
defined(CONFIG_MPC8555)
/* DUART Registers */
typedef struct ccsr_duart {
u8 res1[1280];

@ -55,7 +55,7 @@ void pci_init_board(void)
} else {
printf("PCI1: disabled\n");
}
#elif defined CONFIG_MPC8548
#elif defined CONFIG_ARCH_MPC8548
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
/* PCI1 not present on MPC8572 */
setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1);

@ -16,7 +16,6 @@
/* High Level Configuration Options */
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_MPC8548 1 /* MPC8548 specific */
#define CONFIG_MPC8548CDS 1 /* MPC8548CDS board specific */
#ifndef CONFIG_SYS_TEXT_BASE

@ -38,7 +38,6 @@
*/
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_MPC8548 1 /* MPC8548 specific */
#define CONFIG_SBC8548 1 /* SBC8548 board specific */
/*

@ -16,7 +16,6 @@
*/
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_MPC8548 1
#define CONFIG_XPEDITE5200 1
#define CONFIG_SYS_BOARD_NAME "XPedite5200"
#define CONFIG_SYS_FORM_PMC_XMC 1

@ -3153,7 +3153,6 @@ CONFIG_MPC8541
CONFIG_MPC8541CDS
CONFIG_MPC8544
CONFIG_MPC8544DS
CONFIG_MPC8548
CONFIG_MPC8548CDS
CONFIG_MPC855
CONFIG_MPC8555

Loading…
Cancel
Save