configs: Remove CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS in all boards

Now that xHCD does not use CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS,
remove it in all boards' config files.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
master
Bin Meng 7 years ago committed by Marek Vasut
parent 7274671e04
commit 2931342874
  1. 1
      include/configs/am43xx_evm.h
  2. 1
      include/configs/am57xx_evm.h
  3. 1
      include/configs/cl-som-am57x.h
  4. 1
      include/configs/cm_t43.h
  5. 1
      include/configs/dra7xx_evm.h
  6. 1
      include/configs/ds414.h
  7. 1
      include/configs/exynos5-common.h
  8. 1
      include/configs/ls1012afrdm.h
  9. 1
      include/configs/ls1012aqds.h
  10. 1
      include/configs/ls1012ardb.h
  11. 1
      include/configs/ls1021aiot.h
  12. 1
      include/configs/ls1021aqds.h
  13. 1
      include/configs/ls1021atwr.h
  14. 1
      include/configs/ls1043aqds.h
  15. 1
      include/configs/ls1043ardb.h
  16. 1
      include/configs/ls1046aqds.h
  17. 1
      include/configs/ls1046ardb.h
  18. 1
      include/configs/ls2080aqds.h
  19. 1
      include/configs/ls2080ardb.h
  20. 4
      include/configs/mvebu_armada-37xx.h
  21. 4
      include/configs/mvebu_armada-8k.h
  22. 2
      include/configs/rk3328_common.h
  23. 3
      include/configs/rk3399_common.h
  24. 1
      include/configs/ti_armv7_keystone2.h
  25. 3
      include/configs/uniphier.h
  26. 2
      include/configs/xilinx_zynqmp.h
  27. 1
      scripts/config_whitelist.txt

@ -82,7 +82,6 @@
#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD)
#define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1
#define CONFIG_USB_XHCI_OMAP
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_OMAP_USB_PHY
#define CONFIG_AM437X_USB2PHY2_HOST

@ -92,7 +92,6 @@
/* USB xHCI HOST */
#define CONFIG_USB_XHCI_OMAP
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_OMAP_USB_PHY
#define CONFIG_OMAP_USB3PHY1_HOST

@ -83,7 +83,6 @@
/* USB xHCI HOST */
#define CONFIG_USB_XHCI_OMAP
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_OMAP_USB_PHY
#define CONFIG_OMAP_USB3PHY1_HOST

@ -60,7 +60,6 @@
/* USB support */
#define CONFIG_USB_XHCI_OMAP
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_OMAP_USB_PHY
#define CONFIG_AM437X_USB2PHY2_HOST

@ -154,7 +154,6 @@
/* USB xHCI HOST */
#define CONFIG_USB_XHCI_OMAP
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_OMAP_USB_PHY
#define CONFIG_OMAP_USB2PHY2_HOST

@ -68,7 +68,6 @@
#if 0
#undef CONFIG_DM_USB
#define CONFIG_USB_XHCI_PCI
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
#if !defined(CONFIG_USB_XHCI_HCD)

@ -135,7 +135,6 @@
/* USB */
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX

@ -39,7 +39,6 @@
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
#define CONFIG_CMD_MEMINFO

@ -124,7 +124,6 @@
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
/* MMC */

@ -27,7 +27,6 @@
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
/*

@ -26,7 +26,6 @@
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_XHCI_DWC3
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_XHCI_USB)

@ -413,7 +413,6 @@ unsigned long get_board_ddr_clk(void);
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
/*

@ -50,7 +50,6 @@
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
#define CONFIG_SYS_CLK_FREQ 100000000

@ -377,7 +377,6 @@ unsigned long get_board_ddr_clk(void);
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
/*

@ -288,7 +288,6 @@
#ifdef CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
#endif

@ -144,7 +144,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_XHCI_DWC3
#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_CMD_USB
#define CONFIG_USB_STORAGE
#endif

@ -220,7 +220,6 @@
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_XHCI_DWC3
#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_CMD_USB
#define CONFIG_USB_STORAGE
#endif

@ -446,7 +446,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#include <asm/fsl_secure_boot.h>

@ -346,7 +346,6 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_HAS_FSL_XHCI_USB
#define CONFIG_USB_XHCI_FSL
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#undef CONFIG_CMDLINE_EDITING
#include <config_distro_defaults.h>

@ -97,10 +97,8 @@
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
/* USB 3.0 */
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 3
#define CONFIG_USB_MAX_CONTROLLER_COUNT (CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS + \
CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS)
3)
/* USB ethernet */
#define CONFIG_USB_HOST_ETHER

@ -101,10 +101,8 @@
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
/* USB 3.0 */
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 3
#define CONFIG_USB_MAX_CONTROLLER_COUNT (CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS + \
CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS)
3)
/* USB ethernet */
#define CONFIG_USB_HOST_ETHER

@ -63,6 +63,4 @@
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
/* xhci host */
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif

@ -80,7 +80,4 @@
#define CONFIG_USB_ETHER_SMSC95XX
#define CONFIG_USB_ETHER_RTL8152
/* rockchip xhci host driver */
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif

@ -193,7 +193,6 @@
/* USB Configuration */
#define CONFIG_USB_XHCI_KEYSTONE
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_USB_SS_BASE KS2_USB_SS_BASE
#define CONFIG_USB_HOST_XHCI_BASE KS2_USB_HOST_XHCI_BASE
#define CONFIG_DEV_USB_PHY_BASE KS2_DEV_USB_PHY_BASE

@ -101,9 +101,6 @@
#define CONFIG_SYS_NAND_USE_FLASH_BBT
#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
/* USB */
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 4
/* SD/MMC */
#define CONFIG_SUPPORT_EMMC_BOOT

@ -90,8 +90,6 @@
#define CONFIG_SYS_LOAD_ADDR 0x8000000
#if defined(CONFIG_ZYNQMP_USB)
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x1800000
#define DFU_DEFAULT_POLL_TIMEOUT 300
#define CONFIG_USB_CABLE_CHECK

@ -4877,7 +4877,6 @@ CONFIG_SYS_USB_OHCI_CPU_INIT
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS
CONFIG_SYS_USB_OHCI_REGS_BASE
CONFIG_SYS_USB_OHCI_SLOT_NAME
CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS
CONFIG_SYS_USER_SWITCHES_BASE
CONFIG_SYS_USE_BOOT_NORFLASH
CONFIG_SYS_USE_DATAFLASH

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