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@ -9,6 +9,7 @@ |
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*/ |
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#include <common.h> |
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#include <errno.h> |
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#include <malloc.h> |
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#include <mmc.h> |
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#include <sdhci.h> |
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@ -479,73 +480,83 @@ static const struct mmc_ops sdhci_ops = { |
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.init = sdhci_init, |
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}; |
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int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk) |
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int sdhci_setup_cfg(struct mmc_config *cfg, const char *name, int buswidth, |
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uint caps, u32 max_clk, u32 min_clk, uint version, |
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uint quirks, uint host_caps) |
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{ |
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unsigned int caps; |
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host->cfg.name = host->name; |
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host->cfg.ops = &sdhci_ops; |
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caps = sdhci_readl(host, SDHCI_CAPABILITIES); |
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#ifdef CONFIG_MMC_SDMA |
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if (!(caps & SDHCI_CAN_DO_SDMA)) { |
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printf("%s: Your controller doesn't support SDMA!!\n", |
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__func__); |
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return -1; |
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} |
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cfg->name = name; |
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#ifndef CONFIG_DM_MMC_OPS |
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cfg->ops = &sdhci_ops; |
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#endif |
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if (max_clk) |
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host->cfg.f_max = max_clk; |
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cfg->f_max = max_clk; |
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else { |
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if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) |
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host->cfg.f_max = (caps & SDHCI_CLOCK_V3_BASE_MASK) |
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>> SDHCI_CLOCK_BASE_SHIFT; |
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if (version >= SDHCI_SPEC_300) |
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cfg->f_max = (caps & SDHCI_CLOCK_V3_BASE_MASK) >> |
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SDHCI_CLOCK_BASE_SHIFT; |
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else |
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host->cfg.f_max = (caps & SDHCI_CLOCK_BASE_MASK) |
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>> SDHCI_CLOCK_BASE_SHIFT; |
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host->cfg.f_max *= 1000000; |
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} |
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if (host->cfg.f_max == 0) { |
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printf("%s: Hardware doesn't specify base clock frequency\n", |
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__func__); |
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return -1; |
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cfg->f_max = (caps & SDHCI_CLOCK_BASE_MASK) >> |
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SDHCI_CLOCK_BASE_SHIFT; |
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cfg->f_max *= 1000000; |
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} |
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if (cfg->f_max == 0) |
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return -EINVAL; |
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if (min_clk) |
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host->cfg.f_min = min_clk; |
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cfg->f_min = min_clk; |
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else { |
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if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) |
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host->cfg.f_min = host->cfg.f_max / |
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SDHCI_MAX_DIV_SPEC_300; |
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if (version >= SDHCI_SPEC_300) |
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cfg->f_min = cfg->f_max / SDHCI_MAX_DIV_SPEC_300; |
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else |
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host->cfg.f_min = host->cfg.f_max / |
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SDHCI_MAX_DIV_SPEC_200; |
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cfg->f_min = cfg->f_max / SDHCI_MAX_DIV_SPEC_200; |
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} |
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host->cfg.voltages = 0; |
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cfg->voltages = 0; |
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if (caps & SDHCI_CAN_VDD_330) |
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host->cfg.voltages |= MMC_VDD_32_33 | MMC_VDD_33_34; |
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cfg->voltages |= MMC_VDD_32_33 | MMC_VDD_33_34; |
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if (caps & SDHCI_CAN_VDD_300) |
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host->cfg.voltages |= MMC_VDD_29_30 | MMC_VDD_30_31; |
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cfg->voltages |= MMC_VDD_29_30 | MMC_VDD_30_31; |
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if (caps & SDHCI_CAN_VDD_180) |
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host->cfg.voltages |= MMC_VDD_165_195; |
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cfg->voltages |= MMC_VDD_165_195; |
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if (host->quirks & SDHCI_QUIRK_BROKEN_VOLTAGE) |
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host->cfg.voltages |= host->voltages; |
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host->cfg.host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT; |
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if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) { |
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cfg->host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT; |
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if (version >= SDHCI_SPEC_300) { |
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if (caps & SDHCI_CAN_DO_8BIT) |
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host->cfg.host_caps |= MMC_MODE_8BIT; |
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cfg->host_caps |= MMC_MODE_8BIT; |
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} |
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if (host->quirks & SDHCI_QUIRK_NO_HISPD_BIT) |
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host->cfg.host_caps &= ~(MMC_MODE_HS | MMC_MODE_HS_52MHz); |
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if (quirks & SDHCI_QUIRK_NO_HISPD_BIT) |
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cfg->host_caps &= ~(MMC_MODE_HS | MMC_MODE_HS_52MHz); |
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if (host_caps) |
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cfg->host_caps |= host_caps; |
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if (host->host_caps) |
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host->cfg.host_caps |= host->host_caps; |
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cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; |
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host->cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; |
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return 0; |
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} |
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int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk) |
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{ |
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unsigned int caps; |
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caps = sdhci_readl(host, SDHCI_CAPABILITIES); |
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#ifdef CONFIG_MMC_SDMA |
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if (!(caps & SDHCI_CAN_DO_SDMA)) { |
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printf("%s: Your controller doesn't support SDMA!!\n", |
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__func__); |
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return -1; |
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} |
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#endif |
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if (sdhci_setup_cfg(&host->cfg, host->name, host->bus_width, caps, |
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max_clk, min_clk, SDHCI_GET_VERSION(host), |
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host->quirks, host->host_caps)) { |
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printf("%s: Hardware doesn't specify base clock frequency\n", |
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__func__); |
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return -EINVAL; |
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} |
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if (host->quirks & SDHCI_QUIRK_BROKEN_VOLTAGE) |
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host->cfg.voltages |= host->voltages; |
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sdhci_reset(host, SDHCI_RESET_ALL); |
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