On later Allwinner SoCs, the watchdog hardware is by all means a separate hardware block, with its own address range and interrupt line. Move the register definitions to a separate file to facilitate supporting newer SoCs. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>master
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/*
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* (C) Copyright 2014 |
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* Chen-Yu Tsai <wens@csie.org> |
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* |
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* Watchdog register definitions |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#ifndef _SUNXI_WATCHDOG_H_ |
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#define _SUNXI_WATCHDOG_H_ |
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#define WDT_CTRL_RESTART (0x1 << 0) |
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#define WDT_CTRL_KEY (0x0a57 << 1) |
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#define WDT_MODE_EN (0x1 << 0) |
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#define WDT_MODE_RESET_EN (0x1 << 1) |
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struct sunxi_wdog { |
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u32 ctl; /* 0x00 */ |
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u32 mode; /* 0x04 */ |
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u32 res[2]; |
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}; |
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#endif /* _SUNXI_WATCHDOG_H_ */ |
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