Whitebox
/
u-boot
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

powerpc: mpc85xx: Move set_liodns, setup_portals to common boot seq

Browse Source 
Users migrating Freescale's PowerPC SoC U-Boot code to their custom
board, often overlook the need to execute set_liodns() and
setup_portals() being called by platform files.

So Move set_liodns() and setup_portals() to common u-boot boot
sequence

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
master
Prabhakar Kushwaha 8 years ago committed by York Sun
parent 12f229ea8f
commit 2c0d69713c
13 changed files with 11 additions and 65 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
Show Stats Download Patch File Download Diff File
  1. 11
      arch/powerpc/cpu/mpc85xx/cpu_init.c
  2. 5
      board/freescale/b4860qds/b4860qds.c
  3. 6
      board/freescale/corenet_ds/corenet_ds.c
  4. 3
      board/freescale/p2041rdb/p2041rdb.c
  5. 5
      board/freescale/t102xqds/t102xqds.c
  6. 5
      board/freescale/t102xrdb/t102xrdb.c
  7. 5
      board/freescale/t1040qds/t1040qds.c
  8. 6
      board/freescale/t104xrdb/t104xrdb.c
  9. 6
      board/freescale/t208xqds/t208xqds.c
  10. 6
      board/freescale/t208xrdb/t208xrdb.c
  11. 6
      board/freescale/t4qds/t4240emu.c
  12. 6
      board/freescale/t4qds/t4240qds.c
  13. 6
      board/freescale/t4rdb/t4240rdb.c

11
arch/powerpc/cpu/mpc85xx/cpu_init.c
Unescape View File

@ -23,6 +23,10 @@
#include <asm/fsl_law.h>
#include <asm/fsl_serdes.h>
#include <asm/fsl_srio.h>
#ifdef CONFIG_FSL_CORENET
#include <asm/fsl_portals.h>
#include <asm/fsl_liodn.h>
#endif
#include <fsl_usb.h>
#include <hwconfig.h>
#include <linux/compiler.h>
@ -788,6 +792,13 @@ int cpu_init_r(void)
spin_table_compat = 1;
#endif
#ifdef CONFIG_FSL_CORENET
set_liodns();
#ifdef CONFIG_SYS_DPAA_QBMAN
setup_portals();
#endif
#endif
l2cache_init();
#if defined(CONFIG_RAMBOOT_PBL)
disable_cpc_sram();

5
board/freescale/b4860qds/b4860qds.c
Unescape View File

@ -16,7 +16,6 @@
#include <asm/immap_85xx.h>
#include <asm/fsl_law.h>
#include <asm/fsl_serdes.h>
#include <asm/fsl_portals.h>
#include <asm/fsl_liodn.h>
#include <fm_eth.h>
#include <hwconfig.h>
@ -1023,10 +1022,6 @@ int board_early_init_r(void)
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, flash_esel, BOOKE_PAGESZ_256M, 1);
set_liodns();
#ifdef CONFIG_SYS_DPAA_QBMAN
setup_portals();
#endif
/*
* Adjust core voltage according to voltage ID
* This function changes I2C mux to channel 2.

6
board/freescale/corenet_ds/corenet_ds.c
Unescape View File

@ -14,7 +14,6 @@
#include <asm/immap_85xx.h>
#include <asm/fsl_law.h>
#include <asm/fsl_serdes.h>
#include <asm/fsl_portals.h>
#include <asm/fsl_liodn.h>
#include <fm_eth.h>
@ -125,11 +124,6 @@ int board_early_init_r(void)
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, /* perms, wimge */
0, flash_esel, BOOKE_PAGESZ_256M, 1); /* ts, esel, tsize, iprot */
set_liodns();
#ifdef CONFIG_SYS_DPAA_QBMAN
setup_portals();
#endif
return 0;
}

3
board/freescale/p2041rdb/p2041rdb.c
Unescape View File

@ -14,7 +14,6 @@
#include <asm/immap_85xx.h>
#include <asm/fsl_law.h>
#include <asm/fsl_serdes.h>
#include <asm/fsl_portals.h>
#include <asm/fsl_liodn.h>
#include <fm_eth.h>
@ -140,8 +139,6 @@ int board_early_init_r(void)
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, flash_esel, BOOKE_PAGESZ_256M, 1);
set_liodns();
setup_portals();
board_config_lanes_mux();
return 0;

5
board/freescale/t102xqds/t102xqds.c
Unescape View File

@ -15,7 +15,6 @@
#include <asm/immap_85xx.h>
#include <asm/fsl_law.h>
#include <asm/fsl_serdes.h>
#include <asm/fsl_portals.h>
#include <asm/fsl_liodn.h>
#include <fm_eth.h>
#include <hwconfig.h>
@ -280,10 +279,6 @@ int board_early_init_r(void)
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, flash_esel, BOOKE_PAGESZ_256M, 1);
#endif
set_liodns();
#ifdef CONFIG_SYS_DPAA_QBMAN
setup_portals();
#endif
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
board_mux_lane_to_slot();
board_retimer_ds125df111_init();

5
board/freescale/t102xrdb/t102xrdb.c
Unescape View File

@ -14,7 +14,6 @@
#include <asm/immap_85xx.h>
#include <asm/fsl_law.h>
#include <asm/fsl_serdes.h>
#include <asm/fsl_portals.h>
#include <asm/fsl_liodn.h>
#include <fm_eth.h>
#include "t102xrdb.h"
@ -151,10 +150,6 @@ int board_early_init_r(void)
0, flash_esel, BOOKE_PAGESZ_256M, 1);
#endif
set_liodns();
#ifdef CONFIG_SYS_DPAA_QBMAN
setup_portals();
#endif
#ifdef CONFIG_T1024RDB
board_mux_lane();
#endif

5
board/freescale/t1040qds/t1040qds.c
Unescape View File

@ -15,7 +15,6 @@
#include <asm/immap_85xx.h>
#include <asm/fsl_law.h>
#include <asm/fsl_serdes.h>
#include <asm/fsl_portals.h>
#include <asm/fsl_liodn.h>
#include <fm_eth.h>
#include <hwconfig.h>
@ -153,10 +152,6 @@ int board_early_init_r(void)
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, flash_esel, BOOKE_PAGESZ_256M, 1);
#endif
set_liodns();
#ifdef CONFIG_SYS_DPAA_QBMAN
setup_portals();
#endif
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
return 0;

6
board/freescale/t104xrdb/t104xrdb.c
Unescape View File

@ -16,7 +16,6 @@
#include <asm/fsl_fdt.h>
#include <asm/fsl_law.h>
#include <asm/fsl_serdes.h>
#include <asm/fsl_portals.h>
#include <asm/fsl_liodn.h>
#include <fm_eth.h>
#include "../common/sleep.h"
@ -84,11 +83,6 @@ int board_early_init_r(void)
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, flash_esel, BOOKE_PAGESZ_256M, 1);
#endif
set_liodns();
#ifdef CONFIG_SYS_DPAA_QBMAN
setup_portals();
#endif
return 0;
}

6
board/freescale/t208xqds/t208xqds.c
Unescape View File

@ -14,7 +14,6 @@
#include <asm/immap_85xx.h>
#include <asm/fsl_law.h>
#include <asm/fsl_serdes.h>
#include <asm/fsl_portals.h>
#include <asm/fsl_liodn.h>
#include <fm_eth.h>
@ -356,11 +355,6 @@ int board_early_init_r(void)
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, flash_esel, BOOKE_PAGESZ_256M, 1);
set_liodns();
#ifdef CONFIG_SYS_DPAA_QBMAN
setup_portals();
#endif
/* Disable remote I2C connection to qixis fpga */
QIXIS_WRITE(brdcfg[5], QIXIS_READ(brdcfg[5]) & ~BRDCFG5_IRE);

6
board/freescale/t208xrdb/t208xrdb.c
Unescape View File

@ -14,7 +14,6 @@
#include <asm/immap_85xx.h>
#include <asm/fsl_law.h>
#include <asm/fsl_serdes.h>
#include <asm/fsl_portals.h>
#include <asm/fsl_liodn.h>
#include <fm_eth.h>
#include "t208xrdb.h"
@ -81,11 +80,6 @@ int board_early_init_r(void)
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, flash_esel, BOOKE_PAGESZ_256M, 1);
set_liodns();
#ifdef CONFIG_SYS_DPAA_QBMAN
setup_portals();
#endif
/*
* Adjust core voltage according to voltage ID
* This function changes I2C mux to channel 2.

6
board/freescale/t4qds/t4240emu.c
Unescape View File

@ -15,7 +15,6 @@
#include <asm/immap_85xx.h>
#include <asm/fsl_law.h>
#include <asm/fsl_serdes.h>
#include <asm/fsl_portals.h>
#include <asm/fsl_liodn.h>
DECLARE_GLOBAL_DATA_PTR;
@ -56,11 +55,6 @@ int board_early_init_r(void)
MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, flash_esel, BOOKE_PAGESZ_256M, 1);
set_liodns();
#ifdef CONFIG_SYS_DPAA_QBMAN
setup_portals();
#endif
return 0;
}

6
board/freescale/t4qds/t4240qds.c
Unescape View File

@ -15,7 +15,6 @@
#include <asm/immap_85xx.h>
#include <asm/fsl_law.h>
#include <asm/fsl_serdes.h>
#include <asm/fsl_portals.h>
#include <asm/fsl_liodn.h>
#include <fm_eth.h>
@ -552,11 +551,6 @@ int board_early_init_r(void)
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, flash_esel, BOOKE_PAGESZ_256M, 1);
set_liodns();
#ifdef CONFIG_SYS_DPAA_QBMAN
setup_portals();
#endif
/* Disable remote I2C connection to qixis fpga */
QIXIS_WRITE(brdcfg[5], QIXIS_READ(brdcfg[5]) & ~BRDCFG5_IRE);

6
board/freescale/t4rdb/t4240rdb.c
Unescape View File

@ -15,7 +15,6 @@
#include <asm/immap_85xx.h>
#include <asm/fsl_law.h>
#include <asm/fsl_serdes.h>
#include <asm/fsl_portals.h>
#include <asm/fsl_liodn.h>
#include <fm_eth.h>
@ -75,11 +74,6 @@ int board_early_init_r(void)
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, flash_esel, BOOKE_PAGESZ_256M, 1);
set_liodns();
#ifdef CONFIG_SYS_DPAA_QBMAN
setup_portals();
#endif
return 0;
}

Write Preview
Loading…
Cancel
Save