Add a timer driver for the MPC83xx architecture. Signed-off-by: Mario Six <mario.six@gdsys.cc>lime2-spi
Mario Six
6 years ago
committed by
Simon Glass
parent
d259f975d4
commit
2c21749d71
@ -0,0 +1,21 @@ |
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MPC83xx timer devices |
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MPC83xx SoCs offer a decrementer interrupt that can be used to implement delay |
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functionality, and periodically triggered actions. |
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Required properties: |
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- compatible: must be "fsl,mpc83xx-timer" |
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- clocks: must be a reference to the system's CSB (coherent system bus) clock, |
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provided by one of the "fsl,mpc83xx-clk" devices |
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Example: |
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socclocks: clocks { |
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compatible = "fsl,mpc832x-clk"; |
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#clock-cells = <1>; |
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}; |
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timer { |
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compatible = "fsl,mpc83xx-timer"; |
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clocks = <&socclocks MPC83XX_CLK_CSB>; |
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}; |
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@ -0,0 +1,249 @@ |
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2018 |
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* Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc |
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*/ |
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#include <common.h> |
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#include <board.h> |
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#include <clk.h> |
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#include <dm.h> |
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#include <timer.h> |
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#include <watchdog.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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/**
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* struct mpc83xx_timer_priv - Private data structure for MPC83xx timer driver |
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* @decrementer_count: Value to which the decrementer register should be re-set |
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* to when a timer interrupt occurs, thus determines the |
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* interrupt frequency (value for 1e6/HZ microseconds) |
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* @timestamp: Counter for the number of timer interrupts that have |
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* occurred (i.e. can be used to trigger events |
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* periodically in the timer interrupt) |
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*/ |
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struct mpc83xx_timer_priv { |
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uint decrementer_count; |
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ulong timestamp; |
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}; |
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/*
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* Bitmask for enabling the time base in the SPCR (System Priority |
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* Configuration Register) |
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*/ |
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static const u32 SPCR_TBEN_MASK = BIT(31 - 9); |
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/**
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* get_dec() - Get the value of the decrementer register |
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* |
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* Return: The value of the decrementer register |
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*/ |
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static inline unsigned long get_dec(void) |
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{ |
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unsigned long val; |
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asm volatile ("mfdec %0" : "=r" (val) : ); |
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return val; |
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} |
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/**
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* set_dec() - Set the value of the decrementer register |
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* @val: The value of the decrementer register to be set |
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*/ |
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static inline void set_dec(unsigned long val) |
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{ |
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if (val) |
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asm volatile ("mtdec %0"::"r" (val)); |
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} |
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/**
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* mftbu() - Get value of TBU (upper time base) register |
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* |
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* Return: Value of the TBU register |
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*/ |
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static inline u32 mftbu(void) |
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{ |
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u32 rval; |
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asm volatile("mftbu %0" : "=r" (rval)); |
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return rval; |
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} |
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/**
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* mftb() - Get value of TBL (lower time base) register |
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* |
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* Return: Value of the TBL register |
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*/ |
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static inline u32 mftb(void) |
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{ |
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u32 rval; |
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asm volatile("mftb %0" : "=r" (rval)); |
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return rval; |
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} |
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/*
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* TODO(mario.six@gdsys.cc): This should really be done by timer_init, and the |
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* interrupt init should go into a interrupt driver. |
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*/ |
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int interrupt_init(void) |
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{ |
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immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; |
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struct udevice *csb; |
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struct udevice *board; |
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struct udevice *timer; |
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struct mpc83xx_timer_priv *timer_priv; |
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struct clk clock; |
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int ret; |
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ret = uclass_first_device_err(UCLASS_TIMER, &timer); |
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if (ret) { |
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debug("%s: Could not find timer device (error: %d)", |
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__func__, ret); |
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return ret; |
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} |
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timer_priv = dev_get_priv(timer); |
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if (board_get(&board)) { |
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debug("%s: board device could not be fetched.\n", __func__); |
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return -ENOENT; |
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} |
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ret = uclass_get_device_by_phandle(UCLASS_SIMPLE_BUS, board, |
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"csb", &csb); |
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if (ret) { |
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debug("%s: Could not retrieve CSB device (error: %d)", |
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__func__, ret); |
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return ret; |
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} |
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ret = clk_get_by_index(csb, 0, &clock); |
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if (ret) { |
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debug("%s: Could not retrieve clock (error: %d)", |
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__func__, ret); |
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return ret; |
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} |
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timer_priv->decrementer_count = (clk_get_rate(&clock) / 4) |
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/ CONFIG_SYS_HZ; |
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/* Enable e300 time base */ |
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setbits_be32(&immr->sysconf.spcr, SPCR_TBEN_MASK); |
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set_dec(timer_priv->decrementer_count); |
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/* Switch on interrupts */ |
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set_msr(get_msr() | MSR_EE); |
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return 0; |
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} |
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/**
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* timer_interrupt() - Handler for the timer interrupt |
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* @regs: Array of register values |
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*/ |
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void timer_interrupt(struct pt_regs *regs) |
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{ |
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struct udevice *timer = gd->timer; |
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struct mpc83xx_timer_priv *priv; |
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/*
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* During initialization, gd->timer might not be set yet, but the timer |
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* interrupt may already be enabled. In this case, wait for the |
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* initialization to complete |
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*/ |
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if (!timer) |
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return; |
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priv = dev_get_priv(timer); |
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/* Restore Decrementer Count */ |
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set_dec(priv->decrementer_count); |
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priv->timestamp++; |
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#if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG) |
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if ((timestamp % (CONFIG_SYS_WATCHDOG_FREQ)) == 0) |
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WATCHDOG_RESET(); |
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#endif /* CONFIG_WATCHDOG || CONFIG_HW_WATCHDOG */ |
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#ifdef CONFIG_LED_STATUS |
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status_led_tick(priv->timestamp); |
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#endif /* CONFIG_LED_STATUS */ |
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#ifdef CONFIG_SHOW_ACTIVITY |
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board_show_activity(priv->timestamp); |
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#endif /* CONFIG_SHOW_ACTIVITY */ |
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} |
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void wait_ticks(ulong ticks) |
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{ |
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ulong end = get_ticks() + ticks; |
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while (end > get_ticks()) |
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WATCHDOG_RESET(); |
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} |
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static int mpc83xx_timer_get_count(struct udevice *dev, u64 *count) |
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{ |
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u32 tbu, tbl; |
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/*
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* To make sure that no tbl overflow occurred between reading tbl and |
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* tbu, read tbu again, and compare it with the previously read tbu |
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* value: If they're different, a tbl overflow has occurred. |
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*/ |
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do { |
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tbu = mftbu(); |
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tbl = mftb(); |
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} while (tbu != mftbu()); |
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*count = (tbu * 0x10000ULL) + tbl; |
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return 0; |
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} |
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static int mpc83xx_timer_probe(struct udevice *dev) |
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{ |
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struct timer_dev_priv *uc_priv = dev->uclass_priv; |
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struct clk clock; |
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int ret; |
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ret = interrupt_init(); |
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if (ret) { |
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debug("%s: interrupt_init failed (err = %d)\n", |
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dev->name, ret); |
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return ret; |
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} |
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ret = clk_get_by_index(dev, 0, &clock); |
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if (ret) { |
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debug("%s: Could not retrieve clock (err = %d)\n", |
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dev->name, ret); |
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return ret; |
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} |
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uc_priv->clock_rate = (clk_get_rate(&clock) + 3L) / 4L; |
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return 0; |
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} |
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static const struct timer_ops mpc83xx_timer_ops = { |
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.get_count = mpc83xx_timer_get_count, |
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}; |
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static const struct udevice_id mpc83xx_timer_ids[] = { |
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{ .compatible = "fsl,mpc83xx-timer" }, |
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{ /* sentinel */ } |
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}; |
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U_BOOT_DRIVER(mpc83xx_timer) = { |
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.name = "mpc83xx_timer", |
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.id = UCLASS_TIMER, |
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.of_match = mpc83xx_timer_ids, |
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.probe = mpc83xx_timer_probe, |
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.ops = &mpc83xx_timer_ops, |
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.flags = DM_FLAG_PRE_RELOC, |
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.priv_auto_alloc_size = sizeof(struct mpc83xx_timer_priv), |
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}; |
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