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nand: mxc: Prepare to add support for i.MX5

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Add some abstraction to NFC definitions so that some parts of the current code
can also be used for future i.MX5 code.

Clean up a few things by the way.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
master
Benoît Thébaudeau 11 years ago committed by Albert ARIBAUD
parent a430e91643
commit 2dc0aa0227
3 changed files with 97 additions and 114 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
Show Stats Download Patch File Download Diff File
  1. 92
      drivers/mtd/nand/mxc_nand.c
  2. 72
      include/fsl_nfc.h
  3. 47
      nand_spl/nand_boot_fsl_nfc.c

92
drivers/mtd/nand/mxc_nand.c
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@ -119,7 +119,7 @@ static uint32_t *mxc_nand_memcpy32(uint32_t *dest, uint32_t *source, size_t size
/*
* This function polls the NANDFC to wait for the basic operation to
* complete by checking the INT bit of config2 register.
* complete by checking the INT bit.
*/
static void wait_op_done(struct mxc_nand_host *host, int max_retries,
uint16_t param)
@ -127,10 +127,10 @@ static void wait_op_done(struct mxc_nand_host *host, int max_retries,
uint32_t tmp;
while (max_retries-- > 0) {
if (readw(&host->regs->config2) & NFC_INT) {
tmp = readw(&host->regs->config2);
tmp &= ~NFC_INT;
writew(tmp, &host->regs->config2);
tmp = readnfc(&host->regs->config2);
if (tmp & NFC_V1_V2_CONFIG2_INT) {
tmp &= ~NFC_V1_V2_CONFIG2_INT;
writenfc(tmp, &host->regs->config2);
break;
}
udelay(1);
@ -149,8 +149,8 @@ static void send_cmd(struct mxc_nand_host *host, uint16_t cmd)
{
MTDDEBUG(MTD_DEBUG_LEVEL3, "send_cmd(host, 0x%x)\n", cmd);
writew(cmd, &host->regs->flash_cmd);
writew(NFC_CMD, &host->regs->config2);
writenfc(cmd, &host->regs->flash_cmd);
writenfc(NFC_CMD, &host->regs->operation);
/* Wait for operation to complete */
wait_op_done(host, TROP_US_DELAY, cmd);
@ -165,8 +165,8 @@ static void send_addr(struct mxc_nand_host *host, uint16_t addr)
{
MTDDEBUG(MTD_DEBUG_LEVEL3, "send_addr(host, 0x%x)\n", addr);
writew(addr, &host->regs->flash_addr);
writew(NFC_ADDR, &host->regs->config2);
writenfc(addr, &host->regs->flash_addr);
writenfc(NFC_ADDR, &host->regs->operation);
/* Wait for operation to complete */
wait_op_done(host, TROP_US_DELAY, addr);
@ -198,19 +198,19 @@ static void send_prog_page(struct mxc_nand_host *host, uint8_t buf_id,
}
}
writew(buf_id, &host->regs->buf_addr);
writenfc(buf_id, &host->regs->buf_addr);
/* Configure spare or page+spare access */
if (!host->pagesize_2k) {
uint16_t config1 = readw(&host->regs->config1);
uint16_t config1 = readnfc(&host->regs->config1);
if (spare_only)
config1 |= NFC_SP_EN;
config1 |= NFC_CONFIG1_SP_EN;
else
config1 &= ~NFC_SP_EN;
writew(config1, &host->regs->config1);
config1 &= ~NFC_CONFIG1_SP_EN;
writenfc(config1, &host->regs->config1);
}
writew(NFC_INPUT, &host->regs->config2);
writenfc(NFC_INPUT, &host->regs->operation);
/* Wait for operation to complete */
wait_op_done(host, TROP_US_DELAY, spare_only);
@ -225,19 +225,19 @@ static void send_read_page(struct mxc_nand_host *host, uint8_t buf_id,
{
MTDDEBUG(MTD_DEBUG_LEVEL3, "send_read_page (%d)\n", spare_only);
writew(buf_id, &host->regs->buf_addr);
writenfc(buf_id, &host->regs->buf_addr);
/* Configure spare or page+spare access */
if (!host->pagesize_2k) {
uint32_t config1 = readw(&host->regs->config1);
uint32_t config1 = readnfc(&host->regs->config1);
if (spare_only)
config1 |= NFC_SP_EN;
config1 |= NFC_CONFIG1_SP_EN;
else
config1 &= ~NFC_SP_EN;
writew(config1, &host->regs->config1);
config1 &= ~NFC_CONFIG1_SP_EN;
writenfc(config1, &host->regs->config1);
}
writew(NFC_OUTPUT, &host->regs->config2);
writenfc(NFC_OUTPUT, &host->regs->operation);
/* Wait for operation to complete */
wait_op_done(host, TROP_US_DELAY, spare_only);
@ -265,14 +265,14 @@ static void send_read_id(struct mxc_nand_host *host)
uint16_t tmp;
/* NANDFC buffer 0 is used for device ID output */
writew(0x0, &host->regs->buf_addr);
writenfc(0x0, &host->regs->buf_addr);
/* Read ID into main buffer */
tmp = readw(&host->regs->config1);
tmp &= ~NFC_SP_EN;
writew(tmp, &host->regs->config1);
tmp = readnfc(&host->regs->config1);
tmp &= ~NFC_CONFIG1_SP_EN;
writenfc(tmp, &host->regs->config1);
writew(NFC_ID, &host->regs->config2);
writenfc(NFC_ID, &host->regs->operation);
/* Wait for operation to complete */
wait_op_done(host, TROP_US_DELAY, 0);
@ -292,14 +292,14 @@ static uint16_t get_dev_status(struct mxc_nand_host *host)
/* store the main area1 first word, later do recovery */
store = readl(main_buf);
/* NANDFC buffer 1 is used for device status */
writew(1, &host->regs->buf_addr);
writenfc(1, &host->regs->buf_addr);
/* Read status into main buffer */
tmp = readw(&host->regs->config1);
tmp &= ~NFC_SP_EN;
writew(tmp, &host->regs->config1);
tmp = readnfc(&host->regs->config1);
tmp &= ~NFC_CONFIG1_SP_EN;
writenfc(tmp, &host->regs->config1);
writew(NFC_STATUS, &host->regs->config2);
writenfc(NFC_STATUS, &host->regs->operation);
/* Wait for operation to complete */
wait_op_done(host, TROP_US_DELAY, 0);
@ -328,13 +328,13 @@ static void _mxc_nand_enable_hwecc(struct mtd_info *mtd, int on)
{
struct nand_chip *nand_chip = mtd->priv;
struct mxc_nand_host *host = nand_chip->priv;
uint16_t tmp = readw(&host->regs->config1);
uint16_t tmp = readnfc(&host->regs->config1);
if (on)
tmp |= NFC_ECC_EN;
tmp |= NFC_V1_V2_CONFIG1_ECC_EN;
else
tmp &= ~NFC_ECC_EN;
writew(tmp, &host->regs->config1);
tmp &= ~NFC_V1_V2_CONFIG1_ECC_EN;
writenfc(tmp, &host->regs->config1);
}
#ifdef CONFIG_MXC_NAND_HWECC
@ -667,7 +667,7 @@ static int mxc_nand_correct_data(struct mtd_info *mtd, u_char *dat,
* additional correction. 2-Bit errors cannot be corrected by
* HW ECC, so we need to return failure
*/
uint16_t ecc_status = readw(&host->regs->ecc_status_result);
uint16_t ecc_status = readnfc(&host->regs->ecc_status_result);
if (((ecc_status & 0x3) == 2) || ((ecc_status >> 2) == 2)) {
MTDDEBUG(MTD_DEBUG_LEVEL0,
@ -1210,24 +1210,24 @@ int board_nand_init(struct nand_chip *this)
#endif
#ifdef MXC_NFC_V2_1
tmp = readw(&host->regs->config1);
tmp |= NFC_ONE_CYCLE;
tmp |= NFC_4_8N_ECC;
writew(tmp, &host->regs->config1);
tmp = readnfc(&host->regs->config1);
tmp |= NFC_V2_CONFIG1_ONE_CYCLE;
tmp |= NFC_V2_CONFIG1_ECC_MODE_4;
writenfc(tmp, &host->regs->config1);
if (host->pagesize_2k)
writew(64/2, &host->regs->spare_area_size);
writenfc(64/2, &host->regs->spare_area_size);
else
writew(16/2, &host->regs->spare_area_size);
writenfc(16/2, &host->regs->spare_area_size);
#endif
/*
* preset operation
* Unlock the internal RAM Buffer
*/
writew(0x2, &host->regs->config);
writenfc(0x2, &host->regs->config);
/* Blocks to be unlocked */
writew(0x0, &host->regs->unlockstart_blkaddr);
writenfc(0x0, &host->regs->unlockstart_blkaddr);
/* Originally (Freescale LTIB 2.6.21) 0x4000 was written to the
* unlockend_blkaddr, but the magic 0x4000 does not always work
* when writing more than some 32 megabytes (on 2k page nands)
@ -1239,10 +1239,10 @@ int board_nand_init(struct nand_chip *this)
* This might be NAND chip specific and the i.MX31 datasheet is
* extremely vague about the semantics of this register.
*/
writew(0xFFFF, &host->regs->unlockend_blkaddr);
writenfc(0xFFFF, &host->regs->unlockend_blkaddr);
/* Unlock Block Command for given address range */
writew(0x4, &host->regs->wrprot);
writenfc(0x4, &host->regs->wrprot);
return 0;
}

72
include/fsl_nfc.h
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@ -113,58 +113,38 @@ struct fsl_nfc_regs {
#endif
};
/*
* Set INT to 0, FCMD to 1, rest to 0 in NFC_CONFIG2 Register for Command
* operation
*/
#define NFC_CMD 0x1
/* Set FCMD to 1, rest to 0 for Command operation */
#define NFC_CMD 0x1
/*
* Set INT to 0, FADD to 1, rest to 0 in NFC_CONFIG2 Register for Address
* operation
*/
#define NFC_ADDR 0x2
/* Set FADD to 1, rest to 0 for Address operation */
#define NFC_ADDR 0x2
/*
* Set INT to 0, FDI to 1, rest to 0 in NFC_CONFIG2 Register for Input
* operation
*/
#define NFC_INPUT 0x4
/* Set FDI to 1, rest to 0 for Input operation */
#define NFC_INPUT 0x4
/*
* Set INT to 0, FDO to 001, rest to 0 in NFC_CONFIG2 Register for Data
* Output operation
*/
#define NFC_OUTPUT 0x8
/* Set FDO to 001, rest to 0 for Data Output operation */
#define NFC_OUTPUT 0x8
/*
* Set INT to 0, FD0 to 010, rest to 0 in NFC_CONFIG2 Register for Read ID
* operation
*/
#define NFC_ID 0x10
/* Set FDO to 010, rest to 0 for Read ID operation */
#define NFC_ID 0x10
/*
* Set INT to 0, FDO to 100, rest to 0 in NFC_CONFIG2 Register for Read
* Status operation
*/
#define NFC_STATUS 0x20
/* Set FDO to 100, rest to 0 for Read Status operation */
#define NFC_STATUS 0x20
/*
* Set INT to 1, rest to 0 in NFC_CONFIG2 Register for Read Status
* operation
*/
#define NFC_INT 0x8000
#define NFC_CONFIG1_SP_EN (1 << 2)
#define NFC_CONFIG1_RST (1 << 6)
#define NFC_CONFIG1_CE (1 << 7)
#define NFC_V1_V2_CONFIG1_ECC_EN (1 << 3)
#define NFC_V1_V2_CONFIG1_INT_MSK (1 << 4)
#define NFC_V1_V2_CONFIG1_BIG (1 << 5)
#define NFC_V2_CONFIG1_ECC_MODE_4 (1 << 0)
#define NFC_V2_CONFIG1_ONE_CYCLE (1 << 8)
#define NFC_V2_CONFIG1_FP_INT (1 << 11)
#ifdef MXC_NFC_V2_1
#define NFC_4_8N_ECC (1 << 0)
#endif
#define NFC_SP_EN (1 << 2)
#define NFC_ECC_EN (1 << 3)
#define NFC_INT_MSK (1 << 4)
#define NFC_BIG (1 << 5)
#define NFC_RST (1 << 6)
#define NFC_CE (1 << 7)
#define NFC_ONE_CYCLE (1 << 8)
#define NFC_FP_INT (1 << 11)
#define NFC_V1_V2_CONFIG2_INT (1 << 15)
#define operation config2
#define readnfc readw
#define writenfc writew
#endif /* __FSL_NFC_H */

47
nand_spl/nand_boot_fsl_nfc.c
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@ -36,13 +36,13 @@ static void nfc_wait_ready(void)
{
uint32_t tmp;
while (!(readw(&nfc->config2) & NFC_INT))
while (!(readnfc(&nfc->config2) & NFC_V1_V2_CONFIG2_INT))
;
/* Reset interrupt flag */
tmp = readw(&nfc->config2);
tmp &= ~NFC_INT;
writew(tmp, &nfc->config2);
tmp = readnfc(&nfc->config2);
tmp &= ~NFC_V1_V2_CONFIG2_INT;
writenfc(tmp, &nfc->config2);
}
static void nfc_nand_init(void)
@ -51,43 +51,45 @@ static void nfc_nand_init(void)
int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
int config1;
writew(CONFIG_SYS_NAND_SPARE_SIZE / 2, &nfc->spare_area_size);
writenfc(CONFIG_SYS_NAND_SPARE_SIZE / 2, &nfc->spare_area_size);
/* unlocking RAM Buff */
writew(0x2, &nfc->config);
writenfc(0x2, &nfc->config);
/* hardware ECC checking and correct */
config1 = readw(&nfc->config1) | NFC_ECC_EN | NFC_INT_MSK |
NFC_ONE_CYCLE | NFC_FP_INT;
config1 = readnfc(&nfc->config1) | NFC_V1_V2_CONFIG1_ECC_EN |
NFC_V1_V2_CONFIG1_INT_MSK | NFC_V2_CONFIG1_ONE_CYCLE |
NFC_V2_CONFIG1_FP_INT;
/*
* if spare size is larger that 16 bytes per 512 byte hunk
* then use 8 symbol correction instead of 4
*/
if (CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page > 16)
config1 &= ~NFC_4_8N_ECC;
config1 &= ~NFC_V2_CONFIG1_ECC_MODE_4;
else
config1 |= NFC_4_8N_ECC;
writew(config1, &nfc->config1);
config1 |= NFC_V2_CONFIG1_ECC_MODE_4;
writenfc(config1, &nfc->config1);
#elif defined(MXC_NFC_V1)
/* unlocking RAM Buff */
writew(0x2, &nfc->config);
writenfc(0x2, &nfc->config);
/* hardware ECC checking and correct */
writew(NFC_ECC_EN | NFC_INT_MSK, &nfc->config1);
writenfc(NFC_V1_V2_CONFIG1_ECC_EN | NFC_V1_V2_CONFIG1_INT_MSK,
&nfc->config1);
#endif
}
static void nfc_nand_command(unsigned short command)
{
writew(command, &nfc->flash_cmd);
writew(NFC_CMD, &nfc->config2);
writenfc(command, &nfc->flash_cmd);
writenfc(NFC_CMD, &nfc->operation);
nfc_wait_ready();
}
static void nfc_nand_address(unsigned short address)
{
writew(address, &nfc->flash_addr);
writew(NFC_ADDR, &nfc->config2);
writenfc(address, &nfc->flash_addr);
writenfc(NFC_ADDR, &nfc->operation);
nfc_wait_ready();
}
@ -121,8 +123,8 @@ static void nfc_nand_data_output(void)
int i;
#endif
writew(0, &nfc->buf_addr);
writew(NFC_OUTPUT, &nfc->config2);
writenfc(0, &nfc->buf_addr);
writenfc(NFC_OUTPUT, &nfc->operation);
nfc_wait_ready();
#ifdef NAND_MXC_2K_MULTI_CYCLE
/*
@ -130,8 +132,8 @@ static void nfc_nand_data_output(void)
* for pages larger than 512 bytes.
*/
for (i = 1; i < CONFIG_SYS_NAND_PAGE_SIZE / 512; i++) {
writew(i, &nfc->buf_addr);
writew(NFC_OUTPUT, &nfc->config2);
writenfc(i, &nfc->buf_addr);
writenfc(NFC_OUTPUT, &nfc->operation);
nfc_wait_ready();
}
#endif
@ -160,7 +162,8 @@ static int nfc_nand_check_ecc(void)
static void nfc_nand_read_page(unsigned int page_address)
{
writew(0, &nfc->buf_addr); /* read in first 0 buffer */
/* read in first 0 buffer */
writenfc(0, &nfc->buf_addr);
nfc_nand_command(NAND_CMD_READ0);
nfc_nand_page_address(page_address);

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