|
|
|
@ -1608,6 +1608,116 @@ static const unsigned int avb_gmii_mux[] = { |
|
|
|
|
AVB_TX_EN_MARK, AVB_TX_ER_MARK, AVB_TX_CLK_MARK, |
|
|
|
|
AVB_COL_MARK, |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
/* - CAN -------------------------------------------------------------------- */ |
|
|
|
|
static const unsigned int can0_data_pins[] = { |
|
|
|
|
/* TX, RX */ |
|
|
|
|
RCAR_GP_PIN(6, 15), RCAR_GP_PIN(6, 14), |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const unsigned int can0_data_mux[] = { |
|
|
|
|
CAN0_TX_MARK, CAN0_RX_MARK, |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const unsigned int can0_data_b_pins[] = { |
|
|
|
|
/* TX, RX */ |
|
|
|
|
RCAR_GP_PIN(3, 16), RCAR_GP_PIN(3, 15), |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const unsigned int can0_data_b_mux[] = { |
|
|
|
|
CAN0_TX_B_MARK, CAN0_RX_B_MARK, |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const unsigned int can0_data_c_pins[] = { |
|
|
|
|
/* TX, RX */ |
|
|
|
|
RCAR_GP_PIN(2, 17), RCAR_GP_PIN(2, 16), |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const unsigned int can0_data_c_mux[] = { |
|
|
|
|
CAN0_TX_C_MARK, CAN0_RX_C_MARK, |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const unsigned int can0_data_d_pins[] = { |
|
|
|
|
/* TX, RX */ |
|
|
|
|
RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 11), |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const unsigned int can0_data_d_mux[] = { |
|
|
|
|
CAN0_TX_D_MARK, CAN0_RX_D_MARK, |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const unsigned int can1_data_pins[] = { |
|
|
|
|
/* TX, RX */ |
|
|
|
|
RCAR_GP_PIN(6, 25), RCAR_GP_PIN(6, 24), |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const unsigned int can1_data_mux[] = { |
|
|
|
|
CAN1_TX_MARK, CAN1_RX_MARK, |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const unsigned int can1_data_b_pins[] = { |
|
|
|
|
/* TX, RX */ |
|
|
|
|
RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 1), |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const unsigned int can1_data_b_mux[] = { |
|
|
|
|
CAN1_TX_B_MARK, CAN1_RX_B_MARK, |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const unsigned int can1_data_c_pins[] = { |
|
|
|
|
/* TX, RX */ |
|
|
|
|
RCAR_GP_PIN(5, 6), RCAR_GP_PIN(5, 5), |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const unsigned int can1_data_c_mux[] = { |
|
|
|
|
CAN1_TX_C_MARK, CAN1_RX_C_MARK, |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const unsigned int can1_data_d_pins[] = { |
|
|
|
|
/* TX, RX */ |
|
|
|
|
RCAR_GP_PIN(3, 31), RCAR_GP_PIN(3, 30), |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const unsigned int can1_data_d_mux[] = { |
|
|
|
|
CAN1_TX_D_MARK, CAN1_RX_D_MARK, |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const unsigned int can_clk_pins[] = { |
|
|
|
|
/* CLK */ |
|
|
|
|
RCAR_GP_PIN(3, 31), |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const unsigned int can_clk_mux[] = { |
|
|
|
|
CAN_CLK_MARK, |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const unsigned int can_clk_b_pins[] = { |
|
|
|
|
/* CLK */ |
|
|
|
|
RCAR_GP_PIN(1, 23), |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const unsigned int can_clk_b_mux[] = { |
|
|
|
|
CAN_CLK_B_MARK, |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const unsigned int can_clk_c_pins[] = { |
|
|
|
|
/* CLK */ |
|
|
|
|
RCAR_GP_PIN(1, 0), |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const unsigned int can_clk_c_mux[] = { |
|
|
|
|
CAN_CLK_C_MARK, |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const unsigned int can_clk_d_pins[] = { |
|
|
|
|
/* CLK */ |
|
|
|
|
RCAR_GP_PIN(5, 0), |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const unsigned int can_clk_d_mux[] = { |
|
|
|
|
CAN_CLK_D_MARK, |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
/* - DU --------------------------------------------------------------------- */ |
|
|
|
|
static const unsigned int du0_rgb666_pins[] = { |
|
|
|
|
/* R[7:2], G[7:2], B[7:2] */ |
|
|
|
@ -2118,6 +2228,35 @@ static const unsigned int i2c4_e_pins[] = { |
|
|
|
|
static const unsigned int i2c4_e_mux[] = { |
|
|
|
|
I2C4_SCL_E_MARK, I2C4_SDA_E_MARK, |
|
|
|
|
}; |
|
|
|
|
/* - I2C5 ------------------------------------------------------------------- */ |
|
|
|
|
static const unsigned int i2c5_pins[] = { |
|
|
|
|
/* SCL, SDA */ |
|
|
|
|
RCAR_GP_PIN(4, 14), RCAR_GP_PIN(4, 15), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int i2c5_mux[] = { |
|
|
|
|
I2C5_SCL_MARK, I2C5_SDA_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int i2c5_b_pins[] = { |
|
|
|
|
/* SCL, SDA */ |
|
|
|
|
RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int i2c5_b_mux[] = { |
|
|
|
|
I2C5_SCL_B_MARK, I2C5_SDA_B_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int i2c5_c_pins[] = { |
|
|
|
|
/* SCL, SDA */ |
|
|
|
|
RCAR_GP_PIN(4, 31), RCAR_GP_PIN(4, 30), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int i2c5_c_mux[] = { |
|
|
|
|
I2C5_SCL_C_MARK, I2C5_SDA_C_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int i2c5_d_pins[] = { |
|
|
|
|
/* SCL, SDA */ |
|
|
|
|
RCAR_GP_PIN(3, 13), RCAR_GP_PIN(3, 14), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int i2c5_d_mux[] = { |
|
|
|
|
I2C5_SCL_D_MARK, I2C5_SDA_D_MARK, |
|
|
|
|
}; |
|
|
|
|
/* - INTC ------------------------------------------------------------------- */ |
|
|
|
|
static const unsigned int intc_irq0_pins[] = { |
|
|
|
|
/* IRQ0 */ |
|
|
|
@ -2436,6 +2575,109 @@ static const unsigned int msiof2_tx_b_pins[] = { |
|
|
|
|
static const unsigned int msiof2_tx_b_mux[] = { |
|
|
|
|
MSIOF2_TXD_B_MARK, |
|
|
|
|
}; |
|
|
|
|
/* - PWM -------------------------------------------------------------------- */ |
|
|
|
|
static const unsigned int pwm0_pins[] = { |
|
|
|
|
RCAR_GP_PIN(1, 14), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm0_mux[] = { |
|
|
|
|
PWM0_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm0_b_pins[] = { |
|
|
|
|
RCAR_GP_PIN(5, 3), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm0_b_mux[] = { |
|
|
|
|
PWM0_B_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm1_pins[] = { |
|
|
|
|
RCAR_GP_PIN(4, 5), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm1_mux[] = { |
|
|
|
|
PWM1_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm1_b_pins[] = { |
|
|
|
|
RCAR_GP_PIN(5, 10), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm1_b_mux[] = { |
|
|
|
|
PWM1_B_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm1_c_pins[] = { |
|
|
|
|
RCAR_GP_PIN(1, 18), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm1_c_mux[] = { |
|
|
|
|
PWM1_C_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm2_pins[] = { |
|
|
|
|
RCAR_GP_PIN(4, 10), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm2_mux[] = { |
|
|
|
|
PWM2_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm2_b_pins[] = { |
|
|
|
|
RCAR_GP_PIN(5, 17), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm2_b_mux[] = { |
|
|
|
|
PWM2_B_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm2_c_pins[] = { |
|
|
|
|
RCAR_GP_PIN(0, 13), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm2_c_mux[] = { |
|
|
|
|
PWM2_C_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm3_pins[] = { |
|
|
|
|
RCAR_GP_PIN(4, 13), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm3_mux[] = { |
|
|
|
|
PWM3_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm3_b_pins[] = { |
|
|
|
|
RCAR_GP_PIN(0, 16), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm3_b_mux[] = { |
|
|
|
|
PWM3_B_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm4_pins[] = { |
|
|
|
|
RCAR_GP_PIN(1, 3), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm4_mux[] = { |
|
|
|
|
PWM4_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm4_b_pins[] = { |
|
|
|
|
RCAR_GP_PIN(0, 21), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm4_b_mux[] = { |
|
|
|
|
PWM4_B_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm5_pins[] = { |
|
|
|
|
RCAR_GP_PIN(3, 30), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm5_mux[] = { |
|
|
|
|
PWM5_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm5_b_pins[] = { |
|
|
|
|
RCAR_GP_PIN(4, 0), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm5_b_mux[] = { |
|
|
|
|
PWM5_B_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm5_c_pins[] = { |
|
|
|
|
RCAR_GP_PIN(0, 10), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm5_c_mux[] = { |
|
|
|
|
PWM5_C_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm6_pins[] = { |
|
|
|
|
RCAR_GP_PIN(4, 8), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm6_mux[] = { |
|
|
|
|
PWM6_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm6_b_pins[] = { |
|
|
|
|
RCAR_GP_PIN(0, 7), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int pwm6_b_mux[] = { |
|
|
|
|
PWM6_B_MARK, |
|
|
|
|
}; |
|
|
|
|
/* - QSPI ------------------------------------------------------------------- */ |
|
|
|
|
static const unsigned int qspi_ctrl_pins[] = { |
|
|
|
|
/* SPCLK, SSL */ |
|
|
|
@ -3280,6 +3522,79 @@ static const unsigned int ssi9_ctrl_b_pins[] = { |
|
|
|
|
static const unsigned int ssi9_ctrl_b_mux[] = { |
|
|
|
|
SSI_SCK9_B_MARK, SSI_WS9_B_MARK, |
|
|
|
|
}; |
|
|
|
|
/* - TPU -------------------------------------------------------------------- */ |
|
|
|
|
static const unsigned int tpu_to0_pins[] = { |
|
|
|
|
RCAR_GP_PIN(3, 31), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int tpu_to0_mux[] = { |
|
|
|
|
TPUTO0_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int tpu_to0_b_pins[] = { |
|
|
|
|
RCAR_GP_PIN(3, 30), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int tpu_to0_b_mux[] = { |
|
|
|
|
TPUTO0_B_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int tpu_to0_c_pins[] = { |
|
|
|
|
RCAR_GP_PIN(1, 18), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int tpu_to0_c_mux[] = { |
|
|
|
|
TPUTO0_C_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int tpu_to1_pins[] = { |
|
|
|
|
RCAR_GP_PIN(4, 9), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int tpu_to1_mux[] = { |
|
|
|
|
TPUTO1_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int tpu_to1_b_pins[] = { |
|
|
|
|
RCAR_GP_PIN(4, 0), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int tpu_to1_b_mux[] = { |
|
|
|
|
TPUTO1_B_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int tpu_to1_c_pins[] = { |
|
|
|
|
RCAR_GP_PIN(4, 4), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int tpu_to1_c_mux[] = { |
|
|
|
|
TPUTO1_C_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int tpu_to2_pins[] = { |
|
|
|
|
RCAR_GP_PIN(1, 3), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int tpu_to2_mux[] = { |
|
|
|
|
TPUTO2_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int tpu_to2_b_pins[] = { |
|
|
|
|
RCAR_GP_PIN(1, 0), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int tpu_to2_b_mux[] = { |
|
|
|
|
TPUTO2_B_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int tpu_to2_c_pins[] = { |
|
|
|
|
RCAR_GP_PIN(0, 22), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int tpu_to2_c_mux[] = { |
|
|
|
|
TPUTO2_C_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int tpu_to3_pins[] = { |
|
|
|
|
RCAR_GP_PIN(1, 14), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int tpu_to3_mux[] = { |
|
|
|
|
TPUTO3_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int tpu_to3_b_pins[] = { |
|
|
|
|
RCAR_GP_PIN(1, 13), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int tpu_to3_b_mux[] = { |
|
|
|
|
TPUTO3_B_MARK, |
|
|
|
|
}; |
|
|
|
|
static const unsigned int tpu_to3_c_pins[] = { |
|
|
|
|
RCAR_GP_PIN(0, 21), |
|
|
|
|
}; |
|
|
|
|
static const unsigned int tpu_to3_c_mux[] = { |
|
|
|
|
TPUTO3_C_MARK, |
|
|
|
|
}; |
|
|
|
|
/* - USB0 ------------------------------------------------------------------- */ |
|
|
|
|
static const unsigned int usb0_pins[] = { |
|
|
|
|
RCAR_GP_PIN(5, 24), /* PWEN */ |
|
|
|
@ -3459,6 +3774,18 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { |
|
|
|
|
SH_PFC_PIN_GROUP(avb_mdio), |
|
|
|
|
SH_PFC_PIN_GROUP(avb_mii), |
|
|
|
|
SH_PFC_PIN_GROUP(avb_gmii), |
|
|
|
|
SH_PFC_PIN_GROUP(can0_data), |
|
|
|
|
SH_PFC_PIN_GROUP(can0_data_b), |
|
|
|
|
SH_PFC_PIN_GROUP(can0_data_c), |
|
|
|
|
SH_PFC_PIN_GROUP(can0_data_d), |
|
|
|
|
SH_PFC_PIN_GROUP(can1_data), |
|
|
|
|
SH_PFC_PIN_GROUP(can1_data_b), |
|
|
|
|
SH_PFC_PIN_GROUP(can1_data_c), |
|
|
|
|
SH_PFC_PIN_GROUP(can1_data_d), |
|
|
|
|
SH_PFC_PIN_GROUP(can_clk), |
|
|
|
|
SH_PFC_PIN_GROUP(can_clk_b), |
|
|
|
|
SH_PFC_PIN_GROUP(can_clk_c), |
|
|
|
|
SH_PFC_PIN_GROUP(can_clk_d), |
|
|
|
|
SH_PFC_PIN_GROUP(du0_rgb666), |
|
|
|
|
SH_PFC_PIN_GROUP(du0_rgb888), |
|
|
|
|
SH_PFC_PIN_GROUP(du0_clk0_out), |
|
|
|
@ -3523,6 +3850,10 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { |
|
|
|
|
SH_PFC_PIN_GROUP(i2c4_c), |
|
|
|
|
SH_PFC_PIN_GROUP(i2c4_d), |
|
|
|
|
SH_PFC_PIN_GROUP(i2c4_e), |
|
|
|
|
SH_PFC_PIN_GROUP(i2c5), |
|
|
|
|
SH_PFC_PIN_GROUP(i2c5_b), |
|
|
|
|
SH_PFC_PIN_GROUP(i2c5_c), |
|
|
|
|
SH_PFC_PIN_GROUP(i2c5_d), |
|
|
|
|
SH_PFC_PIN_GROUP(intc_irq0), |
|
|
|
|
SH_PFC_PIN_GROUP(intc_irq1), |
|
|
|
|
SH_PFC_PIN_GROUP(intc_irq2), |
|
|
|
@ -3567,6 +3898,23 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { |
|
|
|
|
SH_PFC_PIN_GROUP(msiof2_ss2_b), |
|
|
|
|
SH_PFC_PIN_GROUP(msiof2_rx_b), |
|
|
|
|
SH_PFC_PIN_GROUP(msiof2_tx_b), |
|
|
|
|
SH_PFC_PIN_GROUP(pwm0), |
|
|
|
|
SH_PFC_PIN_GROUP(pwm0_b), |
|
|
|
|
SH_PFC_PIN_GROUP(pwm1), |
|
|
|
|
SH_PFC_PIN_GROUP(pwm1_b), |
|
|
|
|
SH_PFC_PIN_GROUP(pwm1_c), |
|
|
|
|
SH_PFC_PIN_GROUP(pwm2), |
|
|
|
|
SH_PFC_PIN_GROUP(pwm2_b), |
|
|
|
|
SH_PFC_PIN_GROUP(pwm2_c), |
|
|
|
|
SH_PFC_PIN_GROUP(pwm3), |
|
|
|
|
SH_PFC_PIN_GROUP(pwm3_b), |
|
|
|
|
SH_PFC_PIN_GROUP(pwm4), |
|
|
|
|
SH_PFC_PIN_GROUP(pwm4_b), |
|
|
|
|
SH_PFC_PIN_GROUP(pwm5), |
|
|
|
|
SH_PFC_PIN_GROUP(pwm5_b), |
|
|
|
|
SH_PFC_PIN_GROUP(pwm5_c), |
|
|
|
|
SH_PFC_PIN_GROUP(pwm6), |
|
|
|
|
SH_PFC_PIN_GROUP(pwm6_b), |
|
|
|
|
SH_PFC_PIN_GROUP(qspi_ctrl), |
|
|
|
|
SH_PFC_PIN_GROUP(qspi_data2), |
|
|
|
|
SH_PFC_PIN_GROUP(qspi_data4), |
|
|
|
@ -3684,6 +4032,18 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { |
|
|
|
|
SH_PFC_PIN_GROUP(ssi9_ctrl), |
|
|
|
|
SH_PFC_PIN_GROUP(ssi9_data_b), |
|
|
|
|
SH_PFC_PIN_GROUP(ssi9_ctrl_b), |
|
|
|
|
SH_PFC_PIN_GROUP(tpu_to0), |
|
|
|
|
SH_PFC_PIN_GROUP(tpu_to0_b), |
|
|
|
|
SH_PFC_PIN_GROUP(tpu_to0_c), |
|
|
|
|
SH_PFC_PIN_GROUP(tpu_to1), |
|
|
|
|
SH_PFC_PIN_GROUP(tpu_to1_b), |
|
|
|
|
SH_PFC_PIN_GROUP(tpu_to1_c), |
|
|
|
|
SH_PFC_PIN_GROUP(tpu_to2), |
|
|
|
|
SH_PFC_PIN_GROUP(tpu_to2_b), |
|
|
|
|
SH_PFC_PIN_GROUP(tpu_to2_c), |
|
|
|
|
SH_PFC_PIN_GROUP(tpu_to3), |
|
|
|
|
SH_PFC_PIN_GROUP(tpu_to3_b), |
|
|
|
|
SH_PFC_PIN_GROUP(tpu_to3_c), |
|
|
|
|
SH_PFC_PIN_GROUP(usb0), |
|
|
|
|
SH_PFC_PIN_GROUP(usb1), |
|
|
|
|
VIN_DATA_PIN_GROUP(vin0_data, 24), |
|
|
|
@ -3731,6 +4091,47 @@ static const char * const avb_groups[] = { |
|
|
|
|
"avb_gmii", |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const char * const can0_groups[] = { |
|
|
|
|
"can0_data", |
|
|
|
|
"can0_data_b", |
|
|
|
|
"can0_data_c", |
|
|
|
|
"can0_data_d", |
|
|
|
|
/*
|
|
|
|
|
* Retained for backwards compatibility, use can_clk_groups in new |
|
|
|
|
* designs. |
|
|
|
|
*/ |
|
|
|
|
"can_clk", |
|
|
|
|
"can_clk_b", |
|
|
|
|
"can_clk_c", |
|
|
|
|
"can_clk_d", |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const char * const can1_groups[] = { |
|
|
|
|
"can1_data", |
|
|
|
|
"can1_data_b", |
|
|
|
|
"can1_data_c", |
|
|
|
|
"can1_data_d", |
|
|
|
|
/*
|
|
|
|
|
* Retained for backwards compatibility, use can_clk_groups in new |
|
|
|
|
* designs. |
|
|
|
|
*/ |
|
|
|
|
"can_clk", |
|
|
|
|
"can_clk_b", |
|
|
|
|
"can_clk_c", |
|
|
|
|
"can_clk_d", |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* can_clk_groups allows for independent configuration, use can_clk function |
|
|
|
|
* in new designs. |
|
|
|
|
*/ |
|
|
|
|
static const char * const can_clk_groups[] = { |
|
|
|
|
"can_clk", |
|
|
|
|
"can_clk_b", |
|
|
|
|
"can_clk_c", |
|
|
|
|
"can_clk_d", |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const char * const du0_groups[] = { |
|
|
|
|
"du0_rgb666", |
|
|
|
|
"du0_rgb888", |
|
|
|
@ -3828,6 +4229,13 @@ static const char * const i2c4_groups[] = { |
|
|
|
|
"i2c4_e", |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const char * const i2c5_groups[] = { |
|
|
|
|
"i2c5", |
|
|
|
|
"i2c5_b", |
|
|
|
|
"i2c5_c", |
|
|
|
|
"i2c5_d", |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const char * const intc_groups[] = { |
|
|
|
|
"intc_irq0", |
|
|
|
|
"intc_irq1", |
|
|
|
@ -3887,6 +4295,44 @@ static const char * const msiof2_groups[] = { |
|
|
|
|
"msiof2_tx_b", |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const char * const pwm0_groups[] = { |
|
|
|
|
"pwm0", |
|
|
|
|
"pwm0_b", |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const char * const pwm1_groups[] = { |
|
|
|
|
"pwm1", |
|
|
|
|
"pwm1_b", |
|
|
|
|
"pwm1_c", |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const char * const pwm2_groups[] = { |
|
|
|
|
"pwm2", |
|
|
|
|
"pwm2_b", |
|
|
|
|
"pwm2_c", |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const char * const pwm3_groups[] = { |
|
|
|
|
"pwm3", |
|
|
|
|
"pwm3_b", |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const char * const pwm4_groups[] = { |
|
|
|
|
"pwm4", |
|
|
|
|
"pwm4_b", |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const char * const pwm5_groups[] = { |
|
|
|
|
"pwm5", |
|
|
|
|
"pwm5_b", |
|
|
|
|
"pwm5_c", |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const char * const pwm6_groups[] = { |
|
|
|
|
"pwm6", |
|
|
|
|
"pwm6_b", |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const char * const qspi_groups[] = { |
|
|
|
|
"qspi_ctrl", |
|
|
|
|
"qspi_data2", |
|
|
|
@ -4067,6 +4513,21 @@ static const char * const ssi_groups[] = { |
|
|
|
|
"ssi9_ctrl_b", |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const char * const tpu_groups[] = { |
|
|
|
|
"tpu_to0", |
|
|
|
|
"tpu_to0_b", |
|
|
|
|
"tpu_to0_c", |
|
|
|
|
"tpu_to1", |
|
|
|
|
"tpu_to1_b", |
|
|
|
|
"tpu_to1_c", |
|
|
|
|
"tpu_to2", |
|
|
|
|
"tpu_to2_b", |
|
|
|
|
"tpu_to2_c", |
|
|
|
|
"tpu_to3", |
|
|
|
|
"tpu_to3_b", |
|
|
|
|
"tpu_to3_c", |
|
|
|
|
}; |
|
|
|
|
|
|
|
|
|
static const char * const usb0_groups[] = { |
|
|
|
|
"usb0", |
|
|
|
|
}; |
|
|
|
@ -4102,6 +4563,9 @@ static const char * const vin1_groups[] = { |
|
|
|
|
static const struct sh_pfc_function pinmux_functions[] = { |
|
|
|
|
SH_PFC_FUNCTION(audio_clk), |
|
|
|
|
SH_PFC_FUNCTION(avb), |
|
|
|
|
SH_PFC_FUNCTION(can0), |
|
|
|
|
SH_PFC_FUNCTION(can1), |
|
|
|
|
SH_PFC_FUNCTION(can_clk), |
|
|
|
|
SH_PFC_FUNCTION(du0), |
|
|
|
|
SH_PFC_FUNCTION(du1), |
|
|
|
|
SH_PFC_FUNCTION(eth), |
|
|
|
@ -4113,11 +4577,19 @@ static const struct sh_pfc_function pinmux_functions[] = { |
|
|
|
|
SH_PFC_FUNCTION(i2c2), |
|
|
|
|
SH_PFC_FUNCTION(i2c3), |
|
|
|
|
SH_PFC_FUNCTION(i2c4), |
|
|
|
|
SH_PFC_FUNCTION(i2c5), |
|
|
|
|
SH_PFC_FUNCTION(intc), |
|
|
|
|
SH_PFC_FUNCTION(mmc), |
|
|
|
|
SH_PFC_FUNCTION(msiof0), |
|
|
|
|
SH_PFC_FUNCTION(msiof1), |
|
|
|
|
SH_PFC_FUNCTION(msiof2), |
|
|
|
|
SH_PFC_FUNCTION(pwm0), |
|
|
|
|
SH_PFC_FUNCTION(pwm1), |
|
|
|
|
SH_PFC_FUNCTION(pwm2), |
|
|
|
|
SH_PFC_FUNCTION(pwm3), |
|
|
|
|
SH_PFC_FUNCTION(pwm4), |
|
|
|
|
SH_PFC_FUNCTION(pwm5), |
|
|
|
|
SH_PFC_FUNCTION(pwm6), |
|
|
|
|
SH_PFC_FUNCTION(qspi), |
|
|
|
|
SH_PFC_FUNCTION(scif0), |
|
|
|
|
SH_PFC_FUNCTION(scif1), |
|
|
|
@ -4139,6 +4611,7 @@ static const struct sh_pfc_function pinmux_functions[] = { |
|
|
|
|
SH_PFC_FUNCTION(sdhi1), |
|
|
|
|
SH_PFC_FUNCTION(sdhi2), |
|
|
|
|
SH_PFC_FUNCTION(ssi), |
|
|
|
|
SH_PFC_FUNCTION(tpu), |
|
|
|
|
SH_PFC_FUNCTION(usb0), |
|
|
|
|
SH_PFC_FUNCTION(usb1), |
|
|
|
|
SH_PFC_FUNCTION(vin0), |
|
|
|
|