@ -1,5 +1,5 @@
/*
* ( C ) Copyright 2010 - 2011
* ( C ) Copyright 2010 - 2014
* NVIDIA Corporation < www . nvidia . com >
*
* SPDX - License - Identifier : GPL - 2.0 +
@ -27,7 +27,7 @@ int tegra_get_chip(void)
/*
* This is undocumented , Chip ID is bits 15 : 8 of the register
* APB_MISC + 0x804 , and has value 0x20 for Tegra20 , 0x30 for
* Tegra30 , and 0x35 for T11 4.
* Tegra30 , 0x35 for T114 , and 0x40 for Tegra12 4.
*/
rev = ( readl ( & gp - > hidrev ) & HIDREV_CHIPID_MASK ) > > HIDREV_CHIPID_SHIFT ;
debug ( " %s: CHIPID is 0x%02X \n " , __func__ , rev ) ;
@ -84,7 +84,15 @@ int tegra_get_chip_sku(void)
return TEGRA_SOC_T114 ;
}
break ;
case CHIPID_TEGRA124 :
switch ( sku_id ) {
case SKU_ID_T124_ENG :
default :
return TEGRA_SOC_T124 ;
}
break ;
}
/* unknown chip/sku id */
printf ( " %s: ERROR: UNKNOWN CHIP/SKU ID COMBO (0x%02X/0x%02X) \n " ,
__func__ , chip_id , sku_id ) ;
@ -119,8 +127,8 @@ static u32 get_odmdata(void)
* ODMDATA is stored in the BCT in IRAM by the BootROM .
* The BCT start and size are stored in the BIT in IRAM .
* Read the data @ bct_start + ( bct_size - 12 ) . This works
* on T20 and T30 BCT s, which are locked down . If this changes
* in new chips ( T114 , etc . ) , we can revisit this algorithm .
* on BCTs for currently supported SoC s, which are locked down .
* If this changes in new chips , we can revisit this algorithm .
*/
u32 bct_start , odmdata ;