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spl: fpga: Implement fpga bistream loading with fpga_load

This patch partially reverts:
"spl: fit: Add support for loading FPGA bitstream"
(sha1: 26a642238bdecc53527142dc043b29e21c5cc94c)

There shouldn't be a need to call private spl_load_fpga_image function
because the whole sequence should be already handled by fpga framework.
If there is missing loading bistream by chunks it should be done via
fpga framework instead of having private hooks.
Also spl_load_fpga_image() weak function is not used anywhere and
opening a way for not reviewed hacks out of mainline U-Boot is not the
right way to go.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek 3 years ago
parent
commit
3313ae668e
1 changed files with 16 additions and 18 deletions
  1. 16 18
      common/spl/spl_fit.c

+ 16 - 18
common/spl/spl_fit.c

@@ -6,6 +6,7 @@
6 6
 
7 7
 #include <common.h>
8 8
 #include <errno.h>
9
+#include <fpga.h>
9 10
 #include <image.h>
10 11
 #include <linux/libfdt.h>
11 12
 #include <spl.h>
@@ -140,14 +141,6 @@ static int get_aligned_image_size(struct spl_load_info *info, int data_size,
140 141
 	return (data_size + info->bl_len - 1) / info->bl_len;
141 142
 }
142 143
 
143
-#ifdef CONFIG_SPL_FPGA_SUPPORT
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-__weak int spl_load_fpga_image(struct spl_load_info *info, size_t length,
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-			       int nr_sectors, int sector_offset)
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-{
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-	return 0;
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-}
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-#endif
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-
151 144
 /**
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  * spl_load_fit_image(): load the image described in a certain FIT node
153 146
  * @info:	points to information about the device to load data from
@@ -169,7 +162,7 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
169 162
 			      void *fit, ulong base_offset, int node,
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 			      struct spl_image_info *image_info)
171 164
 {
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-	int offset, sector_offset;
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+	int offset;
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 	size_t length;
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 	int len;
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 	ulong size;
@@ -217,16 +210,9 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
217 210
 
218 211
 		overhead = get_aligned_image_overhead(info, offset);
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 		nr_sectors = get_aligned_image_size(info, length, offset);
220
-		sector_offset = sector + get_aligned_image_offset(info, offset);
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-
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-#ifdef CONFIG_SPL_FPGA_SUPPORT
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-		if (type == IH_TYPE_FPGA) {
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-			return spl_load_fpga_image(info, length, nr_sectors,
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-						   sector_offset);
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-		}
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-#endif
228 213
 
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-		if (info->read(info, sector_offset,
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+		if (info->read(info,
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+			       sector + get_aligned_image_offset(info, offset),
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 			       nr_sectors, (void *)load_ptr) != nr_sectors)
231 217
 			return -EIO;
232 218
 
@@ -409,6 +395,18 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
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 			printf("%s: Cannot load the FPGA: %i\n", __func__, ret);
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 			return ret;
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 		}
398
+
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+		debug("FPGA bitstream at: %x, size: %x\n",
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+		      (u32)spl_image->load_addr, spl_image->size);
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+
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+		ret = fpga_load(0, (const void *)spl_image->load_addr,
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+				spl_image->size, BIT_FULL);
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+		if (ret) {
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+			printf("%s: Cannot load the image to the FPGA\n",
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+			       __func__);
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+			return ret;
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+		}
409
+
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 		puts("FPGA image loaded from FIT\n");
413 411
 		node = -1;
414 412
 	}