Allwinner A83T is new octa-core cortex-a7 SOC. This adds the basic dtsi, the clocks differs from earlier sun8i SOCs. This is not yet included in kernel. Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>master
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/* |
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* Copyright 2015 Vishnu Patekar |
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* |
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* Vishnu Patekar <vishnupatekar0510@gmail.com> |
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* |
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* This file is dual-licensed: you can use it either under the terms |
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* of the GPL or the X11 license, at your option. Note that this dual |
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* licensing only applies to this file, and not this project as a |
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* whole. |
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* |
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* a) This file is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of the |
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* License, or (at your option) any later version. |
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* |
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* This file is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* Or, alternatively, |
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* |
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* b) Permission is hereby granted, free of charge, to any person |
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* obtaining a copy of this software and associated documentation |
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* files (the "Software"), to deal in the Software without |
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* restriction, including without limitation the rights to use, |
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* copy, modify, merge, publish, distribute, sublicense, and/or |
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* sell copies of the Software, and to permit persons to whom the |
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* Software is furnished to do so, subject to the following |
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* conditions: |
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* |
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* The above copyright notice and this permission notice shall be |
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* included in all copies or substantial portions of the Software. |
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* |
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES |
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT |
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, |
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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* OTHER DEALINGS IN THE SOFTWARE. |
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|
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*/ |
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#include "skeleton.dtsi" |
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#include <dt-bindings/interrupt-controller/arm-gic.h> |
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#include <dt-bindings/pinctrl/sun4i-a10.h> |
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/ { |
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interrupt-parent = <&gic>; |
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chosen { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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ranges; |
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}; |
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cpus { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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cpu@0 { |
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compatible = "arm,cortex-a7"; |
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device_type = "cpu"; |
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reg = <0>; |
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}; |
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cpu@1 { |
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compatible = "arm,cortex-a7"; |
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device_type = "cpu"; |
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reg = <1>; |
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}; |
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cpu@2 { |
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compatible = "arm,cortex-a7"; |
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device_type = "cpu"; |
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reg = <2>; |
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}; |
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cpu@3 { |
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compatible = "arm,cortex-a7"; |
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device_type = "cpu"; |
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reg = <3>; |
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}; |
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cpu@100 { |
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compatible = "arm,cortex-a7"; |
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device_type = "cpu"; |
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reg = <0x100>; |
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}; |
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cpu@101 { |
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compatible = "arm,cortex-a7"; |
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device_type = "cpu"; |
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reg = <0x101>; |
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}; |
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cpu@102 { |
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compatible = "arm,cortex-a7"; |
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device_type = "cpu"; |
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reg = <0x102>; |
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}; |
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cpu@103 { |
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compatible = "arm,cortex-a7"; |
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device_type = "cpu"; |
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reg = <0x103>; |
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}; |
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}; |
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memory { |
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reg = <0x40000000 0x80000000>; |
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}; |
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timer { |
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compatible = "arm,armv7-timer"; |
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
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<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
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<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, |
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<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; |
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clock-frequency = <24000000>; |
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arm,cpu-registers-not-fw-configured; |
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}; |
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clocks { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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ranges; |
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osc24M: osc24M_clk { |
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#clock-cells = <0>; |
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compatible = "fixed-clock"; |
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clock-frequency = <24000000>; |
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clock-output-names = "osc24M"; |
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}; |
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osc32k: osc32k_clk { |
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#clock-cells = <0>; |
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compatible = "fixed-clock"; |
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clock-frequency = <32768>; |
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clock-output-names = "osc32k"; |
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}; |
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}; |
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soc@01c00000 { |
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compatible = "simple-bus"; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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ranges; |
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gic: interrupt-controller@01c81000 { |
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compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; |
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reg = <0x01c81000 0x1000>, |
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<0x01c82000 0x1000>, |
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<0x01c84000 0x2000>, |
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<0x01c86000 0x2000>; |
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interrupt-controller; |
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#interrupt-cells = <3>; |
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interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; |
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}; |
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pio: pinctrl@01c20800 { |
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compatible = "allwinner,sun8i-a83t-pinctrl"; |
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interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, |
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<GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; |
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reg = <0x01c20800 0x400>; |
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clocks = <&osc24M>; |
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gpio-controller; |
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interrupt-controller; |
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#interrupt-cells = <3>; |
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#gpio-cells = <3>; |
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i2c0_pins_a: i2c0@0 { |
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allwinner,pins = "PH0", "PH1"; |
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allwinner,function = "i2c0"; |
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allwinner,drive = <SUN4I_PINCTRL_10_MA>; |
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allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; |
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}; |
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i2c1_pins_a: i2c1@0 { |
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allwinner,pins = "PH2", "PH3"; |
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allwinner,function = "i2c1"; |
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allwinner,drive = <SUN4I_PINCTRL_10_MA>; |
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allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; |
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}; |
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i2c2_pins_a: i2c2@0 { |
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allwinner,pins = "PH4", "PH5"; |
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allwinner,function = "i2c2"; |
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allwinner,drive = <SUN4I_PINCTRL_10_MA>; |
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allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; |
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}; |
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mmc0_pins_a: mmc0@0 { |
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allwinner,pins = "PF0", "PF1", "PF2", |
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"PF3", "PF4", "PF5"; |
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allwinner,function = "mmc0"; |
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allwinner,drive = <SUN4I_PINCTRL_30_MA>; |
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allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; |
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}; |
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mmc1_pins_a: mmc1@0 { |
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allwinner,pins = "PG0", "PG1", "PG2", |
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"PG3", "PG4", "PG5"; |
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allwinner,function = "mmc1"; |
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allwinner,drive = <SUN4I_PINCTRL_30_MA>; |
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allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; |
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}; |
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mmc2_8bit_pins: mmc2_8bit { |
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allwinner,pins = "PC5", "PC6", "PC8", |
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"PC9", "PC10", "PC11", |
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"PC12", "PC13", "PC14", |
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"PC15"; |
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allwinner,function = "mmc2"; |
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allwinner,drive = <SUN4I_PINCTRL_30_MA>; |
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allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; |
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}; |
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uart0_pins_a: uart0@0 { |
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allwinner,pins = "PF2", "PF4"; |
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allwinner,function = "uart0"; |
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allwinner,drive = <SUN4I_PINCTRL_10_MA>; |
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allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; |
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}; |
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uart0_pins_b: uart0@1 { |
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allwinner,pins = "PB9", "PB10"; |
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allwinner,function = "uart0"; |
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allwinner,drive = <SUN4I_PINCTRL_10_MA>; |
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allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; |
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}; |
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}; |
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uart0: serial@01c28000 { |
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compatible = "snps,dw-apb-uart"; |
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reg = <0x01c28000 0x400>; |
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interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; |
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reg-shift = <2>; |
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reg-io-width = <4>; |
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clocks = <&osc24M>; |
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status = "disabled"; |
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}; |
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}; |
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}; |
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