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@ -13,13 +13,29 @@ |
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#include "ddrphy-regs.h" |
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#include "umc-regs.h" |
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enum dram_freq { |
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DRAM_FREQ_1333M, |
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DRAM_FREQ_1600M, |
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DRAM_FREQ_NR, |
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}; |
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enum dram_size { |
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DRAM_SZ_128M, |
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DRAM_SZ_256M, |
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DRAM_SZ_512M, |
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DRAM_SZ_NR, |
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}; |
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static u32 umc_spcctla[DRAM_SZ_NR] = {0x00240512, 0x00350512}; |
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static u32 umc_cmdctla[DRAM_FREQ_NR] = {0x55990b11, 0x66bb0f17}; |
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static u32 umc_cmdctla_plus[DRAM_FREQ_NR] = {0x45990b11, 0x46bb0f17}; |
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static u32 umc_cmdctlb[DRAM_FREQ_NR] = {0x16958944, 0x18c6ab44}; |
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static u32 umc_cmdctlb_plus[DRAM_FREQ_NR] = {0x16958924, 0x18c6ab24}; |
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static u32 umc_spcctla[DRAM_FREQ_NR][DRAM_SZ_NR] = { |
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{0x00240512, 0x00350512, 0x00000000}, /* no data for 1333MHz,128MB */ |
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{0x002b0617, 0x003f0617, 0x00670617}, |
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}; |
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static u32 umc_spcctlb[DRAM_FREQ_NR] = {0x00ff0006, 0x00ff0008}; |
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static u32 umc_rdatactl[DRAM_FREQ_NR] = {0x000a00ac, 0x000c00ac}; |
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static void umc_start_ssif(void __iomem *ssif_base) |
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{ |
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@ -58,8 +74,21 @@ static void umc_start_ssif(void __iomem *ssif_base) |
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static int umc_dramcont_init(void __iomem *dramcont, void __iomem *ca_base, |
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int size, int freq, bool ddr3plus) |
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{ |
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enum dram_freq freq_e; |
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enum dram_size size_e; |
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switch (freq) { |
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case 1333: |
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freq_e = DRAM_FREQ_1333M; |
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break; |
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case 1600: |
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freq_e = DRAM_FREQ_1600M; |
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break; |
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default: |
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pr_err("unsupported DRAM frequency %d MHz\n", freq); |
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return -EINVAL; |
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} |
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switch (size) { |
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case 0: |
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return 0; |
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@ -69,16 +98,21 @@ static int umc_dramcont_init(void __iomem *dramcont, void __iomem *ca_base, |
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case 2: |
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size_e = DRAM_SZ_256M; |
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break; |
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case 4: |
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size_e = DRAM_SZ_512M; |
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break; |
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default: |
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pr_err("unsupported DRAM size\n"); |
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return -EINVAL; |
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} |
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writel(ddr3plus ? 0x45990b11 : 0x55990b11, dramcont + UMC_CMDCTLA); |
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writel(ddr3plus ? 0x16958924 : 0x16958944, dramcont + UMC_CMDCTLB); |
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writel(umc_spcctla[size_e], dramcont + UMC_SPCCTLA); |
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writel(0x00ff0006, dramcont + UMC_SPCCTLB); |
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writel(0x000a00ac, dramcont + UMC_RDATACTL_D0); |
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writel((ddr3plus ? umc_cmdctla_plus : umc_cmdctla)[freq_e], |
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dramcont + UMC_CMDCTLA); |
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writel((ddr3plus ? umc_cmdctlb_plus : umc_cmdctlb)[freq_e], |
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dramcont + UMC_CMDCTLB); |
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writel(umc_spcctla[freq_e][size_e], dramcont + UMC_SPCCTLA); |
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writel(umc_spcctlb[freq_e], dramcont + UMC_SPCCTLB); |
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writel(umc_rdatactl[freq_e], dramcont + UMC_RDATACTL_D0); |
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writel(0x04060806, dramcont + UMC_WDATACTL_D0); |
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writel(0x04a02000, dramcont + UMC_DATASET); |
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writel(0x00000000, ca_base + 0x2300); |
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