From 3eace37e5098c7f020a45a3672c062cd4ea199a0 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Thu, 6 Apr 2017 12:47:04 -0600 Subject: [PATCH] arm: freescale: Rename initdram() to fsl_initdram() This function name shadows a global name but is in fact different. This is very confusing. Rename it to help with the following refactoring. Signed-off-by: Simon Glass --- arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 3 ++- board/freescale/ls1021aqds/ddr.c | 2 +- board/freescale/ls1021aqds/ls1021aqds.c | 2 +- board/freescale/ls1043aqds/ddr.c | 2 +- board/freescale/ls1043aqds/ls1043aqds.c | 3 ++- board/freescale/ls1043ardb/ddr.c | 2 +- board/freescale/ls1046aqds/ddr.c | 2 +- board/freescale/ls1046aqds/ls1046aqds.c | 3 ++- board/freescale/ls1046ardb/ddr.c | 2 +- board/freescale/ls2080a/ddr.c | 3 ++- board/freescale/ls2080aqds/ddr.c | 2 +- board/freescale/ls2080ardb/ddr.c | 2 +- include/fsl_ddr_sdram.h | 8 ++++++++ 13 files changed, 24 insertions(+), 12 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index ea6c090..d446527 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include @@ -876,7 +877,7 @@ void update_early_mmu_table(void) __weak int dram_init(void) { - initdram(); + fsl_initdram(); #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) /* This will break-before-make MMU for DDR */ update_early_mmu_table(); diff --git a/board/freescale/ls1021aqds/ddr.c b/board/freescale/ls1021aqds/ddr.c index 3bf2e49..d16a69f 100644 --- a/board/freescale/ls1021aqds/ddr.c +++ b/board/freescale/ls1021aqds/ddr.c @@ -164,7 +164,7 @@ void board_mem_sleep_setup(void) } #endif -int initdram(void) +int fsl_initdram(void) { phys_size_t dram_size; diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c index 909fc56..d81d8ab 100644 --- a/board/freescale/ls1021aqds/ls1021aqds.c +++ b/board/freescale/ls1021aqds/ls1021aqds.c @@ -162,7 +162,7 @@ int dram_init(void) * before accessing DDR SPD. */ select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); - return initdram(); + return fsl_initdram(); } #ifdef CONFIG_FSL_ESDHC diff --git a/board/freescale/ls1043aqds/ddr.c b/board/freescale/ls1043aqds/ddr.c index db350e2..2643f5b 100644 --- a/board/freescale/ls1043aqds/ddr.c +++ b/board/freescale/ls1043aqds/ddr.c @@ -108,7 +108,7 @@ found: #endif } -int initdram(void) +int fsl_initdram(void) { phys_size_t dram_size; diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c index 538bba5..2df63e4 100644 --- a/board/freescale/ls1043aqds/ls1043aqds.c +++ b/board/freescale/ls1043aqds/ls1043aqds.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -153,7 +154,7 @@ int dram_init(void) * before accessing DDR SPD. */ select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); - initdram(); + fsl_initdram(); #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) /* This will break-before-make MMU for DDR */ update_early_mmu_table(); diff --git a/board/freescale/ls1043ardb/ddr.c b/board/freescale/ls1043ardb/ddr.c index 2f133db..36d27ec 100644 --- a/board/freescale/ls1043ardb/ddr.c +++ b/board/freescale/ls1043ardb/ddr.c @@ -170,7 +170,7 @@ int fsl_ddr_get_dimm_params(dimm_params_t *pdimm, } #endif -int initdram(void) +int fsl_initdram(void) { phys_size_t dram_size; diff --git a/board/freescale/ls1046aqds/ddr.c b/board/freescale/ls1046aqds/ddr.c index 481ed44..d37af34 100644 --- a/board/freescale/ls1046aqds/ddr.c +++ b/board/freescale/ls1046aqds/ddr.c @@ -92,7 +92,7 @@ found: popts->cpo_sample = 0x70; } -int initdram(void) +int fsl_initdram(void) { phys_size_t dram_size; diff --git a/board/freescale/ls1046aqds/ls1046aqds.c b/board/freescale/ls1046aqds/ls1046aqds.c index 6238852..69fc15b 100644 --- a/board/freescale/ls1046aqds/ls1046aqds.c +++ b/board/freescale/ls1046aqds/ls1046aqds.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -149,7 +150,7 @@ int dram_init(void) * before accessing DDR SPD. */ select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); - initdram(); + fsl_initdram(); #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) /* This will break-before-make MMU for DDR */ update_early_mmu_table(); diff --git a/board/freescale/ls1046ardb/ddr.c b/board/freescale/ls1046ardb/ddr.c index d1290e2..a16f7bc 100644 --- a/board/freescale/ls1046ardb/ddr.c +++ b/board/freescale/ls1046ardb/ddr.c @@ -96,7 +96,7 @@ found: popts->cpo_sample = 0x70; } -int initdram(void) +int fsl_initdram(void) { phys_size_t dram_size; diff --git a/board/freescale/ls2080a/ddr.c b/board/freescale/ls2080a/ddr.c index d340c41..9d176d3 100644 --- a/board/freescale/ls2080a/ddr.c +++ b/board/freescale/ls2080a/ddr.c @@ -158,7 +158,8 @@ int fsl_ddr_get_dimm_params(dimm_params_t *pdimm, return 0; } #endif -int initdram(void) + +int fsl_initdram(void) { puts("Initializing DDR...."); diff --git a/board/freescale/ls2080aqds/ddr.c b/board/freescale/ls2080aqds/ddr.c index 1e9145d..22a2676 100644 --- a/board/freescale/ls2080aqds/ddr.c +++ b/board/freescale/ls2080aqds/ddr.c @@ -155,7 +155,7 @@ found: } } -int initdram(void) +int fsl_initdram(void) { #if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD) gd->ram_size = fsl_ddr_sdram_size(); diff --git a/board/freescale/ls2080ardb/ddr.c b/board/freescale/ls2080ardb/ddr.c index 029ea61..7002dfb 100644 --- a/board/freescale/ls2080ardb/ddr.c +++ b/board/freescale/ls2080ardb/ddr.c @@ -158,7 +158,7 @@ found: } } -int initdram(void) +int fsl_initdram(void) { #if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD) gd->ram_size = fsl_ddr_sdram_size(); diff --git a/include/fsl_ddr_sdram.h b/include/fsl_ddr_sdram.h index b8de46b..6a1f04b 100644 --- a/include/fsl_ddr_sdram.h +++ b/include/fsl_ddr_sdram.h @@ -477,4 +477,12 @@ typedef struct fixed_ddr_parm{ int max_freq; fsl_ddr_cfg_regs_t *ddr_settings; } fixed_ddr_parm_t; + +/** + * fsl_initdram() - Set up the SDRAM + * + * @return 0 if OK, -ve on error + */ +int fsl_initdram(void); + #endif