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@ -104,9 +104,9 @@ int arch_cpu_init_dm(void) |
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/* TODO(sjg@chromium.org): Get rid of gd->hose */ |
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gd->hose = hose; |
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ret = uclass_first_device(UCLASS_LPC, &dev); |
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if (!dev) |
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return -ENODEV; |
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ret = uclass_first_device_err(UCLASS_LPC, &dev); |
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if (ret) |
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return ret; |
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/*
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* We should do as little as possible before the serial console is |
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@ -210,11 +210,9 @@ int print_cpuinfo(void) |
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/* Early chipset init required before RAM init can work */ |
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uclass_first_device(UCLASS_NORTHBRIDGE, &dev); |
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ret = uclass_first_device(UCLASS_LPC, &lpc); |
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ret = uclass_first_device_err(UCLASS_LPC, &lpc); |
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if (ret) |
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return ret; |
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if (!dev) |
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return -ENODEV; |
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/* Cause the SATA device to do its early init */ |
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uclass_first_device(UCLASS_DISK, &dev); |
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@ -236,11 +234,9 @@ int print_cpuinfo(void) |
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post_code(POST_EARLY_INIT); |
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/* Enable SPD ROMs and DDR-III DRAM */ |
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ret = uclass_first_device(UCLASS_I2C, &dev); |
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ret = uclass_first_device_err(UCLASS_I2C, &dev); |
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if (ret) |
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return ret; |
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if (!dev) |
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return -ENODEV; |
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/* Prepare USB controller early in S3 resume */ |
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if (boot_mode == PEI_BOOT_RESUME) |
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