It is no longer linked into U-Boot; its sources are now located in the kernel tree. Signed-off-by: Jon Loeliger <jdl@freescale.com>master
Jon Loeliger
19 years ago
parent
8fc8bd2cc4
commit
40bc83559d
@ -1,388 +0,0 @@ |
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/* |
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* MPC8641 HPCN Device Tree Source |
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* |
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* Copyright 2006 Freescale Semiconductor Inc. |
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* |
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* This program is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License as published by the |
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* Free Software Foundation; either version 2 of the License, or (at your |
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* option) any later version. |
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*/ |
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|
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|
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/ { |
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model = "MPC8641HPCN"; |
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compatible = "mpc86xx"; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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linux,phandle = <100>; |
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|
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cpus { |
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#cpus = <2>; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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linux,phandle = <200>; |
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|
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PowerPC,8641@0 { |
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device_type = "cpu"; |
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reg = <0>; |
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d-cache-line-size = <20>; // 32 bytes |
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i-cache-line-size = <20>; // 32 bytes |
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d-cache-size = <8000>; // L1, 32K |
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i-cache-size = <8000>; // L1, 32K |
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timebase-frequency = <0>; // 33 MHz, from uboot |
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bus-frequency = <0>; // From uboot |
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clock-frequency = <0>; // From uboot |
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32-bit; |
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linux,phandle = <201>; |
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linux,boot-cpu; |
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}; |
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PowerPC,8641@1 { |
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device_type = "cpu"; |
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reg = <1>; |
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d-cache-line-size = <20>; // 32 bytes |
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i-cache-line-size = <20>; // 32 bytes |
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d-cache-size = <8000>; // L1, 32K |
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i-cache-size = <8000>; // L1, 32K |
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timebase-frequency = <0>; // 33 MHz, from uboot |
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bus-frequency = <0>; // From uboot |
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clock-frequency = <0>; // From uboot |
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32-bit; |
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linux,phandle = <202>; |
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}; |
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}; |
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|
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memory { |
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device_type = "memory"; |
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linux,phandle = <300>; |
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reg = <00000000 40000000>; // 1G at 0x0 |
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}; |
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|
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soc8641@f8000000 { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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#interrupt-cells = <2>; |
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device_type = "soc"; |
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ranges = <0 f8000000 00100000>; |
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reg = <f8000000 00100000>; // CCSRBAR 1M |
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bus-frequency = <0>; |
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|
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i2c@3000 { |
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device_type = "i2c"; |
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compatible = "fsl-i2c"; |
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reg = <3000 100>; |
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interrupts = <2b 2>; |
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interrupt-parent = <40000>; |
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dfsrr; |
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}; |
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|
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i2c@3100 { |
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device_type = "i2c"; |
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compatible = "fsl-i2c"; |
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reg = <3100 100>; |
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interrupts = <2b 2>; |
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interrupt-parent = <40000>; |
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dfsrr; |
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}; |
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|
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mdio@24520 { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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device_type = "mdio"; |
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compatible = "gianfar"; |
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reg = <24520 20>; |
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linux,phandle = <24520>; |
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ethernet-phy@0 { |
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linux,phandle = <2452000>; |
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interrupt-parent = <40000>; |
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interrupts = <4a 1>; |
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reg = <0>; |
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device_type = "ethernet-phy"; |
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}; |
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ethernet-phy@1 { |
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linux,phandle = <2452001>; |
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interrupt-parent = <40000>; |
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interrupts = <4a 1>; |
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reg = <1>; |
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device_type = "ethernet-phy"; |
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}; |
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ethernet-phy@2 { |
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linux,phandle = <2452002>; |
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interrupt-parent = <40000>; |
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interrupts = <4a 1>; |
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reg = <2>; |
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device_type = "ethernet-phy"; |
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}; |
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ethernet-phy@3 { |
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linux,phandle = <2452003>; |
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interrupt-parent = <40000>; |
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interrupts = <4a 1>; |
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reg = <3>; |
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device_type = "ethernet-phy"; |
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}; |
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}; |
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ethernet@24000 { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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device_type = "network"; |
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model = "TSEC"; |
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compatible = "gianfar"; |
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reg = <24000 1000>; |
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address = [ 00 E0 0C 00 73 00 ]; |
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interrupts = <1d 2 1e 2 22 2>; |
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interrupt-parent = <40000>; |
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phy-handle = <2452000>; |
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}; |
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ethernet@25000 { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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device_type = "network"; |
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model = "TSEC"; |
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compatible = "gianfar"; |
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reg = <25000 1000>; |
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address = [ 00 E0 0C 00 73 01 ]; |
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interrupts = <23 2 24 2 28 2>; |
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interrupt-parent = <40000>; |
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phy-handle = <2452001>; |
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}; |
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ethernet@26000 { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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device_type = "network"; |
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model = "TSEC"; |
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compatible = "gianfar"; |
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reg = <26000 1000>; |
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address = [ 00 E0 0C 00 02 FD ]; |
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interrupts = <1F 2 20 2 21 2>; |
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interrupt-parent = <40000>; |
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phy-handle = <2452002>; |
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}; |
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ethernet@27000 { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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device_type = "network"; |
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model = "TSEC"; |
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compatible = "gianfar"; |
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reg = <27000 1000>; |
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address = [ 00 E0 0C 00 03 FD ]; |
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interrupts = <25 2 26 2 27 2>; |
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interrupt-parent = <40000>; |
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phy-handle = <2452003>; |
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}; |
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serial@4500 { |
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device_type = "serial"; |
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compatible = "ns16550"; |
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reg = <4500 100>; |
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clock-frequency = <0>; |
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interrupts = <2a 2>; |
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interrupt-parent = <40000>; |
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}; |
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serial@4600 { |
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device_type = "serial"; |
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compatible = "ns16550"; |
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reg = <4600 100>; |
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clock-frequency = <0>; |
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interrupts = <1c 2>; |
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interrupt-parent = <40000>; |
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}; |
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pci@8000 { |
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compatible = "86xx"; |
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device_type = "pci"; |
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linux,phandle = <8000>; |
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#interrupt-cells = <1>; |
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#size-cells = <2>; |
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#address-cells = <3>; |
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reg = <8000 1000>; |
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bus-range = <0 fe>; |
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ranges = <02000000 0 80000000 80000000 0 20000000 |
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01000000 0 00000000 e2000000 0 00100000>; |
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clock-frequency = <1fca055>; |
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interrupt-parent = <40000>; |
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interrupts = <18 2>; |
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interrupt-map-mask = <f800 0 0 7>; |
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interrupt-map = < |
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/* IDSEL 0x11 */ |
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8800 0 0 1 4d0 3 2 |
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8800 0 0 2 4d0 4 2 |
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8800 0 0 3 4d0 5 2 |
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8800 0 0 4 4d0 6 2 |
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/* IDSEL 0x12 */ |
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9000 0 0 1 4d0 4 2 |
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9000 0 0 2 4d0 5 2 |
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9000 0 0 3 4d0 6 2 |
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9000 0 0 4 4d0 3 2 |
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/* IDSEL 0x13 */ |
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9800 0 0 1 4d0 0 0 |
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9800 0 0 2 4d0 0 0 |
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9800 0 0 3 4d0 0 0 |
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9800 0 0 4 4d0 0 0 |
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/* IDSEL 0x14 */ |
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a000 0 0 1 4d0 0 0 |
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a000 0 0 2 4d0 0 0 |
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a000 0 0 3 4d0 0 0 |
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a000 0 0 4 4d0 0 0 |
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/* IDSEL 0x15 */ |
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a800 0 0 1 4d0 0 0 |
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a800 0 0 2 4d0 0 0 |
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a800 0 0 3 4d0 0 0 |
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a800 0 0 4 4d0 0 0 |
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/* IDSEL 0x16 */ |
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b000 0 0 1 4d0 0 0 |
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b000 0 0 2 4d0 0 0 |
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b000 0 0 3 4d0 0 0 |
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b000 0 0 4 4d0 0 0 |
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/* IDSEL 0x17 */ |
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b800 0 0 1 4d0 0 0 |
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b800 0 0 2 4d0 0 0 |
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b800 0 0 3 4d0 0 0 |
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b800 0 0 4 4d0 0 0 |
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/* IDSEL 0x18 */ |
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c000 0 0 1 4d0 0 0 |
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c000 0 0 2 4d0 0 0 |
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c000 0 0 3 4d0 0 0 |
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c000 0 0 4 4d0 0 0 |
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/* IDSEL 0x19 */ |
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c800 0 0 1 4d0 0 0 |
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c800 0 0 2 4d0 0 0 |
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c800 0 0 3 4d0 0 0 |
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c800 0 0 4 4d0 0 0 |
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/* IDSEL 0x1a */ |
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d000 0 0 1 4d0 6 2 |
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d000 0 0 2 4d0 3 2 |
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d000 0 0 3 4d0 4 2 |
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d000 0 0 4 4d0 5 2 |
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/* IDSEL 0x1b */ |
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d800 0 0 1 4d0 5 2 |
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d800 0 0 2 4d0 0 0 |
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d800 0 0 3 4d0 0 0 |
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d800 0 0 4 4d0 0 0 |
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/* IDSEL 0x1c */ |
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e000 0 0 1 4d0 9 2 |
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e000 0 0 2 4d0 a 2 |
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e000 0 0 3 4d0 c 2 |
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e000 0 0 4 4d0 7 2 |
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/* IDSEL 0x1d */ |
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e800 0 0 1 4d0 9 2 |
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e800 0 0 2 4d0 a 2 |
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e800 0 0 3 4d0 b 2 |
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e800 0 0 4 4d0 0 0 |
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/* IDSEL 0x1e */ |
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f000 0 0 1 4d0 c 2 |
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f000 0 0 2 4d0 0 0 |
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f000 0 0 3 4d0 0 0 |
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f000 0 0 4 4d0 0 0 |
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/* IDSEL 0x1f */ |
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f800 0 0 1 4d0 6 2 |
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f800 0 0 2 4d0 0 0 |
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f800 0 0 3 4d0 0 0 |
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f800 0 0 4 4d0 0 0 |
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>; |
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i8259@4d0 { |
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linux,phandle = <4d0>; |
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clock-frequency = <0>; |
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interrupt-controller; |
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device_type = "interrupt-controller"; |
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#address-cells = <0>; |
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#interrupt-cells = <2>; |
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built-in; |
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compatible = "chrp,iic"; |
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big-endian; |
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interrupts = <49 2>; |
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interrupt-parent = <40000>; |
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}; |
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}; |
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pic@40000 { |
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linux,phandle = <40000>; |
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clock-frequency = <0>; |
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interrupt-controller; |
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#address-cells = <0>; |
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#interrupt-cells = <2>; |
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reg = <40000 40000>; |
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built-in; |
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compatible = "chrp,open-pic"; |
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device_type = "open-pic"; |
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big-endian; |
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interrupts = < |
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10 2 11 2 12 2 13 2 |
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14 2 15 2 16 2 17 2 |
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18 2 19 2 1a 2 1b 2 |
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1c 2 1d 2 1e 2 1f 2 |
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20 2 21 2 22 2 23 2 |
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24 2 25 2 26 2 27 2 |
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28 2 29 2 2a 2 2b 2 |
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2c 2 2d 2 2e 2 2f 2 |
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30 2 31 2 32 2 33 2 |
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34 2 35 2 36 2 37 2 |
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38 2 39 2 2a 2 3b 2 |
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3c 2 3d 2 3e 2 3f 2 |
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48 1 49 2 4a 1 |
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>; |
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interrupt-parent = <40000>; |
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}; |
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rio@c0000 { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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device_type = "rio"; |
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model = "pq38"; |
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compatible = "85xx"; |
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ranges = <0 c0000000 20000000>; |
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reg = <c0000 13000>; |
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linux,phandle = <c0000>; |
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}; |
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rio_message@d3000 { |
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device_type = "network"; |
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compatible = "85xx"; |
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linux,phandle = <d3000>; |
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reg = <d3000 d3100>; |
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interrupts = <35 2 36 2>; |
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interrupt-parent = <40000>; |
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}; |
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rio_message@d3100 { |
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device_type = "network"; |
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compatible = "85xx"; |
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linux,phandle = <d3100>; |
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reg = <d3100 d3200>; |
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interrupts = <37 2 38 2>; |
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interrupt-parent = <40000>; |
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}; |
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rio_doorbell@d3400 { |
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device_type = "doorbell"; |
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compatible = "85xx"; |
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linux,phandle = <d3400>; |
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reg = <d3400 d34e0>; |
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interrupts = <31 2 32 2>; |
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interrupt-parent = <40000>; |
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}; |
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rio_portwrite@d34e0 { |
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device_type = "portwrite"; |
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compatible = "85xx"; |
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linux,phandle = <d34e0>; |
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reg = <d34e0 d3500>; |
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interrupts = <30 2>; |
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interrupt-parent = <40000>; |
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}; |
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}; |
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}; |
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|
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