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@ -148,9 +148,43 @@ static struct phy_driver ksz9021_driver = { |
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}; |
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#endif |
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/*
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/**
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* KSZ9031 |
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*/ |
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/* PHY Registers */ |
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#define MII_KSZ9031_MMD_ACCES_CTRL 0x0d |
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#define MII_KSZ9031_MMD_REG_DATA 0x0e |
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/* Accessors to extended registers*/ |
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int ksz9031_phy_extended_write(struct phy_device *phydev, |
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int devaddr, int regnum, u16 mode, u16 val) |
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{ |
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/*select register addr for mmd*/ |
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phy_write(phydev, MDIO_DEVAD_NONE, |
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MII_KSZ9031_MMD_ACCES_CTRL, devaddr); |
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/*select register for mmd*/ |
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phy_write(phydev, MDIO_DEVAD_NONE, |
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MII_KSZ9031_MMD_REG_DATA, regnum); |
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/*setup mode*/ |
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phy_write(phydev, MDIO_DEVAD_NONE, |
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MII_KSZ9031_MMD_ACCES_CTRL, (mode | devaddr)); |
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/*write the value*/ |
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return phy_write(phydev, MDIO_DEVAD_NONE, |
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MII_KSZ9031_MMD_REG_DATA, val); |
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} |
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int ksz9031_phy_extended_read(struct phy_device *phydev, int devaddr, |
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int regnum, u16 mode) |
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{ |
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phy_write(phydev, MDIO_DEVAD_NONE, |
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MII_KSZ9031_MMD_ACCES_CTRL, devaddr); |
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phy_write(phydev, MDIO_DEVAD_NONE, |
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MII_KSZ9031_MMD_REG_DATA, regnum); |
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phy_write(phydev, MDIO_DEVAD_NONE, |
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MII_KSZ9031_MMD_ACCES_CTRL, (devaddr | mode)); |
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return phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZ9031_MMD_REG_DATA); |
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} |
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static struct phy_driver ksz9031_driver = { |
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.name = "Micrel ksz9031", |
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.uid = 0x221620, |
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