Coding style cleanup, update CHANGELOG.

Signed-off-by: Wolfgang Denk <wd@denx.de>
master
Wolfgang Denk 16 years ago
parent 84bc72d90c
commit 455ae7e87f
  1. 2668
      CHANGELOG
  2. 1
      board/afeb9260/partition.c
  3. 2
      cpu/mcf52x2/cpu_init.c
  4. 2
      cpu/mpc86xx/start.S
  5. 1
      cpu/ppc4xx/cpu.c
  6. 1
      drivers/i2c/soft_i2c.c
  7. 2
      drivers/mtd/ubi/crc32.c
  8. 2
      drivers/mtd/ubi/io.c
  9. 2
      include/configs/PMC440.h
  10. 1
      include/configs/afeb9260.h
  11. 8
      include/linux/crc32.h
  12. 2
      include/linux/mtd/ubi.h

File diff suppressed because it is too large Load Diff

@ -34,4 +34,3 @@ dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
{0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
{0x00008400, 0x00041FFF, FLAG_PROTECT_CLEAR, 0, "U-Boot"},
};

@ -131,7 +131,7 @@ void cpu_init_f(void)
mbar2_writeByte(MCFSIM_INTBASE, 0x40); /* Base interrupts at 64 */
mbar2_writeByte(MCFSIM_SPURVEC, 0x00);
/*mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); *//* Enable a 1 cycle pre-drive cycle on CS1 */
/*mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); */ /* Enable a 1 cycle pre-drive cycle on CS1 */
/* FlexBus Chipselect */
init_fbcs();

@ -982,5 +982,3 @@ unlock_ram_in_cache:
blr
#endif
#endif

@ -706,4 +706,3 @@ int cpu_eth_init(bd_t *bis)
#endif
return 0;
}

@ -434,4 +434,3 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
send_stop();
return(failures);
}

@ -97,7 +97,7 @@ u32 crc32_le(u32 crc, unsigned char const *p, size_t len)
# else
# define DO_CRC(x) crc = tab[ ((crc >> 24) ^ (x)) & 255] ^ (crc<<8)
# endif
//printf("Crc32_le crc=%x\n",crc);
/* printf("Crc32_le crc=%x\n",crc); */
crc = __cpu_to_le32(crc);
/* Align it */
if((((long)b)&3 && len)){

@ -186,7 +186,7 @@ retry:
if (read != len && err == -EBADMSG) {
ubi_assert(0);
printk("%s[%d] not here\n", __func__, __LINE__);
// err = -EIO;
/* err = -EIO; */
}
} else {
ubi_assert(len == read);

@ -490,7 +490,7 @@
#endif
/* Memory Bank 1 (RESET) initialization */
#define CONFIG_SYS_EBC_PB1AP 0x7f817200 //0x03017200
#define CONFIG_SYS_EBC_PB1AP 0x7f817200 /* 0x03017200 */
#define CONFIG_SYS_EBC_PB1CR (CONFIG_SYS_RESET_BASE | 0x1c000)
/* Memory Bank 4 (FPGA / 32Bit) initialization */

@ -167,4 +167,3 @@
#endif
#endif

@ -6,10 +6,10 @@
#define _LINUX_CRC32_H
#include <linux/types.h>
//#include <linux/bitrev.h>
/* #include <linux/bitrev.h> */
extern u32 crc32_le(u32 crc, unsigned char const *p, size_t len);
//extern u32 crc32_be(u32 crc, unsigned char const *p, size_t len);
/* extern u32 crc32_be(u32 crc, unsigned char const *p, size_t len); */
#define crc32(seed, data, length) crc32_le(seed, (unsigned char const *)data, length)
@ -21,7 +21,7 @@ extern u32 crc32_le(u32 crc, unsigned char const *p, size_t len);
* is in bit nr 0], thus it must be reversed before use. Except for
* nics that bit swap the result internally...
*/
//#define ether_crc(length, data) bitrev32(crc32_le(~0, data, length))
//#define ether_crc_le(length, data) crc32_le(~0, data, length)
/* #define ether_crc(length, data) bitrev32(crc32_le(~0, data, length)) */
/* #define ether_crc_le(length, data) crc32_le(~0, data, length) */
#endif /* _LINUX_CRC32_H */

@ -21,7 +21,7 @@
#ifndef __LINUX_UBI_H__
#define __LINUX_UBI_H__
//#include <asm/ioctl.h>
/* #include <asm/ioctl.h> */
#include <linux/types.h>
#include <mtd/ubi-user.h>

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