The WaRP Board is a Wearable Reference Plaform. The board features: - Freescale i.MX6 SoloLite processor with 512MB of RAM - Freescale FXOS8700CQ 6-axis Xtrinsic sensor - Freescale Kinetis KL16 MCU - Freescale Xtrinsic MMA955xL intelligent motion sensing platform The board implements a hybrid architecture to address the evolving needs of the wearables market. The platform consists of a main board and an example daughtercard with the ability to add additional daughtercards for different usage models. For more information about the project, visit: http://www.warpboard.org/ Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>master
Otavio Salvador
10 years ago
committed by
Stefano Babic
parent
8359318b5e
commit
4579dc37c3
@ -0,0 +1,12 @@ |
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if TARGET_WARP |
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config SYS_BOARD |
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default "warp" |
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config SYS_SOC |
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default "mx6" |
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config SYS_CONFIG_NAME |
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default "warp" |
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endif |
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@ -0,0 +1,6 @@ |
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WaRP BOARD |
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M: Otavio Salvador <otavio@ossystems.com.br> |
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S: Maintained |
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F: board/warp/ |
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F: include/configs/warp.h |
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F: configs/warp_defconfig |
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@ -0,0 +1,8 @@ |
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# Copyright (C) 2014 O.S. Systems Software LTDA.
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# Copyright (C) 2014 Kynetics LLC.
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# Copyright (C) 2014 Revolution Robotics, Inc.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y := warp.o
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@ -0,0 +1,113 @@ |
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/*
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* Copyright (C) 2014, 2015 O.S. Systems Software LTDA. |
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* Copyright (C) 2014 Kynetics LLC. |
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* Copyright (C) 2014 Revolution Robotics, Inc. |
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* |
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* Author: Otavio Salvador <otavio@ossystems.com.br> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <asm/arch/clock.h> |
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#include <asm/arch/iomux.h> |
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#include <asm/arch/imx-regs.h> |
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#include <asm/arch/mx6-pins.h> |
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#include <asm/arch/sys_proto.h> |
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#include <asm/gpio.h> |
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#include <asm/imx-common/iomux-v3.h> |
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#include <asm/io.h> |
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#include <linux/sizes.h> |
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#include <common.h> |
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#include <watchdog.h> |
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#include <fsl_esdhc.h> |
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#include <mmc.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ |
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PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
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PAD_CTL_SRE_FAST | PAD_CTL_HYS | \
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PAD_CTL_LVE) |
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#define USDHC_PAD_CTRL (PAD_CTL_PUS_22K_UP | \ |
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PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
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PAD_CTL_SRE_FAST | PAD_CTL_HYS | \
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PAD_CTL_LVE) |
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int dram_init(void) |
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{ |
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gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); |
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return 0; |
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} |
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static void setup_iomux_uart(void) |
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{ |
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static iomux_v3_cfg_t const uart1_pads[] = { |
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MX6_PAD_UART1_TXD__UART1_TXD | MUX_PAD_CTRL(UART_PAD_CTRL), |
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MX6_PAD_UART1_RXD__UART1_RXD | MUX_PAD_CTRL(UART_PAD_CTRL), |
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}; |
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imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); |
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} |
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static struct fsl_esdhc_cfg usdhc_cfg[1] = { |
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{USDHC2_BASE_ADDR}, |
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}; |
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int board_mmc_getcd(struct mmc *mmc) |
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{ |
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return 1; /* Assume boot SD always present */ |
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} |
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int board_mmc_init(bd_t *bis) |
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{ |
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static iomux_v3_cfg_t const usdhc2_pads[] = { |
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MX6_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6_PAD_SD2_RST__USDHC2_RST | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6_PAD_SD2_DAT0__USDHC2_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6_PAD_SD2_DAT1__USDHC2_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6_PAD_SD2_DAT2__USDHC2_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6_PAD_SD2_DAT3__USDHC2_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6_PAD_SD2_DAT4__USDHC2_DAT4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6_PAD_SD2_DAT5__USDHC2_DAT5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6_PAD_SD2_DAT6__USDHC2_DAT6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6_PAD_SD2_DAT7__USDHC2_DAT7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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}; |
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imx_iomux_v3_setup_multiple_pads(usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); |
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usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); |
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return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); |
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} |
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int board_early_init_f(void) |
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{ |
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setup_iomux_uart(); |
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return 0; |
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} |
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int board_init(void) |
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{ |
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/* address of boot parameters */ |
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; |
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return 0; |
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} |
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int board_late_init(void) |
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{ |
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#ifdef CONFIG_HW_WATCHDOG |
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hw_watchdog_init(); |
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#endif |
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return 0; |
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} |
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int checkboard(void) |
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{ |
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puts("Board: WaRP Board\n"); |
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return 0; |
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} |
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@ -0,0 +1,3 @@ |
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CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL" |
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CONFIG_ARM=y |
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CONFIG_TARGET_WARP=y |
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@ -0,0 +1,198 @@ |
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/*
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* Copyright (C) 2014 O.S. Systems Software LTDA. |
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* Copyright (C) 2014 Kynetics LLC. |
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* Copyright (C) 2014 Revolution Robotics, Inc. |
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* |
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* Author: Otavio Salvador <otavio@ossystems.com.br> |
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* |
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* Configuration settings for the WaRP Board |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#ifndef __CONFIG_H |
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#define __CONFIG_H |
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#include <asm/arch/imx-regs.h> |
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#include <linux/sizes.h> |
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#include "mx6_common.h" |
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#define CONFIG_MX6 |
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#define CONFIG_DISPLAY_CPUINFO |
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#define CONFIG_DISPLAY_BOARDINFO |
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#define CONFIG_SYS_GENERIC_BOARD |
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#define CONFIG_CMDLINE_TAG |
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#define CONFIG_SETUP_MEMORY_TAGS |
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#define CONFIG_INITRD_TAG |
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#define CONFIG_REVISION_TAG |
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/* Size of malloc() pool */ |
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#define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M) |
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#define CONFIG_BOARD_EARLY_INIT_F |
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#define CONFIG_BOARD_LATE_INIT |
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#define CONFIG_MXC_GPIO |
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#define CONFIG_MXC_UART |
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#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR |
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/* MMC Configs */ |
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#define CONFIG_FSL_ESDHC |
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#define CONFIG_FSL_USDHC |
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
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#define CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT |
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#define CONFIG_MMC |
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#define CONFIG_CMD_MMC |
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#define CONFIG_GENERIC_MMC |
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#define CONFIG_CMD_FAT |
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#define CONFIG_DOS_PARTITION |
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/* allow to overwrite serial and ethaddr */ |
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#define CONFIG_ENV_OVERWRITE |
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#define CONFIG_CONS_INDEX 1 |
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#define CONFIG_BAUDRATE 115200 |
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/* FLASH and environment organization */ |
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#define CONFIG_SYS_NO_FLASH |
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/* Command definition */ |
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#include <config_cmd_default.h> |
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#undef CONFIG_CMD_NET |
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#undef CONFIG_CMD_NFS |
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#define CONFIG_BOOTDELAY 3 |
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#define CONFIG_LOADADDR 0x82000000 |
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#define CONFIG_SYS_TEXT_BASE 0x87800000 |
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/* Miscellaneous configurable options */ |
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#define CONFIG_SYS_LONGHELP |
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#define CONFIG_SYS_HUSH_PARSER |
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#define CONFIG_AUTO_COMPLETE |
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#define CONFIG_SYS_CBSIZE 256 |
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/* Watchdog */ |
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#define CONFIG_HW_WATCHDOG |
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#define CONFIG_IMX_WATCHDOG |
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#define CONFIG_WATCHDOG_TIMEOUT_MSECS 30000 /* 30s */ |
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/* Print Buffer Size */ |
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
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#define CONFIG_SYS_MAXARGS 16 |
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
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#define CONFIG_SYS_MEMTEST_START 0x80000000 |
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_256M) |
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
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#define CONFIG_CMDLINE_EDITING |
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#define CONFIG_STACKSIZE SZ_128K |
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/* Physical Memory Map */ |
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#define CONFIG_NR_DRAM_BANKS 1 |
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR |
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#define PHYS_SDRAM_SIZE SZ_512M |
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM |
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR |
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE |
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#define CONFIG_SYS_INIT_SP_OFFSET \ |
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
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#define CONFIG_SYS_INIT_SP_ADDR \ |
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
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#define CONFIG_ENV_OFFSET (6 * SZ_64K) |
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#define CONFIG_ENV_SIZE SZ_8K |
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#define CONFIG_ENV_IS_IN_MMC |
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#define CONFIG_SYS_MMC_ENV_DEV 0 |
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/* VDD voltage 1.65 - 1.95 */ |
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#define CONFIG_SYS_SD_VOLTAGE 0x00000080 |
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#define CONFIG_OF_LIBFDT |
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#define CONFIG_CMD_BOOTZ |
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#ifndef CONFIG_SYS_DCACHE_OFF |
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#define CONFIG_CMD_CACHE |
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#endif |
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#define CONFIG_EXTRA_ENV_SETTINGS \ |
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"script=boot.scr\0" \
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"image=zImage\0" \
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"console=ttymxc0\0" \
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"fdt_high=0xffffffff\0" \
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"initrd_high=0xffffffff\0" \
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"fdt_file=imx6sl-warp.dtb\0" \
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"fdt_addr=0x88000000\0" \
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"initrd_addr=0x83800000\0" \
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"boot_fdt=try\0" \
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"ip_dyn=yes\0" \
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"mmcdev=0\0" \
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"mmcpart=1\0" \
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"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
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"mmcargs=setenv bootargs console=${console},${baudrate} " \
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"root=${mmcroot}\0" \
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"loadbootscript=" \
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"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
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"bootscript=echo Running bootscript from mmc ...; " \
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"source\0" \
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"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
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"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
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"mmcboot=echo Booting from mmc ...; " \
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"run mmcargs; " \
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"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
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"if run loadfdt; then " \
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"bootz ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"if test ${boot_fdt} = try; then " \
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"bootz; " \
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"else " \
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"echo WARN: Cannot load the DT; " \
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"fi; " \
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"fi; " \
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"else " \
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"bootz; " \
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"fi;\0" \
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"netargs=setenv bootargs console=${console},${baudrate} " \
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"root=/dev/nfs " \
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"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
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"netboot=echo Booting from net ...; " \
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"run netargs; " \
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"if test ${ip_dyn} = yes; then " \
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"setenv get_cmd dhcp; " \
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"else " \
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"setenv get_cmd tftp; " \
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"fi; " \
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"${get_cmd} ${image}; " \
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"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
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"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
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"bootz ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"if test ${boot_fdt} = try; then " \
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"bootz; " \
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"else " \
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"echo WARN: Cannot load the DT; " \
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"fi; " \
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"fi; " \
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"else " \
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"bootz; " \
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"fi;\0" |
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#define CONFIG_BOOTCOMMAND \ |
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"mmc dev ${mmcdev};" \
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"mmc dev ${mmcdev}; if mmc rescan; then " \
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"if run loadbootscript; then " \
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"run bootscript; " \
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"else " \
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"if run loadimage; then " \
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"run mmcboot; " \
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"else run netboot; " \
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"fi; " \
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"fi; " \
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"else run netboot; fi" |
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#endif /* __CONFIG_H */ |
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