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@ -11,7 +11,7 @@ |
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*/ |
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#include <common.h> |
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#include <errno.h> |
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#include <pci.h> |
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#undef DEBUG |
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@ -191,6 +191,32 @@ void pciauto_setup_device(struct pci_controller *hose, |
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pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80); |
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} |
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int pciauto_setup_rom(struct pci_controller *hose, pci_dev_t dev) |
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{ |
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pci_addr_t bar_value; |
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pci_size_t bar_size; |
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u32 bar_response; |
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u16 cmdstat = 0; |
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pci_hose_write_config_dword(hose, dev, PCI_ROM_ADDRESS, 0xfffffffe); |
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pci_hose_read_config_dword(hose, dev, PCI_ROM_ADDRESS, &bar_response); |
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if (!bar_response) |
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return -ENOENT; |
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bar_size = -(bar_response & ~1); |
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DEBUGF("PCI Autoconfig: ROM, size=%#x, ", bar_size); |
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if (pciauto_region_allocate(hose->pci_mem, bar_size, &bar_value) == 0) { |
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pci_hose_write_config_dword(hose, dev, PCI_ROM_ADDRESS, |
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bar_value); |
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} |
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DEBUGF("\n"); |
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pci_hose_read_config_word(hose, dev, PCI_COMMAND, &cmdstat); |
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cmdstat |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER; |
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pci_hose_write_config_word(hose, dev, PCI_COMMAND, cmdstat); |
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return 0; |
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} |
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void pciauto_prescan_setup_bridge(struct pci_controller *hose, |
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pci_dev_t dev, int sub_bus) |
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{ |
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