From 4a693669670fffd9a614c8c5c9f5ba027fd0185e Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 13 Jul 2018 08:26:28 +0200 Subject: [PATCH] microblaze: Convert generic platform to DM gpio Converting GPIO to DM requires to do changes in reset subsystem that's why support for Microblaze soft reset via sysreset and GPIO sysreset support was added. These two patches enables enabling GPIO DM. Microblaze soft reset is bind at last reset method. GPIO reset is handled via sysreset with adding this fragment to DT. gpio-restart { compatible = "gpio-restart"; gpios = <&reset_gpio 0 0 0>; /* 3rd cell ACTIVE_HIGH = 0, ACTIVE_LOW = 1 */ }; hard-reset-gpio property is not documented and also handled. Conversion is required. Unfortunately do_reset is required for SPL that's why use only soft microblaze reset for now. Signed-off-by: Michal Simek --- arch/microblaze/Kconfig | 1 + arch/microblaze/cpu/spl.c | 8 ++++ arch/microblaze/include/asm/gpio.h | 13 ------ .../xilinx/microblaze-generic/microblaze-generic.c | 46 ++++++---------------- board/xilinx/microblaze-generic/xparameters.h | 3 -- configs/microblaze-generic_defconfig | 3 ++ drivers/gpio/Kconfig | 1 + include/configs/microblaze-generic.h | 5 --- 8 files changed, 24 insertions(+), 56 deletions(-) diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig index f791c00..dcc502b 100644 --- a/arch/microblaze/Kconfig +++ b/arch/microblaze/Kconfig @@ -16,6 +16,7 @@ config TARGET_MICROBLAZE_GENERIC select DM select DM_SERIAL select ENV_IS_IN_FLASH + select SYSRESET endchoice diff --git a/arch/microblaze/cpu/spl.c b/arch/microblaze/cpu/spl.c index d3c523d..070c12c 100644 --- a/arch/microblaze/cpu/spl.c +++ b/arch/microblaze/cpu/spl.c @@ -47,3 +47,11 @@ int spl_start_uboot(void) return 1; } + +int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + __asm__ __volatile__ ("mts rmsr, r0;" \ + "bra r0"); + + return 0; +} diff --git a/arch/microblaze/include/asm/gpio.h b/arch/microblaze/include/asm/gpio.h index 4762de0..306ab4c 100644 --- a/arch/microblaze/include/asm/gpio.h +++ b/arch/microblaze/include/asm/gpio.h @@ -1,14 +1 @@ -#ifndef _ASM_MICROBLAZE_GPIO_H_ -#define _ASM_MICROBLAZE_GPIO_H_ - #include - -/* Allocation functions */ -extern int gpio_alloc_dual(u32 baseaddr, const char *name, u32 gpio_no0, - u32 gpio_no1); -extern int gpio_alloc(u32 baseaddr, const char *name, u32 gpio_no); - -#define gpio_status() gpio_info() -extern void gpio_info(void); - -#endif diff --git a/board/xilinx/microblaze-generic/microblaze-generic.c b/board/xilinx/microblaze-generic/microblaze-generic.c index 556d0de..44fb48b 100644 --- a/board/xilinx/microblaze-generic/microblaze-generic.c +++ b/board/xilinx/microblaze-generic/microblaze-generic.c @@ -1,8 +1,8 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * (C) Copyright 2007 Michal Simek + * (C) Copyright 2007-2018 Michal Simek * - * Michal SIMEK + * Michal SIMEK */ /* @@ -12,6 +12,8 @@ #include #include +#include +#include #include #include #include @@ -22,10 +24,6 @@ DECLARE_GLOBAL_DATA_PTR; -#ifdef CONFIG_XILINX_GPIO -static int reset_pin = -1; -#endif - #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT) static struct udevice *watchdog_dev; #endif /* !CONFIG_SPL_BUILD && CONFIG_WDT */ @@ -66,33 +64,6 @@ int dram_init(void) return 0; }; -#if !defined(CONFIG_SYSRESET) || defined(CONFIG_SPL_BUILD) -int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) -{ -#ifndef CONFIG_SPL_BUILD -#ifdef CONFIG_XILINX_GPIO - if (reset_pin != -1) - gpio_direction_output(reset_pin, 1); -#endif -#endif - puts("Resetting board\n"); - __asm__ __volatile__ (" mts rmsr, r0;" \ - "bra r0"); - - return 0; -} -#endif - -static int gpio_init(void) -{ -#ifdef CONFIG_XILINX_GPIO - reset_pin = gpio_alloc(CONFIG_SYS_GPIO_0_ADDR, "reset", 1); - if (reset_pin != -1) - gpio_request(reset_pin, "reset_pin"); -#endif - return 0; -} - #ifdef CONFIG_WDT /* Called by macro WATCHDOG_RESET */ void watchdog_reset(void) @@ -117,8 +88,6 @@ void watchdog_reset(void) int board_late_init(void) { - gpio_init(); - #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT) watchdog_dev = NULL; @@ -133,6 +102,13 @@ int board_late_init(void) wdt_start(watchdog_dev, 0, 0); puts("Watchdog: Started\n"); #endif /* !CONFIG_SPL_BUILD && CONFIG_WDT */ +#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_SYSRESET_MICROBLAZE) + int ret; + ret = device_bind_driver(gd->dm_root, "mb_soft_reset", + "reset_soft", NULL); + if (ret) + printf("Warning: No reset driver: ret=%d\n", ret); +#endif return 0; } diff --git a/board/xilinx/microblaze-generic/xparameters.h b/board/xilinx/microblaze-generic/xparameters.h index 01116d8..5e0911f 100644 --- a/board/xilinx/microblaze-generic/xparameters.h +++ b/board/xilinx/microblaze-generic/xparameters.h @@ -13,9 +13,6 @@ /* Microblaze is microblaze_0 */ #define XILINX_FSL_NUMBER 3 -/* GPIO is LEDs_4Bit*/ -#define XILINX_GPIO_BASEADDR 0x40000000 - /* Flash Memory is FLASH_2Mx32 */ #define XILINX_FLASH_START 0x2c000000 #define XILINX_FLASH_SIZE 0x00800000 diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig index c366a80..b1d0193 100644 --- a/configs/microblaze-generic_defconfig +++ b/configs/microblaze-generic_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_NETCONSOLE=y CONFIG_SPL_DM=y +CONFIG_DM_GPIO=y CONFIG_XILINX_GPIO=y CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_ATHEROS=y @@ -56,5 +57,7 @@ CONFIG_XILINX_AXIEMAC=y CONFIG_XILINX_EMACLITE=y CONFIG_SYS_NS16550=y CONFIG_XILINX_UARTLITE=y +CONFIG_SYSRESET_GPIO=y +CONFIG_SYSRESET_MICROBLAZE=y CONFIG_WDT=y CONFIG_XILINX_TB_WATCHDOG=y diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 29af22e..5699a71 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -185,6 +185,7 @@ config SANDBOX_GPIO_COUNT config XILINX_GPIO bool "Xilinx GPIO driver" + depends on DM_GPIO help This config enable the Xilinx GPIO driver for Microblaze. diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 6a049cf..5eab2e5 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -38,11 +38,6 @@ /* setting reset address */ /*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/ -/* gpio */ -#ifdef XILINX_GPIO_BASEADDR -# define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR -#endif - #define CONFIG_SYS_MALLOC_LEN 0xC0000 /* Stack location before relocation */