net: phy: micrel: disable NAND-tree for KSZ8051

NAND-tree is used to check wiring between MAC and PHY using NAND gates
on the PHY side, hence the name.

NAND-tree initial status is latched at reset by probing the IRQ pin.
However some devices are sharing the PHY IRQ pin with other peripherals
such as Atmel SAMA5D[34]x-EK boards when using the optional TM7000
display module, therefore they are switching the PHY in NAND-tree test
mode depending on the current IRQ line status at reset.

This patch ensure PHY is not in NAND-tree test mode only for the Micrel
KSZ8051 PHY used by Atmel. There are other Micrel PHY affected but I
doubt they are used on such weird hardware design.

Signed-off-by: Sylvain Rochet <sylvain.rochet@finsecur.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

drivers/net/phy/micrel.c

@@ -32,6 +32,34 @@ static struct phy_driver KSZ8031_driver = {
 	.shutdown = &genphy_shutdown,
 };
 
+/**
+ * KSZ8051
+ */
+#define MII_KSZ8051_PHY_OMSO			0x16
+#define MII_KSZ8051_PHY_OMSO_NAND_TREE_ON	(1 << 5)
+
+static int ksz8051_config(struct phy_device *phydev)
+{
+	unsigned val;
+
+	/* Disable NAND-tree */
+	val = phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZ8051_PHY_OMSO);
+	val &= ~MII_KSZ8051_PHY_OMSO_NAND_TREE_ON;
+	phy_write(phydev, MDIO_DEVAD_NONE, MII_KSZ8051_PHY_OMSO, val);
+
+	return genphy_config(phydev);
+}
+
+static struct phy_driver KSZ8051_driver = {
+	.name = "Micrel KSZ8051",
+	.uid = 0x221550,
+	.mask = 0xfffff0,
+	.features = PHY_BASIC_FEATURES,
+	.config = &ksz8051_config,
+	.startup = &genphy_startup,
+	.shutdown = &genphy_shutdown,
+};
+
 static struct phy_driver KSZ8081_driver = {
 	.name = "Micrel KSZ8081",
 	.uid = 0x221560,
@@ -293,6 +321,7 @@ int phy_micrel_init(void)
 {
 	phy_register(&KSZ804_driver);
 	phy_register(&KSZ8031_driver);
+	phy_register(&KSZ8051_driver);
 	phy_register(&KSZ8081_driver);
 #ifdef CONFIG_PHY_MICREL_KSZ9021
 	phy_register(&ksz9021_driver);