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igep00x0: add Hynix timings

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Tested on IGEPv2 with Micron MT29F4G16ABBDA3W and
Hynix H27S4G6F2DKA-BM

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Reviewed-by: Javier Martinez Canillas <javier@samsung.com>
Tested-by: Javier Martinez Canillas <javier@samsung.com>
master
Ladislav Michl 8 years ago committed by Tom Rini
parent 2baaa31024
commit 4fa72bd3fc
1 changed files with 16 additions and 4 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
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  1. 20
      board/isee/igep00x0/igep00x0.c

20
board/isee/igep00x0/igep00x0.c
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@ -84,10 +84,22 @@ void get_board_mem_timings(struct board_sdrc_timings *timings)
int mfr, id, err = identify_nand_chip(&mfr, &id);
timings->mr = MICRON_V_MR_165;
if (!err && mfr == NAND_MFR_MICRON) {
timings->mcfg = MICRON_V_MCFG_200(256 << 20);
timings->ctrla = MICRON_V_ACTIMA_200;
timings->ctrlb = MICRON_V_ACTIMB_200;
if (!err) {
switch (mfr) {
case NAND_MFR_HYNIX:
timings->mcfg = HYNIX_V_MCFG_200(256 << 20);
timings->ctrla = HYNIX_V_ACTIMA_200;
timings->ctrlb = HYNIX_V_ACTIMB_200;
break;
case NAND_MFR_MICRON:
timings->mcfg = MICRON_V_MCFG_200(256 << 20);
timings->ctrla = MICRON_V_ACTIMA_200;
timings->ctrlb = MICRON_V_ACTIMB_200;
break;
default:
/* Should not happen... */
break;
}
timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
gpmc_cs0_flash = MTD_DEV_TYPE_NAND;
} else {

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