pinctrl: Kconfig: sort pinctrl config options to prevent future clutter

This originally started out as
     "pinctrl: Kconfig: reorder to keep Rockchip options together"
and tried to keep the Rockchip-related config options together.

However, we now rewrite all chip-specific driver selections to start
with CONFIG_PINCTRL_ (with the inadvertent changes to related
Makefiles) and sort those alphabetically. And as this already means
touching most of the file, we also reformat the help text to not exceed
80 characters (but make full use of those 80 characters).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
master
Philipp Tomsich 7 years ago committed by Tom Rini
parent 17873341af
commit 51c7f34809
  1. 2
      configs/ap121_defconfig
  2. 2
      configs/chromebit_mickey_defconfig
  3. 2
      configs/chromebook_jerry_defconfig
  4. 2
      configs/chromebook_minnie_defconfig
  5. 2
      configs/evb-rk3036_defconfig
  6. 2
      configs/evb-rk3288_defconfig
  7. 2
      configs/evb-rk3328_defconfig
  8. 2
      configs/evb-rk3399_defconfig
  9. 2
      configs/fennec-rk3288_defconfig
  10. 2
      configs/firefly-rk3288_defconfig
  11. 2
      configs/kylin-rk3036_defconfig
  12. 2
      configs/miqi-rk3288_defconfig
  13. 2
      configs/popmetal-rk3288_defconfig
  14. 2
      configs/puma-rk3399_defconfig
  15. 2
      configs/rock2_defconfig
  16. 2
      configs/rock_defconfig
  17. 4
      configs/sandbox_defconfig
  18. 4
      configs/sandbox_noblk_defconfig
  19. 2
      configs/tinker-rk3288_defconfig
  20. 164
      drivers/pinctrl/Kconfig
  21. 2
      drivers/pinctrl/Makefile
  22. 4
      drivers/pinctrl/ath79/Makefile
  23. 10
      drivers/pinctrl/rockchip/Makefile

@ -40,7 +40,7 @@ CONFIG_DM_ETH=y
CONFIG_AG7XXX=y
CONFIG_PINCTRL=y
CONFIG_PINCONF=y
CONFIG_AR933X_PINCTRL=y
CONFIG_PINCTRL_AR933X=y
CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_AR933X=y

@ -51,7 +51,7 @@ CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_FULL is not set
CONFIG_ROCKCHIP_RK3288_PINCTRL=y
CONFIG_PINCTRL_ROCKCHIP_RK3288=y
CONFIG_DM_PMIC=y
# CONFIG_SPL_PMIC_CHILDREN is not set
CONFIG_PMIC_RK808=y

@ -52,7 +52,7 @@ CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_FULL is not set
CONFIG_ROCKCHIP_RK3288_PINCTRL=y
CONFIG_PINCTRL_ROCKCHIP_RK3288=y
CONFIG_DM_PMIC=y
# CONFIG_SPL_PMIC_CHILDREN is not set
CONFIG_PMIC_RK808=y

@ -52,7 +52,7 @@ CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_FULL is not set
CONFIG_ROCKCHIP_RK3288_PINCTRL=y
CONFIG_PINCTRL_ROCKCHIP_RK3288=y
CONFIG_DM_PMIC=y
# CONFIG_SPL_PMIC_CHILDREN is not set
CONFIG_PMIC_RK808=y

@ -28,7 +28,7 @@ CONFIG_LED=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_PINCTRL=y
CONFIG_ROCKCHIP_RK3036_PINCTRL=y
CONFIG_PINCTRL_ROCKCHIP_RK3036=y
CONFIG_RAM=y
# CONFIG_SPL_SERIAL_PRESENT is not set
CONFIG_DEBUG_UART=y

@ -48,7 +48,7 @@ CONFIG_GMAC_ROCKCHIP=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_FULL is not set
CONFIG_ROCKCHIP_RK3288_PINCTRL=y
CONFIG_PINCTRL_ROCKCHIP_RK3288=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_ACT8846=y
CONFIG_REGULATOR_ACT8846=y

@ -22,7 +22,7 @@ CONFIG_ROCKCHIP_GPIO=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_PINCTRL=y
CONFIG_ROCKCHIP_RK3328_PINCTRL=y
CONFIG_PINCTRL_ROCKCHIP_RK3328=y
CONFIG_REGULATOR_PWM=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_RAM=y

@ -39,7 +39,7 @@ CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_ROCKCHIP_RK3399_PINCTRL=y
CONFIG_PINCTRL_ROCKCHIP_RK3399=y
CONFIG_REGULATOR_PWM=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_PWM_ROCKCHIP=y

@ -48,7 +48,7 @@ CONFIG_GMAC_ROCKCHIP=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_FULL is not set
CONFIG_ROCKCHIP_RK3288_PINCTRL=y
CONFIG_PINCTRL_ROCKCHIP_RK3288=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_RK808=y
CONFIG_DM_REGULATOR_FIXED=y

@ -49,7 +49,7 @@ CONFIG_GMAC_ROCKCHIP=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_FULL is not set
CONFIG_ROCKCHIP_RK3288_PINCTRL=y
CONFIG_PINCTRL_ROCKCHIP_RK3288=y
CONFIG_DM_PMIC=y
# CONFIG_SPL_PMIC_CHILDREN is not set
CONFIG_PMIC_ACT8846=y

@ -29,7 +29,7 @@ CONFIG_LED=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_PINCTRL=y
CONFIG_ROCKCHIP_RK3036_PINCTRL=y
CONFIG_PINCTRL_ROCKCHIP_RK3036=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_RAM=y
CONFIG_SYSRESET=y

@ -47,7 +47,7 @@ CONFIG_GMAC_ROCKCHIP=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_FULL is not set
CONFIG_ROCKCHIP_RK3288_PINCTRL=y
CONFIG_PINCTRL_ROCKCHIP_RK3288=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_ACT8846=y
CONFIG_REGULATOR_ACT8846=y

@ -48,7 +48,7 @@ CONFIG_GMAC_ROCKCHIP=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_FULL is not set
CONFIG_ROCKCHIP_RK3288_PINCTRL=y
CONFIG_PINCTRL_ROCKCHIP_RK3288=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_RK808=y
CONFIG_DM_REGULATOR_FIXED=y

@ -50,7 +50,7 @@ CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_ROCKCHIP_RK3399_PINCTRL=y
CONFIG_PINCTRL_ROCKCHIP_RK3399=y
CONFIG_REGULATOR_PWM=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_PWM_ROCKCHIP=y

@ -46,7 +46,7 @@ CONFIG_GMAC_ROCKCHIP=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_FULL is not set
CONFIG_ROCKCHIP_RK3288_PINCTRL=y
CONFIG_PINCTRL_ROCKCHIP_RK3288=y
CONFIG_DM_PMIC=y
# CONFIG_SPL_PMIC_CHILDREN is not set
CONFIG_PMIC_ACT8846=y

@ -33,7 +33,7 @@ CONFIG_LED=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_PINCTRL=y
CONFIG_ROCKCHIP_RK3188_PINCTRL=y
CONFIG_PINCTRL_ROCKCHIP_RK3188=y
CONFIG_DM_PMIC=y
# CONFIG_SPL_PMIC_CHILDREN is not set
CONFIG_PMIC_ACT8846=y

@ -114,8 +114,8 @@ CONFIG_DM_PCI_COMPAT=y
CONFIG_PCI_SANDBOX=y
CONFIG_PINCTRL=y
CONFIG_PINCONF=y
CONFIG_ROCKCHIP_RK3036_PINCTRL=y
CONFIG_ROCKCHIP_RK3288_PINCTRL=y
CONFIG_PINCTRL_ROCKCHIP_RK3036=y
CONFIG_PINCTRL_ROCKCHIP_RK3288=y
CONFIG_PINCTRL_SANDBOX=y
CONFIG_POWER_DOMAIN=y
CONFIG_SANDBOX_POWER_DOMAIN=y

@ -120,8 +120,8 @@ CONFIG_DM_PCI_COMPAT=y
CONFIG_PCI_SANDBOX=y
CONFIG_PINCTRL=y
CONFIG_PINCONF=y
CONFIG_ROCKCHIP_RK3036_PINCTRL=y
CONFIG_ROCKCHIP_RK3288_PINCTRL=y
CONFIG_PINCTRL_ROCKCHIP_RK3036=y
CONFIG_PINCTRL_ROCKCHIP_RK3288=y
CONFIG_PINCTRL_SANDBOX=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_ACT8846=y

@ -48,7 +48,7 @@ CONFIG_GMAC_ROCKCHIP=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
# CONFIG_SPL_PINCTRL_FULL is not set
CONFIG_ROCKCHIP_RK3288_PINCTRL=y
CONFIG_PINCTRL_ROCKCHIP_RK3288=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_RK808=y
CONFIG_DM_REGULATOR_FIXED=y

@ -105,7 +105,7 @@ config SPL_PINCONF
if PINCTRL || SPL_PINCTRL
config AR933X_PINCTRL
config PINCTRL_AR933X
bool "QCA/Athores ar933x pin control driver"
depends on DM && SOC_AR933X
help
@ -114,98 +114,118 @@ config AR933X_PINCTRL
both the GPIO definitions and pin control functions for each
available multiplex function.
config QCA953X_PINCTRL
config PINCTRL_AT91
bool "AT91 pinctrl driver"
depends on DM
help
This option is to enable the AT91 pinctrl driver for AT91 PIO
controller.
AT91 PIO controller is a combined gpio-controller, pin-mux and
pin-config module. Each I/O pin may be dedicated as a general-purpose
I/O or be assigned to a function of an embedded peripheral. Each I/O
pin has a glitch filter providing rejection of glitches lower than
one-half of peripheral clock cycle and a debouncing filter providing
rejection of unwanted pulses from key or push button operations. You
can also control the multi-driver capability, pull-up and pull-down
feature on each I/O pin.
config PINCTRL_AT91PIO4
bool "AT91 PIO4 pinctrl driver"
depends on DM
help
This option is to enable the AT91 pinctrl driver for AT91 PIO4
controller which is available on SAMA5D2 SoC.
config PINCTRL_PIC32
bool "Microchip PIC32 pin-control and pin-mux driver"
depends on DM && MACH_PIC32
default y
help
Supports individual pin selection and configuration for each
remappable peripheral available on Microchip PIC32
SoCs. This driver is controlled by a device tree node which
contains both GPIO defintion and pin control functions.
config PINCTRL_QCA953X
bool "QCA/Athores qca953x pin control driver"
depends on DM && SOC_QCA953X
help
Support pin multiplexing control on QCA/Athores qca953x SoCs.
The driver is controlled by a device tree node which contains
both the GPIO definitions and pin control functions for each
available multiplex function.
config ROCKCHIP_RK3036_PINCTRL
The driver is controlled by a device tree node which contains both
the GPIO definitions and pin control functions for each available
multiplex function.
config PINCTRL_ROCKCHIP_RK3036
bool "Rockchip rk3036 pin control driver"
depends on DM
help
Support pin multiplexing control on Rockchip rk3036 SoCs. The driver is
controlled by a device tree node which contains both the GPIO
definitions and pin control functions for each available multiplex
function.
Support pin multiplexing control on Rockchip rk3036 SoCs.
The driver is controlled by a device tree node which contains both
the GPIO definitions and pin control functions for each available
multiplex function.
config ROCKCHIP_RK3188_PINCTRL
config PINCTRL_ROCKCHIP_RK3188
bool "Rockchip rk3188 pin control driver"
depends on DM
help
Support pin multiplexing control on Rockchip rk3188 SoCs. The driver
is controlled by a device tree node which contains both the GPIO
definitions and pin control functions for each available multiplex
function.
Support pin multiplexing control on Rockchip rk3188 SoCs.
config ROCKCHIP_RK3288_PINCTRL
bool "Rockchip rk3288 pin control driver"
depends on DM
help
Support pin multiplexing control on Rockchip rk3288 SoCs. The driver
is controlled by a device tree node which contains both the GPIO
definitions and pin control functions for each available multiplex
function.
The driver is controlled by a device tree node which contains both
the GPIO definitions and pin control functions for each available
multiplex function.
config PINCTRL_AT91
bool "AT91 pinctrl driver"
config PINCTRL_ROCKCHIP_RK3288
bool "Rockchip rk3288 pin control driver"
depends on DM
help
This option is to enable the AT91 pinctrl driver for AT91 PIO
controller. AT91 PIO controller is a combined gpio-controller,
pin-mux and pin-config module. Each I/O pin may be dedicated as
a general-purpose I/O or be assigned to a function of an embedded
peripheral. Each I/O pin has a glitch filter providing rejection of
glitches lower than one-half of peripheral clock cycle and
a debouncing filter providing rejection of unwanted pulses from key
or push button operations. You can also control the multi-driver
capability, pull-up and pull-down feature on each I/O pin.
Support pin multiplexing control on Rockchip rk3288 SoCs.
config PINCTRL_AT91PIO4
bool "AT91 PIO4 pinctrl driver"
depends on DM
help
This option is to enable the AT91 pinctrl driver for AT91 PIO4
controller which is available on SAMA5D2 SoC.
The driver is controlled by a device tree node which contains both
the GPIO definitions and pin control functions for each available
multiplex function.
config ROCKCHIP_RK3328_PINCTRL
config PINCTRL_ROCKCHIP_RK3328
bool "Rockchip rk3328 pin control driver"
depends on DM
help
Support pin multiplexing control on Rockchip rk3328 SoCs. The driver
is controlled by a device tree node which contains both the GPIO
definitions and pin control functions for each available multiplex
function.
Support pin multiplexing control on Rockchip rk3328 SoCs.
The driver is controlled by a device tree node which contains both
the GPIO definitions and pin control functions for each available
multiplex function.
config ROCKCHIP_RK3399_PINCTRL
config PINCTRL_ROCKCHIP_RK3399
bool "Rockchip rk3399 pin control driver"
depends on DM
help
Support pin multiplexing control on Rockchip rk3399 SoCs. The driver
is controlled by a device tree node which contains both the GPIO
definitions and pin control functions for each available multiplex
function.
Support pin multiplexing control on Rockchip rk3399 SoCs.
The driver is controlled by a device tree node which contains both
the GPIO definitions and pin control functions for each available
multiplex function.
config PINCTRL_SANDBOX
bool "Sandbox pinctrl driver"
depends on SANDBOX
help
This enables pinctrl driver for sandbox. Currently, this driver
actually does nothing but print debug messages when pinctrl
operations are invoked.
This enables pinctrl driver for sandbox.
config PIC32_PINCTRL
bool "Microchip PIC32 pin-control and pin-mux driver"
depends on DM && MACH_PIC32
default y
Currently, this driver actually does nothing but print debug
messages when pinctrl operations are invoked.
config PINCTRL_SINGLE
bool "Single register pin-control and pin-multiplex driver"
depends on DM
help
Supports individual pin selection and configuration for each remappable
peripheral available on Microchip PIC32 SoCs. This driver is controlled
by a device tree node which contains both GPIO defintion and pin control
functions.
This enables pinctrl driver for systems using a single register for
pin configuration and multiplexing. TI's AM335X SoCs are examples of
such systems.
Depending on the platform make sure to also enable OF_TRANSLATE and
eventually SPL_OF_TRANSLATE to get correct address translations.
config PINCTRL_STI
bool "STMicroelectronics STi pin-control and pin-mux driver"
@ -213,28 +233,20 @@ config PINCTRL_STI
default y
help
Support pin multiplexing control on STMicrolectronics STi SoCs.
The driver is controlled by a device tree node which contains both
the GPIO definitions and pin control functions for each available multiplex
function.
the GPIO definitions and pin control functions for each available
multiplex function.
config PINCTRL_STM32
bool "ST STM32 pin control driver"
depends on DM
help
Supports pin multiplexing control on stm32 SoCs. The driver is
controlled by a device tree node which contains both the GPIO
definitions and pin control functions for each available multiplex
function.
Supports pin multiplexing control on stm32 SoCs.
config PINCTRL_SINGLE
bool "Single register pin-control and pin-multiplex driver"
depends on DM
help
This enables pinctrl driver for systems using a single register for
pin configuration and multiplexing. TI's AM335X SoCs are examples of
such systems.
Depending on the platform make sure to also enable OF_TRANSLATE and
eventually SPL_OF_TRANSLATE to get correct address translations.
The driver is controlled by a device tree node which contains both
the GPIO definitions and pin control functions for each available
multiplex function.
endif

@ -13,7 +13,7 @@ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
obj-$(CONFIG_PINCTRL_SANDBOX) += pinctrl-sandbox.o
obj-$(CONFIG_PINCTRL_UNIPHIER) += uniphier/
obj-$(CONFIG_PIC32_PINCTRL) += pinctrl_pic32.o
obj-$(CONFIG_PINCTRL_PIC32) += pinctrl_pic32.o
obj-$(CONFIG_PINCTRL_EXYNOS) += exynos/
obj-$(CONFIG_PINCTRL_MESON) += meson/
obj-$(CONFIG_PINCTRL_MVEBU) += mvebu/

@ -2,5 +2,5 @@
# SPDX-License-Identifier: GPL-2.0+
#
obj-$(CONFIG_AR933X_PINCTRL) += pinctrl_ar933x.o
obj-$(CONFIG_QCA953x_PINCTRL) += pinctrl_qca953x.o
obj-$(CONFIG_PINCTRL_AR933X) += pinctrl_ar933x.o
obj-$(CONFIG_PINCTRL_QCA953x) += pinctrl_qca953x.o

@ -5,8 +5,8 @@
# SPDX-License-Identifier: GPL-2.0+
#
obj-$(CONFIG_ROCKCHIP_RK3036_PINCTRL) += pinctrl_rk3036.o
obj-$(CONFIG_ROCKCHIP_RK3188_PINCTRL) += pinctrl_rk3188.o
obj-$(CONFIG_ROCKCHIP_RK3288_PINCTRL) += pinctrl_rk3288.o
obj-$(CONFIG_ROCKCHIP_RK3328_PINCTRL) += pinctrl_rk3328.o
obj-$(CONFIG_ROCKCHIP_RK3399_PINCTRL) += pinctrl_rk3399.o
obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3036) += pinctrl_rk3036.o
obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3188) += pinctrl_rk3188.o
obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3288) += pinctrl_rk3288.o
obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3328) += pinctrl_rk3328.o
obj-$(CONFIG_PINCTRL_ROCKCHIP_RK3399) += pinctrl_rk3399.o

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