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#
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# (C) Copyright 2003-2007
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk |
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LIB = $(obj)lib$(BOARD).a
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COBJS := $(BOARD).o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS) |
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$(AR) $(ARFLAGS) $@ $(OBJS)
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clean: |
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rm -f $(SOBJS) $(OBJS)
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distclean: clean |
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rm -f $(LIB) core *.bak .depend
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk |
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sinclude $(obj).depend |
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#########################################################################
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@ -0,0 +1,30 @@ |
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#
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# (C) Copyright 2006-2007
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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#
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# Promess Motion-PRO
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#
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TEXT_BASE = 0xfff00000
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PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
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@ -0,0 +1,171 @@ |
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/*
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* (C) Copyright 2003-2007 |
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
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* |
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* modified for Promess PRO - by Andy Joseph, andy@promessdev.com |
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* modified for Promess PRO-Motion - by Robert McCullough, rob@promessdev.com |
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* modified by Chris M. Tumas 6/20/06 Change CAS latency to 2 from 3 |
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* Also changed the refresh for 100Mhz operation |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <mpc5xxx.h> |
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/* Kollmorgen DPR initialization data */ |
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struct init_elem { |
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unsigned long addr; |
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unsigned len; |
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char *data; |
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} init_seq[] = { |
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{0x500003F2, 2, "\x86\x00"}, /* HW parameter */ |
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{0x500003F0, 2, "\x00\x00"}, |
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{0x500003EC, 4, "\x00\x80\xc1\x52"}, /* Magic word */ |
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}; |
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/*
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* Initialize Kollmorgen DPR |
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*/ |
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static void kollmorgen_init(void) |
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{ |
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unsigned i, j; |
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vu_char *p; |
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for (i = 0; i < sizeof(init_seq) / sizeof(struct init_elem); ++i) { |
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p = (vu_char *)init_seq[i].addr; |
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for (j = 0; j < init_seq[i].len; ++j) |
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*(p + j) = *(init_seq[i].data + j); |
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} |
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printf("DPR: Kollmorgen DPR initialized\n"); |
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} |
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/*
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* Early board initalization. |
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*/ |
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int board_early_init_r(void) |
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{ |
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/* Now, when we are in RAM, disable Boot Chipselect and enable CS0 */ |
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*(vu_long *)MPC5XXX_ADDECR &= ~(1 << 25); |
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*(vu_long *)MPC5XXX_ADDECR |= (1 << 16); |
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/* Initialize Kollmorgen DPR */ |
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kollmorgen_init(); |
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return 0; |
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} |
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#ifndef CFG_RAMBOOT |
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/*
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* Helper function to initialize SDRAM controller. |
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*/ |
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static void sdram_start (int hi_addr) |
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{ |
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long hi_addr_bit = hi_addr ? 0x01000000 : 0; |
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/* unlock mode register */ |
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*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 | |
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hi_addr_bit; |
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/* precharge all banks */ |
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*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | |
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hi_addr_bit; |
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/* auto refresh */ |
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*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 | |
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hi_addr_bit; |
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/* auto refresh, second time */ |
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*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 | |
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hi_addr_bit; |
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/* set mode register */ |
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*(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE; |
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/* normal operation */ |
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*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit; |
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} |
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#endif /* !CFG_RAMBOOT */ |
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/*
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* Initalize SDRAM - configure SDRAM controller, detect memory size. |
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*/ |
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long int initdram (int board_type) |
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{ |
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ulong dramsize = 0; |
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#ifndef CFG_RAMBOOT |
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ulong test1, test2; |
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/* configure SDRAM start/end for detection */ |
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*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e; /* 2G at 0x0 */ |
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*(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000; /* disabled */ |
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/* setup config registers */ |
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*(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1; |
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*(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2; |
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sdram_start(0); |
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test1 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000); |
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sdram_start(1); |
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test2 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000); |
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if (test1 > test2) { |
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sdram_start(0); |
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dramsize = test1; |
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} else { |
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dramsize = test2; |
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} |
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/* memory smaller than 1MB is impossible */ |
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if (dramsize < (1 << 20)) |
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dramsize = 0; |
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/* set SDRAM CS0 size according to the amount of RAM found */ |
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if (dramsize > 0) |
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*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 + |
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__builtin_ffs(dramsize >> 20) - 1; |
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else |
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*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */ |
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/* let SDRAM CS1 start right after CS0 and disable it */ |
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*(vu_long *) MPC5XXX_SDRAM_CS1CFG = dramsize; |
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#else /* !CFG_RAMBOOT */ |
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/* retrieve size of memory connected to SDRAM CS0 */ |
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dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF; |
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if (dramsize >= 0x13) |
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dramsize = (1 << (dramsize - 0x13)) << 20; |
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else |
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dramsize = 0; |
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#endif /* CFG_RAMBOOT */ |
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/* return total ram size */ |
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return dramsize; |
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} |
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int checkboard (void) |
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{ |
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puts("Board: Promess Motion-PRO board\n"); |
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return 0; |
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} |
@ -0,0 +1,123 @@ |
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/* |
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* (C) Copyright 2003-2007 |
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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|
* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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|
* This program is distributed in the hope that it will be useful, |
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|
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||||
|
* GNU General Public License for more details. |
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|
* |
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|
* You should have received a copy of the GNU General Public License |
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|
* along with this program; if not, write to the Free Software |
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|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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OUTPUT_ARCH(powerpc) |
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SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); |
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SECTIONS |
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{ |
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/* Read-only sections, merged into text segment: */ |
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. = + SIZEOF_HEADERS; |
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|
.interp : { *(.interp) } |
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|
.hash : { *(.hash) } |
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.dynsym : { *(.dynsym) } |
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|
.dynstr : { *(.dynstr) } |
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.rel.text : { *(.rel.text) } |
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.rela.text : { *(.rela.text) } |
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.rel.data : { *(.rel.data) } |
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.rela.data : { *(.rela.data) } |
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.rel.rodata : { *(.rel.rodata) } |
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.rela.rodata : { *(.rela.rodata) } |
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.rel.got : { *(.rel.got) } |
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.rela.got : { *(.rela.got) } |
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.rel.ctors : { *(.rel.ctors) } |
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.rela.ctors : { *(.rela.ctors) } |
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.rel.dtors : { *(.rel.dtors) } |
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|
.rela.dtors : { *(.rela.dtors) } |
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.rel.bss : { *(.rel.bss) } |
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.rela.bss : { *(.rela.bss) } |
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|
.rel.plt : { *(.rel.plt) } |
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|
.rela.plt : { *(.rela.plt) } |
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.init : { *(.init) } |
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|
.plt : { *(.plt) } |
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|
.text : |
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|
{ |
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|
cpu/mpc5xxx/start.o (.text) |
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|
*(.text) |
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|
*(.fixup) |
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|
*(.got1) |
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. = ALIGN(16); |
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|
*(.rodata) |
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*(.rodata1) |
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|
*(.rodata.str1.4) |
||||||
|
*(.eh_frame) |
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|
} |
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|
.fini : { *(.fini) } =0 |
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|
.ctors : { *(.ctors) } |
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|
.dtors : { *(.dtors) } |
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|
|
||||||
|
/* Read-write section, merged into data segment: */ |
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|
. = (. + 0x0FFF) & 0xFFFFF000; |
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|
_erotext = .; |
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|
PROVIDE (erotext = .); |
||||||
|
.reloc : |
||||||
|
{ |
||||||
|
*(.got) |
||||||
|
_GOT2_TABLE_ = .; |
||||||
|
*(.got2) |
||||||
|
_FIXUP_TABLE_ = .; |
||||||
|
*(.fixup) |
||||||
|
} |
||||||
|
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2; |
||||||
|
__fixup_entries = (. - _FIXUP_TABLE_) >> 2; |
||||||
|
|
||||||
|
.data : |
||||||
|
{ |
||||||
|
*(.data) |
||||||
|
*(.data1) |
||||||
|
*(.sdata) |
||||||
|
*(.sdata2) |
||||||
|
*(.dynamic) |
||||||
|
CONSTRUCTORS |
||||||
|
} |
||||||
|
_edata = .; |
||||||
|
PROVIDE (edata = .); |
||||||
|
|
||||||
|
. = .; |
||||||
|
__u_boot_cmd_start = .; |
||||||
|
.u_boot_cmd : { *(.u_boot_cmd) } |
||||||
|
__u_boot_cmd_end = .; |
||||||
|
|
||||||
|
|
||||||
|
. = .; |
||||||
|
__start___ex_table = .; |
||||||
|
__ex_table : { *(__ex_table) } |
||||||
|
__stop___ex_table = .; |
||||||
|
|
||||||
|
. = ALIGN(4096); |
||||||
|
__init_begin = .; |
||||||
|
.text.init : { *(.text.init) } |
||||||
|
.data.init : { *(.data.init) } |
||||||
|
. = ALIGN(4096); |
||||||
|
__init_end = .; |
||||||
|
|
||||||
|
__bss_start = .; |
||||||
|
.bss : |
||||||
|
{ |
||||||
|
*(.sbss) *(.scommon) |
||||||
|
*(.dynbss) |
||||||
|
*(.bss) |
||||||
|
*(COMMON) |
||||||
|
} |
||||||
|
_end = . ; |
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|
PROVIDE (end = .); |
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|
} |
@ -0,0 +1,305 @@ |
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|
/*
|
||||||
|
* (C) Copyright 2003-2007 |
||||||
|
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||||
|
* |
||||||
|
* Based on PRO Motion board config file by Andy Joseph, andy@promessdev.com |
||||||
|
* |
||||||
|
* See file CREDITS for list of people who contributed to this |
||||||
|
* project. |
||||||
|
* |
||||||
|
* This program is free software; you can redistribute it and/or |
||||||
|
* modify it under the terms of the GNU General Public License as |
||||||
|
* published by the Free Software Foundation; either version 2 of |
||||||
|
* the License, or (at your option) any later version. |
||||||
|
* |
||||||
|
* This program is distributed in the hope that it will be useful, |
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||||
|
* GNU General Public License for more details. |
||||||
|
* |
||||||
|
* You should have received a copy of the GNU General Public License |
||||||
|
* along with this program; if not, write to the Free Software |
||||||
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||||
|
* MA 02111-1307 USA |
||||||
|
*/ |
||||||
|
|
||||||
|
#ifndef __CONFIG_H |
||||||
|
#define __CONFIG_H |
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* High Level Configuration Options |
||||||
|
*/ |
||||||
|
|
||||||
|
|
||||||
|
/* CPU and board */ |
||||||
|
#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ |
||||||
|
#define CONFIG_MPC5200 1 /* More exactly a MPC5200 */ |
||||||
|
#define CONFIG_MOTIONPRO 1 /* ... on Promess Motion-PRO board */ |
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Supported commands |
||||||
|
*/ |
||||||
|
#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \ |
||||||
|
CFG_CMD_ASKENV | \
|
||||||
|
CFG_CMD_DHCP | \
|
||||||
|
CFG_CMD_REGINFO | \
|
||||||
|
CFG_CMD_IMMAP | \
|
||||||
|
CFG_CMD_ELF | \
|
||||||
|
CFG_CMD_MII | \
|
||||||
|
CFG_CMD_BEDBUG | \
|
||||||
|
CFG_CMD_NET | \
|
||||||
|
CFG_CMD_PING) |
||||||
|
|
||||||
|
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ |
||||||
|
#include <cmd_confdefs.h> |
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Serial console configuration |
||||||
|
*/ |
||||||
|
#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */ |
||||||
|
#define CONFIG_NETCONSOLE 1 /* network console */ |
||||||
|
#define CONFIG_BAUDRATE 115200 |
||||||
|
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } |
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Ethernet configuration |
||||||
|
*/ |
||||||
|
#define CONFIG_MPC5xxx_FEC 1 |
||||||
|
#define CONFIG_PHY_ADDR 0x2 |
||||||
|
#define CONFIG_PHY_TYPE 0x79c874 |
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Autobooting |
||||||
|
*/ |
||||||
|
#define CONFIG_BOOTDELAY 2 /* autoboot after 2 seconds */ |
||||||
|
#define CONFIG_AUTOBOOT_KEYED |
||||||
|
#define CONFIG_AUTOBOOT_STOP_STR "\x1b\x1b" |
||||||
|
#define DEBUG_BOOTKEYS 0 |
||||||
|
#undef CONFIG_AUTOBOOT_DELAY_STR |
||||||
|
#undef CONFIG_BOOTARGS |
||||||
|
#define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds, " \ |
||||||
|
"press \"<Esc><Esc>\" to stop\n" |
||||||
|
|
||||||
|
#define CONFIG_ETHADDR 00:50:C2:40:10:00 |
||||||
|
#define CONFIG_OVERWRITE_ETHADDR_ONCE 1 |
||||||
|
#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */ |
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Default environment settings |
||||||
|
*/ |
||||||
|
#define CONFIG_EXTRA_ENV_SETTINGS \ |
||||||
|
"sdram_test=0\0" \
|
||||||
|
"netdev=eth0\0" \
|
||||||
|
"hostname=motionpro\0" \
|
||||||
|
"netmask=255.255.0.0\0" \
|
||||||
|
"ipaddr=192.168.160.22\0" \
|
||||||
|
"serverip=192.168.1.1\0" \
|
||||||
|
"gatewayip=192.168.1.1\0" \
|
||||||
|
"kernel_addr=200000\0" \
|
||||||
|
"u-boot_addr=100000\0" \
|
||||||
|
"kernel_sector=20\0" \
|
||||||
|
"kernel_size=1000\0" \
|
||||||
|
"console=ttyS0,115200\0" \
|
||||||
|
"rootpath=/opt/eldk-4.1/ppc_6xx\0" \
|
||||||
|
"bootfile=/tftpboot/motionpro/uImage\0" \
|
||||||
|
"u-boot=/tftpboot/motionpro/u-boot.bin\0" \
|
||||||
|
"load=tftp $(u-boot_addr) $(u-boot)\0" \
|
||||||
|
"update=prot off fff00000 fff3ffff; era fff00000 fff3ffff; " \
|
||||||
|
"cp.b $(u-boot_addr) fff00000 $(filesize);" \
|
||||||
|
"prot on fff00000 fff3ffff\0" \
|
||||||
|
"ramargs=setenv bootargs root=/dev/ram rw\0" \
|
||||||
|
"addip=setenv bootargs $(bootargs) console=$(console) " \
|
||||||
|
"ip=$(ipaddr):$(serverip):$(gatewayip):" \
|
||||||
|
"$(netmask):$(hostname):$(netdev):off panic=1\0" \
|
||||||
|
"flash_nfs=run nfsargs addip;bootm $(kernel_addr)\0" \
|
||||||
|
"flash_self=run ramargs addip;bootm $(kernel_addr) " \
|
||||||
|
"$(ramdisk_addr)\0" \
|
||||||
|
"net_nfs=tftp $(kernel_addr) $(bootfile); run nfsargs addip; " \
|
||||||
|
"bootm $(kernel_addr)\0" \
|
||||||
|
"nfsargs=setenv bootargs root=/dev/nfs rw " \
|
||||||
|
"nfsroot=$(serverip):$(rootpath)\0" \
|
||||||
|
"fstype=ext3\0" \
|
||||||
|
"fatargs=setenv bootargs init=/linuxrc rw\0" \
|
||||||
|
"" |
||||||
|
#define CONFIG_BOOTCOMMAND "run net_nfs" |
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* do board-specific init |
||||||
|
*/ |
||||||
|
#define CONFIG_BOARD_EARLY_INIT_R 1 |
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Low level configuration |
||||||
|
*/ |
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Clock configuration: SYS_XTALIN = 25MHz |
||||||
|
*/ |
||||||
|
#define CFG_MPC5XXX_CLKIN 25000000 |
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Memory map |
||||||
|
*/ |
||||||
|
/*
|
||||||
|
* Warning!!! with the current BestComm Task, MBAR MUST BE set to 0xf0000000. |
||||||
|
* Setting MBAR to otherwise will cause system hang when using SmartDMA such |
||||||
|
* as network commands. |
||||||
|
*/ |
||||||
|
#define CFG_MBAR 0xf0000000 |
||||||
|
#define CFG_SDRAM_BASE 0x00000000 |
||||||
|
|
||||||
|
/*
|
||||||
|
* If building for running out of SDRAM, then MBAR has been set up beforehand |
||||||
|
* (e.g., by the BDI). Otherwise we must specify the default boot-up value of |
||||||
|
* MBAR, as given in the doccumentation. |
||||||
|
*/ |
||||||
|
#if TEXT_BASE == 0x00100000 |
||||||
|
#define CFG_DEFAULT_MBAR 0xf0000000 |
||||||
|
#else /* TEXT_BASE != 0x00100000 */ |
||||||
|
#define CFG_DEFAULT_MBAR 0x80000000 |
||||||
|
#define CFG_LOWBOOT 1 |
||||||
|
#endif /* TEXT_BASE == 0x00100000 */ |
||||||
|
|
||||||
|
/* Use SRAM until RAM will be available */ |
||||||
|
#define CFG_INIT_RAM_ADDR MPC5XXX_SRAM |
||||||
|
#define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE |
||||||
|
|
||||||
|
#define CFG_GBL_DATA_SIZE 128 /* size in bytes for initial data */ |
||||||
|
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) |
||||||
|
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET |
||||||
|
|
||||||
|
#define CFG_MONITOR_BASE TEXT_BASE |
||||||
|
#if (CFG_MONITOR_BASE < CFG_FLASH_BASE) |
||||||
|
#define CFG_RAMBOOT 1 |
||||||
|
#endif |
||||||
|
|
||||||
|
#define CFG_MONITOR_LEN (256 << 10) /* 256 kB for Monitor */ |
||||||
|
#define CFG_MALLOC_LEN (128 << 10) /* 128 kB for malloc() */ |
||||||
|
#define CFG_BOOTMAPSZ (8 << 20) /* initial mem map for Linux */ |
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Chip selects configuration |
||||||
|
*/ |
||||||
|
/* Boot Chipselect */ |
||||||
|
#define CFG_BOOTCS_START CFG_FLASH_BASE |
||||||
|
#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE |
||||||
|
#define CFG_BOOTCS_CFG 0x03035D00 |
||||||
|
|
||||||
|
/* Flash memory addressing */ |
||||||
|
#define CFG_CS0_START CFG_FLASH_BASE |
||||||
|
#define CFG_CS0_SIZE CFG_FLASH_SIZE |
||||||
|
#define CFG_CS0_CFG CFG_BOOTCS_CFG |
||||||
|
|
||||||
|
/* Dual Port SRAM -- Kollmorgen Drive memory addressing */ |
||||||
|
#define CFG_CS1_START 0x50000000 |
||||||
|
#define CFG_CS1_SIZE 0x10000 |
||||||
|
#define CFG_CS1_CFG 0x05055800 |
||||||
|
|
||||||
|
/* Local register access */ |
||||||
|
#define CFG_CS2_START 0x50010000 |
||||||
|
#define CFG_CS2_SIZE 0x10000 |
||||||
|
#define CFG_CS2_CFG 0x05055800 |
||||||
|
|
||||||
|
/* Anybus CompactCom Module memory addressing */ |
||||||
|
#define CFG_CS3_START 0x50020000 |
||||||
|
#define CFG_CS3_SIZE 0x10000 |
||||||
|
#define CFG_CS3_CFG 0x05055800 |
||||||
|
|
||||||
|
/* No burst and dead cycle = 2 for all CSs */ |
||||||
|
#define CFG_CS_BURST 0x00000000 |
||||||
|
#define CFG_CS_DEADCYCLE 0x22222222 |
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* SDRAM configuration |
||||||
|
*/ |
||||||
|
/* 2 x MT48LC16M16A2BG-75 IT:D, CASL 2, 32 bit data bus */ |
||||||
|
#define SDRAM_CONFIG1 0x52222600 |
||||||
|
#define SDRAM_CONFIG2 0x88b70000 |
||||||
|
#define SDRAM_CONTROL 0x50570000 |
||||||
|
#define SDRAM_MODE 0x008d0000 |
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Flash configuration |
||||||
|
*/ |
||||||
|
#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */ |
||||||
|
#define CFG_FLASH_CFI_DRIVER 1 |
||||||
|
#define CFG_FLASH_BASE 0xff000000 |
||||||
|
#define CFG_FLASH_SIZE 0x01000000 |
||||||
|
#define CFG_MAX_FLASH_BANKS 1 /* max num of memory banks */ |
||||||
|
#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE } |
||||||
|
#define CFG_MAX_FLASH_SECT 256 /* max num of sects on one chip */ |
||||||
|
#define CONFIG_FLASH_16BIT /* Flash is 16-bit */ |
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Environment settings |
||||||
|
*/ |
||||||
|
#define CFG_ENV_IS_IN_FLASH 1 |
||||||
|
/* This has to be a multiple of the Flash sector size */ |
||||||
|
#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN) |
||||||
|
#define CFG_ENV_SIZE 0x1000 |
||||||
|
#define CFG_ENV_SECT_SIZE 0x10000 |
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Pin multiplexing configuration |
||||||
|
*/ |
||||||
|
|
||||||
|
/* PSC1: UART1
|
||||||
|
* PSC2: GPIO (default) |
||||||
|
* PSC3: GPIO (default) |
||||||
|
* USB: 2xUART4/5 |
||||||
|
* Ethernet: Ethernet 100Mbit with MD |
||||||
|
* Timer: CAN2/GPIO |
||||||
|
* PSC6/IRDA: GPIO (default) |
||||||
|
*/ |
||||||
|
#define CFG_GPS_PORT_CONFIG 0x1105a004 |
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Miscellaneous configurable options |
||||||
|
*/ |
||||||
|
#define CFG_LONGHELP /* undef to save memory */ |
||||||
|
#define CFG_PROMPT "=> " /* Monitor Command Prompt */ |
||||||
|
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ |
||||||
|
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ |
||||||
|
#define CFG_MAXARGS 16 /* max number of command args */ |
||||||
|
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ |
||||||
|
|
||||||
|
#define CFG_MEMTEST_START 0x00100000 /* memtest works on */ |
||||||
|
#define CFG_MEMTEST_END 0x03f00000 /* 1 ... 64 MiB in DRAM */ |
||||||
|
|
||||||
|
#define CFG_LOAD_ADDR 0x200000 /* default kernel load addr */ |
||||||
|
|
||||||
|
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ |
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Various low-level settings |
||||||
|
*/ |
||||||
|
#define CFG_HID0_INIT HID0_ICE | HID0_ICFI |
||||||
|
#define CFG_HID0_FINAL HID0_ICE |
||||||
|
|
||||||
|
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ |
||||||
|
#define BOOTFLAG_WARM 0x02 /* Software reboot */ |
||||||
|
|
||||||
|
#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */ |
||||||
|
|
||||||
|
|
||||||
|
/* Not needed for MPC 5xxx U-Boot, but used by tools/updater */ |
||||||
|
#define CFG_RESET_ADDRESS 0xfff00100 |
||||||
|
|
||||||
|
#endif /* __CONFIG_H */ |
Loading…
Reference in new issue