sysreset: psci: support system reset in a generic way with PSCI

If the system is running PSCI firmware, the System Reset function
(func ID: 0x80000009) is supposed to be handled by PSCI, that is,
the SoC/board specific reset implementation should be moved to PSCI.
U-Boot should call the PSCI service according to the arm-smccc
manner.

The arm-smccc is supported on ARMv7 or later.  Especially, ARMv8
generation SoCs are likely to run ARM Trusted Firmware BL31.  In
this case, U-Boot is a non-secure world boot loader, so it should
not be able to reset the system directly.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
master
Masahiro Yamada 7 years ago committed by Tom Rini
parent c54bcf6805
commit 573a3811ed
  1. 1
      arch/arm/Kconfig
  2. 2
      drivers/Kconfig
  3. 5
      drivers/Makefile
  4. 6
      drivers/firmware/Kconfig
  5. 2
      drivers/firmware/Makefile
  6. 11
      drivers/firmware/firmware-uclass.c
  7. 94
      drivers/firmware/psci.c
  8. 10
      drivers/sysreset/Kconfig
  9. 1
      drivers/sysreset/Makefile
  10. 41
      drivers/sysreset/sysreset_psci.c
  11. 1
      include/dm/uclass-id.h
  12. 13
      include/linux/psci.h

@ -177,6 +177,7 @@ config SYS_CACHELINE_SIZE
config ARM_SMCCC
bool "Support for ARM SMC Calling Convention (SMCCC)"
depends on CPU_V7 || ARM64
select ARM_PSCI_FW
help
Say Y here if you want to enable ARM SMC Calling Convention.
This should be enabled if U-Boot needs to communicate with system

@ -24,6 +24,8 @@ source "drivers/dfu/Kconfig"
source "drivers/dma/Kconfig"
source "drivers/firmware/Kconfig"
source "drivers/fpga/Kconfig"
source "drivers/gpio/Kconfig"

@ -23,7 +23,7 @@ obj-$(CONFIG_SPL_SERIAL_SUPPORT) += serial/
obj-$(CONFIG_SPL_SPI_SUPPORT) += spi/
obj-$(CONFIG_SPL_POWER_SUPPORT) += power/ power/pmic/
obj-$(CONFIG_SPL_POWER_SUPPORT) += power/regulator/
obj-$(CONFIG_SPL_DRIVERS_MISC_SUPPORT) += misc/ sysreset/
obj-$(CONFIG_SPL_DRIVERS_MISC_SUPPORT) += misc/ sysreset/ firmware/
obj-$(CONFIG_SPL_MTD_SUPPORT) += mtd/
obj-$(CONFIG_SPL_NAND_SUPPORT) += mtd/nand/
obj-$(CONFIG_SPL_ONENAND_SUPPORT) += mtd/onenand/
@ -52,7 +52,7 @@ endif
ifdef CONFIG_TPL_BUILD
obj-$(CONFIG_TPL_I2C_SUPPORT) += i2c/
obj-$(CONFIG_TPL_DRIVERS_MISC_SUPPORT) += misc/ sysreset/
obj-$(CONFIG_TPL_DRIVERS_MISC_SUPPORT) += misc/ sysreset/ firmware/
obj-$(CONFIG_TPL_MMC_SUPPORT) += mmc/
obj-$(CONFIG_TPL_MPC8XXX_INIT_DDR_SUPPORT) += ddr/fsl/
obj-$(CONFIG_TPL_NAND_SUPPORT) += mtd/nand/
@ -71,6 +71,7 @@ obj-y += block/
obj-$(CONFIG_BOOTCOUNT_LIMIT) += bootcount/
obj-$(CONFIG_CPU) += cpu/
obj-y += crypto/
obj-y += firmware/
obj-$(CONFIG_FPGA) += fpga/
obj-y += hwmon/
obj-y += misc/

@ -0,0 +1,6 @@
config FIRMWARE
bool
config ARM_PSCI_FW
bool
select FIRMWARE

@ -0,0 +1,2 @@
obj-$(CONFIG_FIRMWARE) += firmware-uclass.o
obj-$(CONFIG_ARM_PSCI_FW) += psci.o

@ -0,0 +1,11 @@
/*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <dm/uclass.h>
/* Firmware access is platform-dependent. No generic code in uclass */
UCLASS_DRIVER(firmware) = {
.id = UCLASS_FIRMWARE,
.name = "firmware",
};

@ -0,0 +1,94 @@
/*
* Copyright (C) 2017 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* Based on drivers/firmware/psci.c from Linux:
* Copyright (C) 2015 ARM Limited
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <dm/device.h>
#include <dm/lists.h>
#include <libfdt.h>
#include <linux/arm-smccc.h>
#include <linux/errno.h>
#include <linux/psci.h>
psci_fn *invoke_psci_fn;
static unsigned long __invoke_psci_fn_hvc(unsigned long function_id,
unsigned long arg0, unsigned long arg1,
unsigned long arg2)
{
struct arm_smccc_res res;
arm_smccc_hvc(function_id, arg0, arg1, arg2, 0, 0, 0, 0, &res);
return res.a0;
}
static unsigned long __invoke_psci_fn_smc(unsigned long function_id,
unsigned long arg0, unsigned long arg1,
unsigned long arg2)
{
struct arm_smccc_res res;
arm_smccc_smc(function_id, arg0, arg1, arg2, 0, 0, 0, 0, &res);
return res.a0;
}
static int psci_bind(struct udevice *dev)
{
/* No SYSTEM_RESET support for PSCI 0.1 */
if (of_device_is_compatible(dev, "arm,psci-0.2") ||
of_device_is_compatible(dev, "arm,psci-1.0")) {
int ret;
/* bind psci-sysreset optionally */
ret = device_bind_driver(dev, "psci-sysreset", "psci-sysreset",
NULL);
if (ret)
debug("PSCI System Reset was not bound.\n");
}
return 0;
}
static int psci_probe(struct udevice *dev)
{
DECLARE_GLOBAL_DATA_PTR;
const char *method;
method = fdt_stringlist_get(gd->fdt_blob, dev->of_offset, "method", 0,
NULL);
if (!method) {
printf("missing \"method\" property\n");
return -ENXIO;
}
if (!strcmp("hvc", method)) {
invoke_psci_fn = __invoke_psci_fn_hvc;
} else if (!strcmp("smc", method)) {
invoke_psci_fn = __invoke_psci_fn_smc;
} else {
printf("invalid \"method\" property: %s\n", method);
return -EINVAL;
}
return 0;
}
static const struct udevice_id psci_of_match[] = {
{ .compatible = "arm,psci" },
{ .compatible = "arm,psci-0.2" },
{ .compatible = "arm,psci-1.0" },
{},
};
U_BOOT_DRIVER(psci) = {
.name = "psci",
.id = UCLASS_FIRMWARE,
.of_match = psci_of_match,
.bind = psci_bind,
.probe = psci_probe,
};

@ -13,4 +13,14 @@ config SYSRESET
to effect a reset. The uclass will try all available drivers when
reset_walk() is called.
if SYSRESET
config SYSRESET_PSCI
bool "Enable support for PSCI System Reset"
depends on ARM_PSCI_FW
help
Enable PSCI SYSTEM_RESET function call. To use this, PSCI firmware
must be running on your system.
endif
endmenu

@ -5,6 +5,7 @@
#
obj-$(CONFIG_SYSRESET) += sysreset-uclass.o
obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_ROCKCHIP_RK3036) += sysreset_rk3036.o

@ -0,0 +1,41 @@
/*
* Copyright (C) 2017 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <dm/device.h>
#include <sysreset.h>
#include <linux/errno.h>
#include <linux/psci.h>
static int psci_sysreset_request(struct udevice *dev, enum sysreset_t type)
{
unsigned long function_id;
switch (type) {
case SYSRESET_WARM:
case SYSRESET_COLD:
function_id = PSCI_0_2_FN_SYSTEM_RESET;
break;
case SYSRESET_POWER:
function_id = PSCI_0_2_FN_SYSTEM_OFF;
break;
default:
return -ENOSYS;
}
invoke_psci_fn(function_id, 0, 0, 0);
return -EINPROGRESS;
}
static struct sysreset_ops psci_sysreset_ops = {
.request = psci_sysreset_request,
};
U_BOOT_DRIVER(psci_sysreset) = {
.name = "psci-sysreset",
.id = UCLASS_SYSRESET,
.ops = &psci_sysreset_ops,
};

@ -35,6 +35,7 @@ enum uclass_id {
UCLASS_DMA, /* Direct Memory Access */
UCLASS_ETH, /* Ethernet device */
UCLASS_GPIO, /* Bank of general-purpose I/O pins */
UCLASS_FIRMWARE, /* Firmware */
UCLASS_I2C, /* I2C bus */
UCLASS_I2C_EEPROM, /* I2C EEPROM device */
UCLASS_I2C_GENERIC, /* Generic I2C device */

@ -87,4 +87,17 @@
#define PSCI_RET_NOT_PRESENT -7
#define PSCI_RET_DISABLED -8
#ifdef CONFIG_ARM_PSCI_FW
typedef unsigned long (psci_fn)(unsigned long, unsigned long,
unsigned long, unsigned long);
extern psci_fn *invoke_psci_fn;
#else
unsigned long invoke_psci_fn(unsigned long a0, unsigned long a1,
unsigned long a2, unsigned long a3)
{
return PSCI_RET_DISABLED;
}
#endif
#endif /* _UAPI_LINUX_PSCI_H */

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