Merge branch 'master' of git://git.denx.de/u-boot-spi

drivers/mtd/spi/spi_flash.c

@@ -128,6 +128,7 @@ static int clean_bar(struct spi_flash *flash)
 	if (flash->bank_curr == 0)
 		return 0;
 	cmd = flash->bank_write_cmd;
+	flash->bank_curr = 0;
 
 	return spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1);
 }

drivers/mtd/spi/spi_flash_ids.c

@@ -63,6 +63,7 @@ const struct spi_flash_info spi_flash_ids[] = {
 #endif
 #ifdef CONFIG_SPI_FLASH_GIGADEVICE	/* GIGADEVICE */
 	{"gd25q64b",	   INFO(0xc84017, 0x0, 64 * 1024,   128, SECT_4K) },
+	{"gd25q32b",       INFO(0xc84016, 0x0, 64 * 1024,    64, SECT_4K) },
 	{"gd25lq32",	   INFO(0xc86016, 0x0, 64 * 1024,    64, SECT_4K) },
 #endif
 #ifdef CONFIG_SPI_FLASH_ISSI		/* ISSI */

drivers/spi/cadence_qspi.c

@@ -283,18 +283,9 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus)
 	const void *blob = gd->fdt_blob;
 	int node = dev_of_offset(bus);
 	int subnode;
-	u32 data[4];
-	int ret;
 
-	/* 2 base addresses are needed, lets get them from the DT */
-	ret = fdtdec_get_int_array(blob, node, "reg", data, ARRAY_SIZE(data));
-	if (ret) {
-		printf("Error: Can't get base addresses (ret=%d)!\n", ret);
-		return -ENODEV;
-	}
-
-	plat->regbase = (void *)data[0];
-	plat->ahbbase = (void *)data[2];
+	plat->regbase = (void *)devfdt_get_addr_index(bus, 0);
+	plat->ahbbase = (void *)devfdt_get_addr_index(bus, 1);
 	plat->is_decoded_cs = fdtdec_get_bool(blob, node, "cdns,is-decoded-cs");
 	plat->fifo_depth = fdtdec_get_uint(blob, node, "cdns,fifo-depth", 128);
 	plat->fifo_width = fdtdec_get_uint(blob, node, "cdns,fifo-width", 4);