Add support for device tree control and add device tree files for the beaglebone black initially. Signed-off-by: Simon Glass <sjg@chromium.org>master
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/* |
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* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License version 2 as |
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* published by the Free Software Foundation. |
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*/ |
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|
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/ { |
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model = "TI AM335x BeagleBone"; |
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compatible = "ti,am335x-bone", "ti,am33xx"; |
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|
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cpus { |
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cpu@0 { |
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cpu0-supply = <&dcdc2_reg>; |
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}; |
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}; |
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|
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memory { |
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device_type = "memory"; |
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reg = <0x80000000 0x10000000>; /* 256 MB */ |
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}; |
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|
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am33xx_pinmux: pinmux@44e10800 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&clkout2_pin>; |
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|
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user_leds_s0: user_leds_s0 { |
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pinctrl-single,pins = < |
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0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */ |
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0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */ |
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0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */ |
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0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */ |
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>; |
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}; |
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|
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i2c0_pins: pinmux_i2c0_pins { |
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pinctrl-single,pins = < |
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0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ |
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0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ |
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>; |
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}; |
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|
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uart0_pins: pinmux_uart0_pins { |
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pinctrl-single,pins = < |
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0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ |
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0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ |
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>; |
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}; |
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|
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clkout2_pin: pinmux_clkout2_pin { |
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pinctrl-single,pins = < |
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0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ |
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>; |
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}; |
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|
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cpsw_default: cpsw_default { |
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pinctrl-single,pins = < |
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/* Slave 1 */ |
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0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */ |
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0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */ |
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0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */ |
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0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */ |
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0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */ |
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0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */ |
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0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */ |
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0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */ |
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0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */ |
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0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */ |
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0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */ |
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0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */ |
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0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */ |
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>; |
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}; |
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|
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cpsw_sleep: cpsw_sleep { |
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pinctrl-single,pins = < |
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/* Slave 1 reset value */ |
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0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
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0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
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0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
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0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
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0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
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0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
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0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
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0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
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0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
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0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
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0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
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0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
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0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
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>; |
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}; |
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davinci_mdio_default: davinci_mdio_default { |
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pinctrl-single,pins = < |
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/* MDIO */ |
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0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ |
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0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ |
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>; |
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}; |
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davinci_mdio_sleep: davinci_mdio_sleep { |
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pinctrl-single,pins = < |
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/* MDIO reset value */ |
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0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
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0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
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>; |
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}; |
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}; |
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|
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ocp { |
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uart0: serial@44e09000 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&uart0_pins>; |
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status = "okay"; |
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}; |
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musb: usb@47400000 { |
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status = "okay"; |
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control@44e10000 { |
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status = "okay"; |
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}; |
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usb-phy@47401300 { |
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status = "okay"; |
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}; |
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usb-phy@47401b00 { |
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status = "okay"; |
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}; |
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usb@47401000 { |
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status = "okay"; |
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}; |
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usb@47401800 { |
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status = "okay"; |
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dr_mode = "host"; |
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}; |
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dma-controller@07402000 { |
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status = "okay"; |
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}; |
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}; |
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i2c0: i2c@44e0b000 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&i2c0_pins>; |
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status = "okay"; |
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clock-frequency = <400000>; |
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tps: tps@24 { |
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reg = <0x24>; |
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}; |
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}; |
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}; |
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leds { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&user_leds_s0>; |
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compatible = "gpio-leds"; |
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led@2 { |
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label = "beaglebone:green:heartbeat"; |
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gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; |
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linux,default-trigger = "heartbeat"; |
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default-state = "off"; |
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}; |
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led@3 { |
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label = "beaglebone:green:mmc0"; |
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gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>; |
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linux,default-trigger = "mmc0"; |
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default-state = "off"; |
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}; |
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led@4 { |
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label = "beaglebone:green:usr2"; |
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gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; |
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default-state = "off"; |
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}; |
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led@5 { |
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label = "beaglebone:green:usr3"; |
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gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; |
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default-state = "off"; |
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}; |
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}; |
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}; |
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/include/ "tps65217.dtsi" |
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&tps { |
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regulators { |
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dcdc1_reg: regulator@0 { |
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regulator-always-on; |
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}; |
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dcdc2_reg: regulator@1 { |
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/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ |
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regulator-name = "vdd_mpu"; |
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regulator-min-microvolt = <925000>; |
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regulator-max-microvolt = <1325000>; |
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regulator-boot-on; |
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regulator-always-on; |
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}; |
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dcdc3_reg: regulator@2 { |
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/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ |
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regulator-name = "vdd_core"; |
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regulator-min-microvolt = <925000>; |
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regulator-max-microvolt = <1150000>; |
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regulator-boot-on; |
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regulator-always-on; |
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}; |
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ldo1_reg: regulator@3 { |
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regulator-always-on; |
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}; |
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ldo2_reg: regulator@4 { |
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regulator-always-on; |
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}; |
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ldo3_reg: regulator@5 { |
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regulator-always-on; |
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}; |
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ldo4_reg: regulator@6 { |
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regulator-always-on; |
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}; |
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}; |
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}; |
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&cpsw_emac0 { |
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phy_id = <&davinci_mdio>, <0>; |
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phy-mode = "mii"; |
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}; |
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&cpsw_emac1 { |
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phy_id = <&davinci_mdio>, <1>; |
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phy-mode = "mii"; |
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}; |
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&mac { |
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pinctrl-names = "default", "sleep"; |
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pinctrl-0 = <&cpsw_default>; |
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pinctrl-1 = <&cpsw_sleep>; |
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}; |
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&davinci_mdio { |
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pinctrl-names = "default", "sleep"; |
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pinctrl-0 = <&davinci_mdio_default>; |
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pinctrl-1 = <&davinci_mdio_sleep>; |
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}; |
@ -0,0 +1,17 @@ |
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/* |
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* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License version 2 as |
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* published by the Free Software Foundation. |
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*/ |
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/dts-v1/; |
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#include "am33xx.dtsi" |
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#include "am335x-bone-common.dtsi" |
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&ldo3_reg { |
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regulator-min-microvolt = <1800000>; |
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regulator-max-microvolt = <1800000>; |
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regulator-always-on; |
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}; |
@ -0,0 +1,649 @@ |
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/* |
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* Device Tree Source for AM33XX SoC |
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* |
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* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ |
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* |
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* This file is licensed under the terms of the GNU General Public License |
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* version 2. This program is licensed "as is" without any warranty of any |
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* kind, whether express or implied. |
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*/ |
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#include <dt-bindings/gpio/gpio.h> |
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#include <dt-bindings/pinctrl/am33xx.h> |
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#include "skeleton.dtsi" |
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/ { |
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compatible = "ti,am33xx"; |
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interrupt-parent = <&intc>; |
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aliases { |
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serial0 = &uart0; |
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serial1 = &uart1; |
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serial2 = &uart2; |
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serial3 = &uart3; |
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serial4 = &uart4; |
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serial5 = &uart5; |
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d_can0 = &dcan0; |
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d_can1 = &dcan1; |
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usb0 = &usb0; |
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usb1 = &usb1; |
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phy0 = &usb0_phy; |
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phy1 = &usb1_phy; |
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}; |
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cpus { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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cpu@0 { |
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compatible = "arm,cortex-a8"; |
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device_type = "cpu"; |
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reg = <0>; |
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/* |
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* To consider voltage drop between PMIC and SoC, |
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* tolerance value is reduced to 2% from 4% and |
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* voltage value is increased as a precaution. |
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*/ |
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operating-points = < |
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/* kHz uV */ |
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720000 1285000 |
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600000 1225000 |
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500000 1125000 |
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275000 1125000 |
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>; |
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voltage-tolerance = <2>; /* 2 percentage */ |
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clock-latency = <300000>; /* From omap-cpufreq driver */ |
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}; |
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}; |
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/* |
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* The soc node represents the soc top level view. It is uses for IPs |
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* that are not memory mapped in the MPU view or for the MPU itself. |
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*/ |
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soc { |
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compatible = "ti,omap-infra"; |
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mpu { |
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compatible = "ti,omap3-mpu"; |
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ti,hwmods = "mpu"; |
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}; |
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}; |
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am33xx_pinmux: pinmux@44e10800 { |
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compatible = "pinctrl-single"; |
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reg = <0x44e10800 0x0238>; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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pinctrl-single,register-width = <32>; |
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pinctrl-single,function-mask = <0x7f>; |
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}; |
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/* |
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* XXX: Use a flat representation of the AM33XX interconnect. |
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* The real AM33XX interconnect network is quite complex.Since |
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* that will not bring real advantage to represent that in DT |
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* for the moment, just use a fake OCP bus entry to represent |
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* the whole bus hierarchy. |
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*/ |
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ocp { |
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compatible = "simple-bus"; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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ranges; |
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ti,hwmods = "l3_main"; |
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intc: interrupt-controller@48200000 { |
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compatible = "ti,omap2-intc"; |
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interrupt-controller; |
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#interrupt-cells = <1>; |
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ti,intc-size = <128>; |
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reg = <0x48200000 0x1000>; |
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}; |
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gpio0: gpio@44e07000 { |
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compatible = "ti,omap4-gpio"; |
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ti,hwmods = "gpio1"; |
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gpio-controller; |
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#gpio-cells = <2>; |
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interrupt-controller; |
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#interrupt-cells = <1>; |
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reg = <0x44e07000 0x1000>; |
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interrupts = <96>; |
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}; |
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gpio1: gpio@4804c000 { |
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compatible = "ti,omap4-gpio"; |
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ti,hwmods = "gpio2"; |
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gpio-controller; |
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#gpio-cells = <2>; |
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interrupt-controller; |
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#interrupt-cells = <1>; |
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reg = <0x4804c000 0x1000>; |
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interrupts = <98>; |
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}; |
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gpio2: gpio@481ac000 { |
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compatible = "ti,omap4-gpio"; |
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ti,hwmods = "gpio3"; |
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gpio-controller; |
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#gpio-cells = <2>; |
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interrupt-controller; |
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#interrupt-cells = <1>; |
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reg = <0x481ac000 0x1000>; |
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interrupts = <32>; |
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}; |
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gpio3: gpio@481ae000 { |
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compatible = "ti,omap4-gpio"; |
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ti,hwmods = "gpio4"; |
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gpio-controller; |
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#gpio-cells = <2>; |
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interrupt-controller; |
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#interrupt-cells = <1>; |
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reg = <0x481ae000 0x1000>; |
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interrupts = <62>; |
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}; |
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uart0: serial@44e09000 { |
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compatible = "ti,omap3-uart"; |
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ti,hwmods = "uart1"; |
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clock-frequency = <48000000>; |
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reg = <0x44e09000 0x2000>; |
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interrupts = <72>; |
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status = "disabled"; |
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}; |
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uart1: serial@48022000 { |
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compatible = "ti,omap3-uart"; |
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ti,hwmods = "uart2"; |
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clock-frequency = <48000000>; |
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reg = <0x48022000 0x2000>; |
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interrupts = <73>; |
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status = "disabled"; |
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}; |
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uart2: serial@48024000 { |
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compatible = "ti,omap3-uart"; |
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ti,hwmods = "uart3"; |
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clock-frequency = <48000000>; |
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reg = <0x48024000 0x2000>; |
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interrupts = <74>; |
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status = "disabled"; |
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}; |
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uart3: serial@481a6000 { |
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compatible = "ti,omap3-uart"; |
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ti,hwmods = "uart4"; |
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clock-frequency = <48000000>; |
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reg = <0x481a6000 0x2000>; |
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interrupts = <44>; |
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status = "disabled"; |
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}; |
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uart4: serial@481a8000 { |
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compatible = "ti,omap3-uart"; |
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ti,hwmods = "uart5"; |
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clock-frequency = <48000000>; |
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reg = <0x481a8000 0x2000>; |
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interrupts = <45>; |
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status = "disabled"; |
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}; |
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uart5: serial@481aa000 { |
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compatible = "ti,omap3-uart"; |
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ti,hwmods = "uart6"; |
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clock-frequency = <48000000>; |
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reg = <0x481aa000 0x2000>; |
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interrupts = <46>; |
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status = "disabled"; |
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}; |
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i2c0: i2c@44e0b000 { |
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compatible = "ti,omap4-i2c"; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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ti,hwmods = "i2c1"; |
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reg = <0x44e0b000 0x1000>; |
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interrupts = <70>; |
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status = "disabled"; |
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}; |
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i2c1: i2c@4802a000 { |
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compatible = "ti,omap4-i2c"; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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ti,hwmods = "i2c2"; |
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reg = <0x4802a000 0x1000>; |
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interrupts = <71>; |
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status = "disabled"; |
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}; |
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i2c2: i2c@4819c000 { |
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compatible = "ti,omap4-i2c"; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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ti,hwmods = "i2c3"; |
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reg = <0x4819c000 0x1000>; |
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interrupts = <30>; |
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status = "disabled"; |
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}; |
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wdt2: wdt@44e35000 { |
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compatible = "ti,omap3-wdt"; |
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ti,hwmods = "wd_timer2"; |
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reg = <0x44e35000 0x1000>; |
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interrupts = <91>; |
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}; |
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dcan0: d_can@481cc000 { |
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compatible = "bosch,d_can"; |
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ti,hwmods = "d_can0"; |
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reg = <0x481cc000 0x2000 |
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0x44e10644 0x4>; |
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interrupts = <52>; |
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status = "disabled"; |
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}; |
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dcan1: d_can@481d0000 { |
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compatible = "bosch,d_can"; |
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ti,hwmods = "d_can1"; |
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reg = <0x481d0000 0x2000 |
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0x44e10644 0x4>; |
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interrupts = <55>; |
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status = "disabled"; |
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}; |
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timer1: timer@44e31000 { |
||||
compatible = "ti,am335x-timer-1ms"; |
||||
reg = <0x44e31000 0x400>; |
||||
interrupts = <67>; |
||||
ti,hwmods = "timer1"; |
||||
ti,timer-alwon; |
||||
}; |
||||
|
||||
timer2: timer@48040000 { |
||||
compatible = "ti,am335x-timer"; |
||||
reg = <0x48040000 0x400>; |
||||
interrupts = <68>; |
||||
ti,hwmods = "timer2"; |
||||
}; |
||||
|
||||
timer3: timer@48042000 { |
||||
compatible = "ti,am335x-timer"; |
||||
reg = <0x48042000 0x400>; |
||||
interrupts = <69>; |
||||
ti,hwmods = "timer3"; |
||||
}; |
||||
|
||||
timer4: timer@48044000 { |
||||
compatible = "ti,am335x-timer"; |
||||
reg = <0x48044000 0x400>; |
||||
interrupts = <92>; |
||||
ti,hwmods = "timer4"; |
||||
ti,timer-pwm; |
||||
}; |
||||
|
||||
timer5: timer@48046000 { |
||||
compatible = "ti,am335x-timer"; |
||||
reg = <0x48046000 0x400>; |
||||
interrupts = <93>; |
||||
ti,hwmods = "timer5"; |
||||
ti,timer-pwm; |
||||
}; |
||||
|
||||
timer6: timer@48048000 { |
||||
compatible = "ti,am335x-timer"; |
||||
reg = <0x48048000 0x400>; |
||||
interrupts = <94>; |
||||
ti,hwmods = "timer6"; |
||||
ti,timer-pwm; |
||||
}; |
||||
|
||||
timer7: timer@4804a000 { |
||||
compatible = "ti,am335x-timer"; |
||||
reg = <0x4804a000 0x400>; |
||||
interrupts = <95>; |
||||
ti,hwmods = "timer7"; |
||||
ti,timer-pwm; |
||||
}; |
||||
|
||||
rtc@44e3e000 { |
||||
compatible = "ti,da830-rtc"; |
||||
reg = <0x44e3e000 0x1000>; |
||||
interrupts = <75 |
||||
76>; |
||||
ti,hwmods = "rtc"; |
||||
}; |
||||
|
||||
spi0: spi@48030000 { |
||||
compatible = "ti,omap4-mcspi"; |
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
reg = <0x48030000 0x400>; |
||||
interrupts = <65>; |
||||
ti,spi-num-cs = <2>; |
||||
ti,hwmods = "spi0"; |
||||
status = "disabled"; |
||||
}; |
||||
|
||||
spi1: spi@481a0000 { |
||||
compatible = "ti,omap4-mcspi"; |
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
reg = <0x481a0000 0x400>; |
||||
interrupts = <125>; |
||||
ti,spi-num-cs = <2>; |
||||
ti,hwmods = "spi1"; |
||||
status = "disabled"; |
||||
}; |
||||
|
||||
usb: usb@47400000 { |
||||
compatible = "ti,am33xx-usb"; |
||||
reg = <0x47400000 0x1000>; |
||||
ranges; |
||||
#address-cells = <1>; |
||||
#size-cells = <1>; |
||||
ti,hwmods = "usb_otg_hs"; |
||||
status = "disabled"; |
||||
|
||||
ctrl_mod: control@44e10000 { |
||||
compatible = "ti,am335x-usb-ctrl-module"; |
||||
reg = <0x44e10620 0x10 |
||||
0x44e10648 0x4>; |
||||
reg-names = "phy_ctrl", "wakeup"; |
||||
status = "disabled"; |
||||
}; |
||||
|
||||
usb0_phy: usb-phy@47401300 { |
||||
compatible = "ti,am335x-usb-phy"; |
||||
reg = <0x47401300 0x100>; |
||||
reg-names = "phy"; |
||||
status = "disabled"; |
||||
ti,ctrl_mod = <&ctrl_mod>; |
||||
}; |
||||
|
||||
usb0: usb@47401000 { |
||||
compatible = "ti,musb-am33xx"; |
||||
status = "disabled"; |
||||
reg = <0x47401400 0x400 |
||||
0x47401000 0x200>; |
||||
reg-names = "mc", "control"; |
||||
|
||||
interrupts = <18>; |
||||
interrupt-names = "mc"; |
||||
dr_mode = "otg"; |
||||
mentor,multipoint = <1>; |
||||
mentor,num-eps = <16>; |
||||
mentor,ram-bits = <12>; |
||||
mentor,power = <500>; |
||||
phys = <&usb0_phy>; |
||||
|
||||
dmas = <&cppi41dma 0 0 &cppi41dma 1 0 |
||||
&cppi41dma 2 0 &cppi41dma 3 0 |
||||
&cppi41dma 4 0 &cppi41dma 5 0 |
||||
&cppi41dma 6 0 &cppi41dma 7 0 |
||||
&cppi41dma 8 0 &cppi41dma 9 0 |
||||
&cppi41dma 10 0 &cppi41dma 11 0 |
||||
&cppi41dma 12 0 &cppi41dma 13 0 |
||||
&cppi41dma 14 0 &cppi41dma 0 1 |
||||
&cppi41dma 1 1 &cppi41dma 2 1 |
||||
&cppi41dma 3 1 &cppi41dma 4 1 |
||||
&cppi41dma 5 1 &cppi41dma 6 1 |
||||
&cppi41dma 7 1 &cppi41dma 8 1 |
||||
&cppi41dma 9 1 &cppi41dma 10 1 |
||||
&cppi41dma 11 1 &cppi41dma 12 1 |
||||
&cppi41dma 13 1 &cppi41dma 14 1>; |
||||
dma-names = |
||||
"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", |
||||
"rx8", "rx9", "rx10", "rx11", "rx12", "rx13", |
||||
"rx14", "rx15", |
||||
"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", |
||||
"tx8", "tx9", "tx10", "tx11", "tx12", "tx13", |
||||
"tx14", "tx15"; |
||||
}; |
||||
|
||||
usb1_phy: usb-phy@47401b00 { |
||||
compatible = "ti,am335x-usb-phy"; |
||||
reg = <0x47401b00 0x100>; |
||||
reg-names = "phy"; |
||||
status = "disabled"; |
||||
ti,ctrl_mod = <&ctrl_mod>; |
||||
}; |
||||
|
||||
usb1: usb@47401800 { |
||||
compatible = "ti,musb-am33xx"; |
||||
status = "disabled"; |
||||
reg = <0x47401c00 0x400 |
||||
0x47401800 0x200>; |
||||
reg-names = "mc", "control"; |
||||
interrupts = <19>; |
||||
interrupt-names = "mc"; |
||||
dr_mode = "otg"; |
||||
mentor,multipoint = <1>; |
||||
mentor,num-eps = <16>; |
||||
mentor,ram-bits = <12>; |
||||
mentor,power = <500>; |
||||
phys = <&usb1_phy>; |
||||
|
||||
dmas = <&cppi41dma 15 0 &cppi41dma 16 0 |
||||
&cppi41dma 17 0 &cppi41dma 18 0 |
||||
&cppi41dma 19 0 &cppi41dma 20 0 |
||||
&cppi41dma 21 0 &cppi41dma 22 0 |
||||
&cppi41dma 23 0 &cppi41dma 24 0 |
||||
&cppi41dma 25 0 &cppi41dma 26 0 |
||||
&cppi41dma 27 0 &cppi41dma 28 0 |
||||
&cppi41dma 29 0 &cppi41dma 15 1 |
||||
&cppi41dma 16 1 &cppi41dma 17 1 |
||||
&cppi41dma 18 1 &cppi41dma 19 1 |
||||
&cppi41dma 20 1 &cppi41dma 21 1 |
||||
&cppi41dma 22 1 &cppi41dma 23 1 |
||||
&cppi41dma 24 1 &cppi41dma 25 1 |
||||
&cppi41dma 26 1 &cppi41dma 27 1 |
||||
&cppi41dma 28 1 &cppi41dma 29 1>; |
||||
dma-names = |
||||
"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", |
||||
"rx8", "rx9", "rx10", "rx11", "rx12", "rx13", |
||||
"rx14", "rx15", |
||||
"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", |
||||
"tx8", "tx9", "tx10", "tx11", "tx12", "tx13", |
||||
"tx14", "tx15"; |
||||
}; |
||||
|
||||
cppi41dma: dma-controller@07402000 { |
||||
compatible = "ti,am3359-cppi41"; |
||||
reg = <0x47400000 0x1000 |
||||
0x47402000 0x1000 |
||||
0x47403000 0x1000 |
||||
0x47404000 0x4000>; |
||||
reg-names = "glue", "controller", "scheduler", "queuemgr"; |
||||
interrupts = <17>; |
||||
interrupt-names = "glue"; |
||||
#dma-cells = <2>; |
||||
#dma-channels = <30>; |
||||
#dma-requests = <256>; |
||||
status = "disabled"; |
||||
}; |
||||
}; |
||||
|
||||
epwmss0: epwmss@48300000 { |
||||
compatible = "ti,am33xx-pwmss"; |
||||
reg = <0x48300000 0x10>; |
||||
ti,hwmods = "epwmss0"; |
||||
#address-cells = <1>; |
||||
#size-cells = <1>; |
||||
status = "disabled"; |
||||
ranges = <0x48300100 0x48300100 0x80 /* ECAP */ |
||||
0x48300180 0x48300180 0x80 /* EQEP */ |
||||
0x48300200 0x48300200 0x80>; /* EHRPWM */ |
||||
|
||||
ecap0: ecap@48300100 { |
||||
compatible = "ti,am33xx-ecap"; |
||||
#pwm-cells = <3>; |
||||
reg = <0x48300100 0x80>; |
||||
ti,hwmods = "ecap0"; |
||||
status = "disabled"; |
||||
}; |
||||
|
||||
ehrpwm0: ehrpwm@48300200 { |
||||
compatible = "ti,am33xx-ehrpwm"; |
||||
#pwm-cells = <3>; |
||||
reg = <0x48300200 0x80>; |
||||
ti,hwmods = "ehrpwm0"; |
||||
status = "disabled"; |
||||
}; |
||||
}; |
||||
|
||||
epwmss1: epwmss@48302000 { |
||||
compatible = "ti,am33xx-pwmss"; |
||||
reg = <0x48302000 0x10>; |
||||
ti,hwmods = "epwmss1"; |
||||
#address-cells = <1>; |
||||
#size-cells = <1>; |
||||
status = "disabled"; |
||||
ranges = <0x48302100 0x48302100 0x80 /* ECAP */ |
||||
0x48302180 0x48302180 0x80 /* EQEP */ |
||||
0x48302200 0x48302200 0x80>; /* EHRPWM */ |
||||
|
||||
ecap1: ecap@48302100 { |
||||
compatible = "ti,am33xx-ecap"; |
||||
#pwm-cells = <3>; |
||||
reg = <0x48302100 0x80>; |
||||
ti,hwmods = "ecap1"; |
||||
status = "disabled"; |
||||
}; |
||||
|
||||
ehrpwm1: ehrpwm@48302200 { |
||||
compatible = "ti,am33xx-ehrpwm"; |
||||
#pwm-cells = <3>; |
||||
reg = <0x48302200 0x80>; |
||||
ti,hwmods = "ehrpwm1"; |
||||
status = "disabled"; |
||||
}; |
||||
}; |
||||
|
||||
epwmss2: epwmss@48304000 { |
||||
compatible = "ti,am33xx-pwmss"; |
||||
reg = <0x48304000 0x10>; |
||||
ti,hwmods = "epwmss2"; |
||||
#address-cells = <1>; |
||||
#size-cells = <1>; |
||||
status = "disabled"; |
||||
ranges = <0x48304100 0x48304100 0x80 /* ECAP */ |
||||
0x48304180 0x48304180 0x80 /* EQEP */ |
||||
0x48304200 0x48304200 0x80>; /* EHRPWM */ |
||||
|
||||
ecap2: ecap@48304100 { |
||||
compatible = "ti,am33xx-ecap"; |
||||
#pwm-cells = <3>; |
||||
reg = <0x48304100 0x80>; |
||||
ti,hwmods = "ecap2"; |
||||
status = "disabled"; |
||||
}; |
||||
|
||||
ehrpwm2: ehrpwm@48304200 { |
||||
compatible = "ti,am33xx-ehrpwm"; |
||||
#pwm-cells = <3>; |
||||
reg = <0x48304200 0x80>; |
||||
ti,hwmods = "ehrpwm2"; |
||||
status = "disabled"; |
||||
}; |
||||
}; |
||||
|
||||
mac: ethernet@4a100000 { |
||||
compatible = "ti,cpsw"; |
||||
ti,hwmods = "cpgmac0"; |
||||
cpdma_channels = <8>; |
||||
ale_entries = <1024>; |
||||
bd_ram_size = <0x2000>; |
||||
no_bd_ram = <0>; |
||||
rx_descs = <64>; |
||||
mac_control = <0x20>; |
||||
slaves = <2>; |
||||
active_slave = <0>; |
||||
cpts_clock_mult = <0x80000000>; |
||||
cpts_clock_shift = <29>; |
||||
reg = <0x4a100000 0x800 |
||||
0x4a101200 0x100>; |
||||
#address-cells = <1>; |
||||
#size-cells = <1>; |
||||
interrupt-parent = <&intc>; |
||||
/* |
||||
* c0_rx_thresh_pend |
||||
* c0_rx_pend |
||||
* c0_tx_pend |
||||
* c0_misc_pend |
||||
*/ |
||||
interrupts = <40 41 42 43>; |
||||
ranges; |
||||
|
||||
davinci_mdio: mdio@4a101000 { |
||||
compatible = "ti,davinci_mdio"; |
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
ti,hwmods = "davinci_mdio"; |
||||
bus_freq = <1000000>; |
||||
reg = <0x4a101000 0x100>; |
||||
}; |
||||
|
||||
cpsw_emac0: slave@4a100200 { |
||||
/* Filled in by U-Boot */ |
||||
mac-address = [ 00 00 00 00 00 00 ]; |
||||
}; |
||||
|
||||
cpsw_emac1: slave@4a100300 { |
||||
/* Filled in by U-Boot */ |
||||
mac-address = [ 00 00 00 00 00 00 ]; |
||||
}; |
||||
}; |
||||
|
||||
ocmcram: ocmcram@40300000 { |
||||
compatible = "ti,am3352-ocmcram"; |
||||
reg = <0x40300000 0x10000>; |
||||
ti,hwmods = "ocmcram"; |
||||
}; |
||||
|
||||
wkup_m3: wkup_m3@44d00000 { |
||||
compatible = "ti,am3353-wkup-m3"; |
||||
reg = <0x44d00000 0x4000 /* M3 UMEM */ |
||||
0x44d80000 0x2000>; /* M3 DMEM */ |
||||
ti,hwmods = "wkup_m3"; |
||||
}; |
||||
|
||||
elm: elm@48080000 { |
||||
compatible = "ti,am3352-elm"; |
||||
reg = <0x48080000 0x2000>; |
||||
interrupts = <4>; |
||||
ti,hwmods = "elm"; |
||||
status = "disabled"; |
||||
}; |
||||
|
||||
tscadc: tscadc@44e0d000 { |
||||
compatible = "ti,am3359-tscadc"; |
||||
reg = <0x44e0d000 0x1000>; |
||||
interrupt-parent = <&intc>; |
||||
interrupts = <16>; |
||||
ti,hwmods = "adc_tsc"; |
||||
status = "disabled"; |
||||
|
||||
tsc { |
||||
compatible = "ti,am3359-tsc"; |
||||
}; |
||||
am335x_adc: adc { |
||||
#io-channel-cells = <1>; |
||||
compatible = "ti,am3359-adc"; |
||||
}; |
||||
}; |
||||
|
||||
gpmc: gpmc@50000000 { |
||||
compatible = "ti,am3352-gpmc"; |
||||
ti,hwmods = "gpmc"; |
||||
reg = <0x50000000 0x2000>; |
||||
interrupts = <100>; |
||||
gpmc,num-cs = <7>; |
||||
gpmc,num-waitpins = <2>; |
||||
#address-cells = <2>; |
||||
#size-cells = <1>; |
||||
status = "disabled"; |
||||
}; |
||||
}; |
||||
}; |
@ -0,0 +1,15 @@ |
||||
/*
|
||||
* This header provides constants for most GPIO bindings. |
||||
* |
||||
* Most GPIO bindings include a flags cell as part of the GPIO specifier. |
||||
* In most cases, the format of the flags cell uses the standard values |
||||
* defined in this header. |
||||
*/ |
||||
|
||||
#ifndef _DT_BINDINGS_GPIO_GPIO_H |
||||
#define _DT_BINDINGS_GPIO_GPIO_H |
||||
|
||||
#define GPIO_ACTIVE_HIGH 0 |
||||
#define GPIO_ACTIVE_LOW 1 |
||||
|
||||
#endif |
@ -0,0 +1,42 @@ |
||||
/*
|
||||
* This header provides constants specific to AM33XX pinctrl bindings. |
||||
*/ |
||||
|
||||
#ifndef _DT_BINDINGS_PINCTRL_AM33XX_H |
||||
#define _DT_BINDINGS_PINCTRL_AM33XX_H |
||||
|
||||
#include <dt-bindings/pinctrl/omap.h> |
||||
|
||||
/* am33xx specific mux bit defines */ |
||||
#undef PULL_ENA |
||||
#undef INPUT_EN |
||||
|
||||
#define PULL_DISABLE (1 << 3) |
||||
#define INPUT_EN (1 << 5) |
||||
#define SLEWCTRL_FAST (1 << 6) |
||||
|
||||
/* update macro depending on INPUT_EN and PULL_ENA */ |
||||
#undef PIN_OUTPUT |
||||
#undef PIN_OUTPUT_PULLUP |
||||
#undef PIN_OUTPUT_PULLDOWN |
||||
#undef PIN_INPUT |
||||
#undef PIN_INPUT_PULLUP |
||||
#undef PIN_INPUT_PULLDOWN |
||||
|
||||
#define PIN_OUTPUT (PULL_DISABLE) |
||||
#define PIN_OUTPUT_PULLUP (PULL_UP) |
||||
#define PIN_OUTPUT_PULLDOWN 0 |
||||
#define PIN_INPUT (INPUT_EN | PULL_DISABLE) |
||||
#define PIN_INPUT_PULLUP (INPUT_EN | PULL_UP) |
||||
#define PIN_INPUT_PULLDOWN (INPUT_EN) |
||||
|
||||
/* undef non-existing modes */ |
||||
#undef PIN_OFF_NONE |
||||
#undef PIN_OFF_OUTPUT_HIGH |
||||
#undef PIN_OFF_OUTPUT_LOW |
||||
#undef PIN_OFF_INPUT_PULLUP |
||||
#undef PIN_OFF_INPUT_PULLDOWN |
||||
#undef PIN_OFF_WAKEUPENABLE |
||||
|
||||
#endif |
||||
|
@ -0,0 +1,55 @@ |
||||
/*
|
||||
* This header provides constants for OMAP pinctrl bindings. |
||||
* |
||||
* Copyright (C) 2009 Nokia |
||||
* Copyright (C) 2009-2010 Texas Instruments |
||||
*/ |
||||
|
||||
#ifndef _DT_BINDINGS_PINCTRL_OMAP_H |
||||
#define _DT_BINDINGS_PINCTRL_OMAP_H |
||||
|
||||
/* 34xx mux mode options for each pin. See TRM for options */ |
||||
#define MUX_MODE0 0 |
||||
#define MUX_MODE1 1 |
||||
#define MUX_MODE2 2 |
||||
#define MUX_MODE3 3 |
||||
#define MUX_MODE4 4 |
||||
#define MUX_MODE5 5 |
||||
#define MUX_MODE6 6 |
||||
#define MUX_MODE7 7 |
||||
|
||||
/* 24xx/34xx mux bit defines */ |
||||
#define PULL_ENA (1 << 3) |
||||
#define PULL_UP (1 << 4) |
||||
#define ALTELECTRICALSEL (1 << 5) |
||||
|
||||
/* 34xx specific mux bit defines */ |
||||
#define INPUT_EN (1 << 8) |
||||
#define OFF_EN (1 << 9) |
||||
#define OFFOUT_EN (1 << 10) |
||||
#define OFFOUT_VAL (1 << 11) |
||||
#define OFF_PULL_EN (1 << 12) |
||||
#define OFF_PULL_UP (1 << 13) |
||||
#define WAKEUP_EN (1 << 14) |
||||
|
||||
/* 44xx specific mux bit defines */ |
||||
#define WAKEUP_EVENT (1 << 15) |
||||
|
||||
/* Active pin states */ |
||||
#define PIN_OUTPUT 0 |
||||
#define PIN_OUTPUT_PULLUP (PIN_OUTPUT | PULL_ENA | PULL_UP) |
||||
#define PIN_OUTPUT_PULLDOWN (PIN_OUTPUT | PULL_ENA) |
||||
#define PIN_INPUT INPUT_EN |
||||
#define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP) |
||||
#define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN) |
||||
|
||||
/* Off mode states */ |
||||
#define PIN_OFF_NONE 0 |
||||
#define PIN_OFF_OUTPUT_HIGH (OFF_EN | OFFOUT_EN | OFFOUT_VAL) |
||||
#define PIN_OFF_OUTPUT_LOW (OFF_EN | OFFOUT_EN) |
||||
#define PIN_OFF_INPUT_PULLUP (OFF_EN | OFF_PULL_EN | OFF_PULL_UP) |
||||
#define PIN_OFF_INPUT_PULLDOWN (OFF_EN | OFF_PULL_EN) |
||||
#define PIN_OFF_WAKEUPENABLE WAKEUP_EN |
||||
|
||||
#endif |
||||
|
@ -0,0 +1,56 @@ |
||||
/* |
||||
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ |
||||
* |
||||
* This program is free software; you can redistribute it and/or modify |
||||
* it under the terms of the GNU General Public License version 2 as |
||||
* published by the Free Software Foundation. |
||||
*/ |
||||
|
||||
/* |
||||
* Integrated Power Management Chip |
||||
* http://www.ti.com/lit/ds/symlink/tps65217.pdf |
||||
*/ |
||||
|
||||
&tps { |
||||
compatible = "ti,tps65217"; |
||||
|
||||
regulators { |
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
|
||||
dcdc1_reg: regulator@0 { |
||||
reg = <0>; |
||||
regulator-compatible = "dcdc1"; |
||||
}; |
||||
|
||||
dcdc2_reg: regulator@1 { |
||||
reg = <1>; |
||||
regulator-compatible = "dcdc2"; |
||||
}; |
||||
|
||||
dcdc3_reg: regulator@2 { |
||||
reg = <2>; |
||||
regulator-compatible = "dcdc3"; |
||||
}; |
||||
|
||||
ldo1_reg: regulator@3 { |
||||
reg = <3>; |
||||
regulator-compatible = "ldo1"; |
||||
}; |
||||
|
||||
ldo2_reg: regulator@4 { |
||||
reg = <4>; |
||||
regulator-compatible = "ldo2"; |
||||
}; |
||||
|
||||
ldo3_reg: regulator@5 { |
||||
reg = <5>; |
||||
regulator-compatible = "ldo3"; |
||||
}; |
||||
|
||||
ldo4_reg: regulator@6 { |
||||
reg = <6>; |
||||
regulator-compatible = "ldo4"; |
||||
}; |
||||
}; |
||||
}; |
Loading…
Reference in new issue