Wolfgang Denk
16 years ago
commit
5f58f8d20f
@ -0,0 +1,56 @@ |
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#
|
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# (C) Copyright 2003-2008
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
|
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# modify it under the terms of the GNU General Public License as
|
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# published by the Free Software Foundation; either version 2 of
|
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# the License, or (at your option) any later version.
|
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#
|
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# This program is distributed in the hope that it will be useful,
|
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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# GNU General Public License for more details.
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#
|
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# You should have received a copy of the GNU General Public License
|
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# along with this program; if not, write to the Free Software
|
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk |
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LIB = $(obj)lib$(BOARD).a
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COBJS-y += $(BOARD).o
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COBJS-y += led.o
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COBJS-y += misc.o
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ifdef CONFIG_HAS_DATAFLASH |
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COBJS-$(CONFIG_DATAFLASH_MMC_SELECT) += mux.o
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COBJS-y += partition.o
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endif |
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SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS-y))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS) $(SOBJS) |
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$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
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clean: |
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rm -f $(SOBJS) $(OBJS)
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distclean: clean |
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rm -f $(LIB) core *.bak $(obj).depend
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk |
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sinclude $(obj).depend |
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#########################################################################
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@ -0,0 +1,86 @@ |
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/*
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* (C) Copyright 2002 |
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
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* Marius Groeger <mgroeger@sysgo.de> |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <asm/arch/AT91RM9200.h> |
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#include <at91rm9200_net.h> |
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#include <dm9161.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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/* ------------------------------------------------------------------------- */ |
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/*
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* Miscelaneous platform dependent initialisations |
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*/ |
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int board_init (void) |
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{ |
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/* Enable Ctrlc */ |
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console_init_f (); |
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/*
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* Correct IRDA resistor problem |
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* Set PA23_TXD in Output |
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*/ |
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writel(AT91C_PA23_TXD2, ((AT91PS_PIO) AT91C_BASE_PIOA)->PIO_OER); |
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|
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/*
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* memory and cpu-speed are setup before relocation |
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* so we do _nothing_ here |
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*/ |
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/* arch number of AT91RM9200EK-Board */ |
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gd->bd->bi_arch_number = MACH_TYPE_AT91RM9200EK; |
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/* adress of boot parameters */ |
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; |
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return 0; |
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} |
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int dram_init (void) |
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{ |
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gd->bd->bi_dram[0].start = PHYS_SDRAM; |
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gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; |
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return 0; |
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} |
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#if defined(CONFIG_DRIVER_ETHER) && defined(CONFIG_CMD_NET) |
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/*
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* Name: |
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* at91rm9200_GetPhyInterface |
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* Description: |
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* Initialise the interface functions to the PHY |
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* Arguments: |
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* None |
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* Return value: |
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* None |
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*/ |
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void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops) |
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{ |
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p_phyops->Init = dm9161_InitPhy; |
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p_phyops->IsPhyConnected = dm9161_IsPhyConnected; |
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p_phyops->GetLinkSpeed = dm9161_GetLinkSpeed; |
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p_phyops->AutoNegotiate = dm9161_AutoNegotiate; |
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} |
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#endif |
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@ -0,0 +1 @@ |
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TEXT_BASE = 0x21f00000
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@ -0,0 +1,89 @@ |
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/*
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* (C) Copyright 2006 |
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* Atmel Nordic AB <www.atmel.com> |
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* Ulf Samuelsson <ulf@atmel.com> |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <asm/arch/AT91RM9200.h> |
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#include <asm/io.h> |
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#define GREEN_LED AT91C_PIO_PB0 |
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#define YELLOW_LED AT91C_PIO_PB1 |
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#define RED_LED AT91C_PIO_PB2 |
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void green_LED_on(void) |
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{ |
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AT91PS_PIO PIOB = AT91C_BASE_PIOB; |
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writel(GREEN_LED, PIOB->PIO_CODR); |
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} |
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void yellow_LED_on(void) |
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{ |
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AT91PS_PIO PIOB = AT91C_BASE_PIOB; |
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writel(YELLOW_LED, PIOB->PIO_CODR); |
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} |
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void red_LED_on(void) |
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{ |
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AT91PS_PIO PIOB = AT91C_BASE_PIOB; |
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writel(RED_LED, PIOB->PIO_CODR); |
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} |
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void green_LED_off(void) |
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{ |
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AT91PS_PIO PIOB = AT91C_BASE_PIOB; |
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writel(GREEN_LED, PIOB->PIO_SODR); |
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} |
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void yellow_LED_off(void) |
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{ |
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AT91PS_PIO PIOB = AT91C_BASE_PIOB; |
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writel(YELLOW_LED, PIOB->PIO_SODR); |
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} |
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void red_LED_off(void) |
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{ |
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AT91PS_PIO PIOB = AT91C_BASE_PIOB; |
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writel(RED_LED, PIOB->PIO_SODR); |
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} |
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void coloured_LED_init (void) |
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{ |
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AT91PS_PIO PIOB = AT91C_BASE_PIOB; |
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AT91PS_PMC PMC = AT91C_BASE_PMC; |
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/* Enable PIOB clock */ |
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writel((1 << AT91C_ID_PIOB), PMC->PMC_PCER); |
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/* Disable peripherals on LEDs */ |
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writel(AT91C_PIO_PB2 | AT91C_PIO_PB1 | AT91C_PIO_PB0, PIOB->PIO_PER); |
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/* Enable pins as outputs */ |
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writel(AT91C_PIO_PB2 | AT91C_PIO_PB1 | AT91C_PIO_PB0, PIOB->PIO_OER); |
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/* Turn all LEDs OFF */ |
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writel(AT91C_PIO_PB2 | AT91C_PIO_PB1 | AT91C_PIO_PB0, PIOB->PIO_SODR); |
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} |
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@ -0,0 +1,51 @@ |
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/*
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* (C) Copyright 2002 |
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
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* Marius Groeger <mgroeger@sysgo.de> |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <asm/arch/AT91RM9200.h> |
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#include <at91rm9200_net.h> |
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#include <dm9161.h> |
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#include <net.h> |
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int board_late_init(void) |
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{ |
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DECLARE_GLOBAL_DATA_PTR; |
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/* Fix Ethernet Initialization Bug when starting Linux from U-Boot */ |
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eth_init(gd->bd); |
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return 0; |
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} |
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/* checks if addr is in RAM */ |
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int addr2ram(ulong addr) |
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{ |
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int result = 0; |
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if((addr >= PHYS_SDRAM) && (addr < (PHYS_SDRAM + PHYS_SDRAM_SIZE))) |
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result = 1; |
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return result; |
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} |
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@ -0,0 +1,38 @@ |
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#include <config.h> |
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#include <common.h> |
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#include <asm/hardware.h> |
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#include <asm/io.h> |
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#include <dataflash.h> |
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int AT91F_GetMuxStatus(void) |
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{ |
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/* Set in PIO mode */ |
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writel(CONFIG_SYS_DATAFLASH_MMC_PIO, AT91C_BASE_PIOB->PIO_PER); |
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/* Configure in output */ |
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writel(CONFIG_SYS_DATAFLASH_MMC_PIO, AT91C_BASE_PIOB->PIO_OER); |
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if(readl(AT91C_BASE_PIOB->PIO_ODSR) & CONFIG_SYS_DATAFLASH_MMC_PIO) |
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return 1; |
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return 0; |
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} |
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void AT91F_SelectMMC(void) |
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{ |
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/* Set in PIO mode */ |
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writel(CONFIG_SYS_DATAFLASH_MMC_PIO, AT91C_BASE_PIOB->PIO_PER); |
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/* Configure in output */ |
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writel(CONFIG_SYS_DATAFLASH_MMC_PIO, AT91C_BASE_PIOB->PIO_OER); |
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/* Set Output */ |
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writel(CONFIG_SYS_DATAFLASH_MMC_PIO, AT91C_BASE_PIOB->PIO_SODR); |
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} |
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void AT91F_SelectSPI(void) |
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{ |
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/* Set in PIO mode */ |
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writel(CONFIG_SYS_DATAFLASH_MMC_PIO, AT91C_BASE_PIOB->PIO_PER); |
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/* Configure in output */ |
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writel(CONFIG_SYS_DATAFLASH_MMC_PIO, AT91C_BASE_PIOB->PIO_OER); |
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/* Clear Output */ |
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writel(CONFIG_SYS_DATAFLASH_MMC_PIO, AT91C_BASE_PIOB->PIO_CODR); |
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} |
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@ -0,0 +1,38 @@ |
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/*
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* |
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* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
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* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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* |
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*/ |
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#include <common.h> |
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#include <config.h> |
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#include <asm/hardware.h> |
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#include <dataflash.h> |
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AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS]; |
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struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = { |
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{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ |
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{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3, 3} |
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}; |
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|
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/*define the area offsets*/ |
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dataflash_protect_t area_list[NB_DATAFLASH_AREA] = { |
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{0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"}, |
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{0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"}, |
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{0x00008400, 0x00041FFF, FLAG_PROTECT_SET, 0, "U-Boot"}, |
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{0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"}, |
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{0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"}, |
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}; |
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@ -0,0 +1,56 @@ |
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/* |
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* (C) Copyright 2002 |
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* Gary Jennejohn, DENX Software Engineering, <gj@denx.de> |
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* |
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* See file CREDITS for list of people who contributed to this |
||||
* project. |
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* |
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* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
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*/ |
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|
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OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") |
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OUTPUT_ARCH(arm) |
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ENTRY(_start) |
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SECTIONS |
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{ |
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. = 0x00000000; |
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|
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. = ALIGN(4); |
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.text : |
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{ |
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cpu/arm920t/start.o (.text) |
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*(.text) |
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} |
||||
|
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. = ALIGN(4); |
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.rodata : { *(.rodata) } |
||||
|
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. = ALIGN(4); |
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.data : { *(.data) } |
||||
|
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. = ALIGN(4); |
||||
.got : { *(.got) } |
||||
|
||||
. = .; |
||||
__u_boot_cmd_start = .; |
||||
.u_boot_cmd : { *(.u_boot_cmd) } |
||||
__u_boot_cmd_end = .; |
||||
|
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. = ALIGN(4); |
||||
__bss_start = .; |
||||
.bss : { *(.bss) } |
||||
_end = .; |
||||
} |
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@ -0,0 +1,65 @@ |
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/*
|
||||
* (C) Copyright 2000 |
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#include <common.h> |
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#include <command.h> |
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|
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static int mmc_nspi (const char *); |
||||
|
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int do_dataflash_mmc_mux (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
||||
{ |
||||
switch (argc) { |
||||
case 2: /* on / off */ |
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switch (mmc_nspi (argv[1])) { |
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case 0: AT91F_SelectSPI (); |
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break; |
||||
case 1: AT91F_SelectMMC (); |
||||
break; |
||||
} |
||||
case 1: /* get status */ |
||||
printf ("Mux is configured to be %s\n", |
||||
AT91F_GetMuxStatus () ? "MMC" : "SPI"); |
||||
return 0; |
||||
default: |
||||
printf ("Usage:\n%s\n", cmdtp->usage); |
||||
return 1; |
||||
} |
||||
return 0; |
||||
} |
||||
|
||||
static int mmc_nspi (const char *s) |
||||
{ |
||||
if (strcmp (s, "mmc") == 0) { |
||||
return 1; |
||||
} else if (strcmp (s, "spi") == 0) { |
||||
return 0; |
||||
} |
||||
return -1; |
||||
} |
||||
|
||||
U_BOOT_CMD( |
||||
dataflash_mmc_mux, 2, 1, do_dataflash_mmc_mux, |
||||
"dataflash_mmc_mux\t- enable or disable MMC or SPI\n", |
||||
"[mmc, spi]\n" |
||||
" - enable or disable MMC or SPI\n" |
||||
); |
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@ -0,0 +1,5 @@ |
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# |
||||
# Generated files |
||||
# |
||||
|
||||
/u-boot.lds |
||||
@ -0,0 +1,46 @@ |
||||
#
|
||||
# (C) Copyright 2008
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk |
||||
|
||||
LIB := $(obj)libwatchdog.a
|
||||
|
||||
COBJS-$(CONFIG_AT91SAM9_WATCHDOG) += at91sam9_wdt.o
|
||||
|
||||
COBJS := $(COBJS-y)
|
||||
SRCS := $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS))
|
||||
|
||||
all: $(LIB) |
||||
|
||||
$(LIB): $(obj).depend $(OBJS) |
||||
$(AR) $(ARFLAGS) $@ $(OBJS)
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk |
||||
|
||||
sinclude $(obj).depend |
||||
|
||||
#########################################################################
|
||||
@ -0,0 +1,79 @@ |
||||
/*
|
||||
* [origin: Linux kernel drivers/watchdog/at91sam9_wdt.c] |
||||
* |
||||
* Watchdog driver for Atmel AT91SAM9x processors. |
||||
* |
||||
* Copyright (C) 2008 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
||||
* Copyright (C) 2008 Renaud CERRATO r.cerrato@til-technologies.fr |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License |
||||
* as published by the Free Software Foundation; either version |
||||
* 2 of the License, or (at your option) any later version. |
||||
*/ |
||||
|
||||
/*
|
||||
* The Watchdog Timer Mode Register can be only written to once. If the |
||||
* timeout need to be set from U-Boot, be sure that the bootstrap doesn't |
||||
* write to this register. Inform Linux to it too |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <watchdog.h> |
||||
#include <asm/arch/hardware.h> |
||||
#include <asm/arch/io.h> |
||||
#include <asm/arch/at91_wdt.h> |
||||
|
||||
/*
|
||||
* AT91SAM9 watchdog runs a 12bit counter @ 256Hz, |
||||
* use this to convert a watchdog |
||||
* value from/to milliseconds. |
||||
*/ |
||||
#define ms_to_ticks(t) (((t << 8) / 1000) - 1) |
||||
#define ticks_to_ms(t) (((t + 1) * 1000) >> 8) |
||||
|
||||
/* Hardware timeout in seconds */ |
||||
#define WDT_HW_TIMEOUT 2 |
||||
|
||||
/*
|
||||
* Set the watchdog time interval in 1/256Hz (write-once) |
||||
* Counter is 12 bit. |
||||
*/ |
||||
static int at91_wdt_settimeout(unsigned int timeout) |
||||
{ |
||||
unsigned int reg; |
||||
unsigned int mr; |
||||
|
||||
/* Check if disabled */ |
||||
mr = at91_sys_read(AT91_WDT_MR); |
||||
if (mr & AT91_WDT_WDDIS) { |
||||
printf("sorry, watchdog is disabled\n"); |
||||
return -1; |
||||
} |
||||
|
||||
/*
|
||||
* All counting occurs at SLOW_CLOCK / 128 = 256 Hz |
||||
* |
||||
* Since WDV is a 12-bit counter, the maximum period is |
||||
* 4096 / 256 = 16 seconds. |
||||
*/ |
||||
reg = AT91_WDT_WDRSTEN /* causes watchdog reset */ |
||||
/* | AT91_WDT_WDRPROC causes processor reset only */ |
||||
| AT91_WDT_WDDBGHLT /* disabled in debug mode */ |
||||
| AT91_WDT_WDD /* restart at any time */ |
||||
| (timeout & AT91_WDT_WDV); /* timer value */ |
||||
at91_sys_write(AT91_WDT_MR, reg); |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
void hw_watchdog_reset(void) |
||||
{ |
||||
at91_sys_write(AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT); |
||||
} |
||||
|
||||
void hw_watchdog_init(void) |
||||
{ |
||||
/* 16 seconds timer, resets enabled */ |
||||
at91_wdt_settimeout(ms_to_ticks(WDT_HW_TIMEOUT * 1000)); |
||||
} |
||||
@ -0,0 +1,38 @@ |
||||
/*
|
||||
* [origin: Linux kernel arch/arm/mach-at91/include/mach/at91_wdt.h] |
||||
* |
||||
* Copyright (C) 2008 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
||||
* Copyright (C) 2007 Andrew Victor |
||||
* Copyright (C) 2007 Atmel Corporation. |
||||
* |
||||
* Watchdog Timer (WDT) - System peripherals regsters. |
||||
* Based on AT91SAM9261 datasheet revision D. |
||||
* |
||||
* This program is free software; you can redistribute it and/or modify |
||||
* it under the terms of the GNU General Public License as published by |
||||
* the Free Software Foundation; either version 2 of the License, or |
||||
* (at your option) any later version. |
||||
*/ |
||||
|
||||
#ifndef AT91_WDT_H |
||||
#define AT91_WDT_H |
||||
|
||||
#define AT91_WDT_CR (AT91_WDT + 0x00) /* Watchdog Control Register */ |
||||
#define AT91_WDT_WDRSTT (1 << 0) /* Restart */ |
||||
#define AT91_WDT_KEY (0xa5 << 24) /* KEY Password */ |
||||
|
||||
#define AT91_WDT_MR (AT91_WDT + 0x04) /* Watchdog Mode Register */ |
||||
#define AT91_WDT_WDV (0xfff << 0) /* Counter Value */ |
||||
#define AT91_WDT_WDFIEN (1 << 12) /* Fault Interrupt Enable */ |
||||
#define AT91_WDT_WDRSTEN (1 << 13) /* Reset Processor */ |
||||
#define AT91_WDT_WDRPROC (1 << 14) /* Timer Restart */ |
||||
#define AT91_WDT_WDDIS (1 << 15) /* Watchdog Disable */ |
||||
#define AT91_WDT_WDD (0xfff << 16) /* Delta Value */ |
||||
#define AT91_WDT_WDDBGHLT (1 << 28) /* Debug Halt */ |
||||
#define AT91_WDT_WDIDLEHLT (1 << 29) /* Idle Halt */ |
||||
|
||||
#define AT91_WDT_SR (AT91_WDT + 0x08) /* Watchdog Status Register */ |
||||
#define AT91_WDT_WDUNF (1 << 0) /* Watchdog Underflow */ |
||||
#define AT91_WDT_WDERR (1 << 1) /* Watchdog Error */ |
||||
|
||||
#endif |
||||
@ -0,0 +1,327 @@ |
||||
/*
|
||||
* Ulf Samuelsson <ulf@atmel.com> |
||||
* Rick Bronson <rick@efn.org> |
||||
* |
||||
* Configuration settings for the AT91RM9200EK board. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#ifndef __CONFIG_H |
||||
#define __CONFIG_H |
||||
|
||||
/* ARM asynchronous clock */ |
||||
/*
|
||||
* from 18.432 MHz crystal |
||||
* (18432000 / 4 * 39) |
||||
*/ |
||||
#define AT91C_MAIN_CLOCK 179712000 |
||||
/*
|
||||
* peripheral clock |
||||
* (AT91C_MASTER_CLOCK / 3) |
||||
*/ |
||||
#define AT91C_MASTER_CLOCK 59904000 |
||||
|
||||
#define AT91_SLOW_CLOCK 32768 /* slow clock */ |
||||
|
||||
#define CONFIG_ARM920T 1 /* This is an ARM920T Core */ |
||||
#define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */ |
||||
#define CONFIG_AT91RM9200EK 1 /* on an AT91RM9200EK Board */ |
||||
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ |
||||
#define USE_920T_MMU 1 |
||||
|
||||
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
||||
#define CONFIG_SETUP_MEMORY_TAGS 1 |
||||
#define CONFIG_INITRD_TAG 1 |
||||
|
||||
/*
|
||||
* LowLevel Init |
||||
*/ |
||||
#ifndef CONFIG_SKIP_LOWLEVEL_INIT |
||||
#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 |
||||
/* flash */ |
||||
#define CONFIG_SYS_MC_PUIA_VAL 0x00000000 |
||||
#define CONFIG_SYS_MC_PUP_VAL 0x00000000 |
||||
#define CONFIG_SYS_MC_PUER_VAL 0x00000000 |
||||
#define CONFIG_SYS_MC_ASR_VAL 0x00000000 |
||||
#define CONFIG_SYS_MC_AASR_VAL 0x00000000 |
||||
#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 |
||||
#define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ |
||||
|
||||
/* clocks */ |
||||
#define CONFIG_SYS_PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */ |
||||
#define CONFIG_SYS_PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */ |
||||
/* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */ |
||||
#define CONFIG_SYS_MCKR_VAL 0x00000202 |
||||
|
||||
/* sdram */ |
||||
#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */ |
||||
#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000 |
||||
#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000 |
||||
#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */ |
||||
#define CONFIG_SYS_SDRC_CR_VAL 0x2188c155 /* set up the CONFIG_SYS_SDRAM */ |
||||
#define CONFIG_SYS_SDRAM 0x20000000 /* address of the CONFIG_SYS_SDRAM */ |
||||
#define CONFIG_SYS_SDRAM1 0x20000080 /* address of the CONFIG_SYS_SDRAM */ |
||||
#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */ |
||||
#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */ |
||||
#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */ |
||||
#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ |
||||
#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */ |
||||
#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ |
||||
#else |
||||
#define CONFIG_SKIP_RELOCATE_UBOOT |
||||
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ |
||||
|
||||
/* hardcode so no __divsi3 : AT91C_MASTER_CLOCK / baudrate / 16 */ |
||||
#define CONFIG_SYS_AT91C_BRGR_DIVISOR 33 |
||||
|
||||
/*
|
||||
* Memory Configuration |
||||
*/ |
||||
#define CONFIG_NR_DRAM_BANKS 1 |
||||
#define PHYS_SDRAM 0x20000000 |
||||
#define PHYS_SDRAM_SIZE 0x02000000 /* 32 megs */ |
||||
|
||||
#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM |
||||
#define CONFIG_SYS_MEMTEST_END \ |
||||
(CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 262144) |
||||
|
||||
/*
|
||||
* Hardware drivers |
||||
*/ |
||||
|
||||
/*
|
||||
* UART Configuration |
||||
* |
||||
* define one of these to choose the DBGU, |
||||
* USART0 or USART1 as console |
||||
*/ |
||||
#define CONFIG_AT91RM9200_USART |
||||
#define CONFIG_DBGU |
||||
#undef CONFIG_USART0 |
||||
#undef CONFIG_USART1 |
||||
/* don't include RTS/CTS flow control support */ |
||||
#undef CONFIG_HWFLOW |
||||
/* disable modem initialization stuff */ |
||||
#undef CONFIG_MODEM_SUPPORT |
||||
|
||||
#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } |
||||
#define CONFIG_BAUDRATE 115200 |
||||
|
||||
/*
|
||||
* Command line configuration. |
||||
*/ |
||||
#include <config_cmd_default.h> |
||||
|
||||
#define CONFIG_CMD_DHCP |
||||
#define CONFIG_CMD_FAT |
||||
#define CONFIG_CMD_MII |
||||
#define CONFIG_CMD_PING |
||||
|
||||
#undef CONFIG_CMD_BDI |
||||
#undef CONFIG_CMD_IMI |
||||
#undef CONFIG_CMD_FPGA |
||||
#undef CONFIG_CMD_MISC |
||||
#undef CONFIG_CMD_LOADS |
||||
|
||||
#include <asm/arch/AT91RM9200.h> /* needed for port definitions */ |
||||
/* Options for MMC/SD Card */ |
||||
#define CONFIG_DOS_PARTITION 1 |
||||
#undef CONFIG_MMC |
||||
#define CONFIG_SYS_MMC_BASE 0xFFFB4000 |
||||
#define CONFIG_SYS_MMC_BLOCKSIZE 512 |
||||
|
||||
/*
|
||||
* Network Driver Setting |
||||
*/ |
||||
#define CONFIG_DRIVER_ETHER |
||||
#define CONFIG_NET_RETRY_COUNT 20 |
||||
#define CONFIG_AT91C_USE_RMII |
||||
|
||||
/*
|
||||
* AC Characteristics |
||||
* DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns |
||||
*/ |
||||
#define DATAFLASH_TCSS (0xC << 16) |
||||
#define DATAFLASH_TCHS (0x1 << 24) |
||||
|
||||
#if defined(CONFIG_HAS_DATAFLASH) |
||||
#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ) |
||||
#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2 |
||||
#define CONFIG_SYS_MAX_DATAFLASH_PAGES 16384 |
||||
/* Logical adress for CS0 */ |
||||
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 |
||||
/* Logical adress for CS3 */ |
||||
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 |
||||
#define CONFIG_SYS_SUPPORT_BLOCK_ERASE 1 |
||||
#define CONFIG_SYS_DATAFLASH_MMC_PIO AT91C_PIO_PB22 |
||||
#endif |
||||
|
||||
/*
|
||||
* NOR Flash |
||||
*/ |
||||
#define CONFIG_SYS_FLASH_BASE 0x10000000 |
||||
#define PHYS_FLASH_SIZE 0x800000 /* 8MB */ |
||||
#define CONFIG_SYS_FLASH_CFI 1 |
||||
#define CONFIG_FLASH_CFI_DRIVER 1 |
||||
#define CONFIG_SYS_MAX_FLASH_BANKS 1 |
||||
#define CONFIG_SYS_MAX_FLASH_SECT 256 |
||||
#define CONFIG_SYS_FLASH_PROTECTION |
||||
|
||||
/*
|
||||
* Environment Settings |
||||
*/ |
||||
#ifdef CONFIG_ENV_IS_IN_DATAFLASH |
||||
/*
|
||||
* Datasflash Environment Settings |
||||
*/ |
||||
#define CONFIG_ENV_OFFSET 0x4200 |
||||
#define CONFIG_ENV_ADDR \ |
||||
(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) |
||||
/* 8 * 1056 really , but start.s is not OK with this*/ |
||||
#define CONFIG_ENV_SIZE 0x2000 |
||||
|
||||
#else |
||||
/*
|
||||
* NOR Flash Environment Settings |
||||
*/ |
||||
#define CONFIG_ENV_IS_IN_FLASH 1 |
||||
|
||||
#ifdef CONFIG_SKIP_LOWLEVEL_INIT |
||||
/*
|
||||
* between boot.bin and u-boot.bin.gz |
||||
*/ |
||||
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0xe000) |
||||
#define CONFIG_ENV_SIZE 0x10000 /* sectors are 64K here */ |
||||
#else |
||||
/*
|
||||
* after u-boot.bin |
||||
*/ |
||||
#define CONFIG_ENV_ADDR \ |
||||
(CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) |
||||
#define CONFIG_ENV_SIZE 0x10000 /* sectors are 64K here */ |
||||
/* The following #defines are needed to get flash environment right */ |
||||
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE |
||||
#define CONFIG_SYS_MONITOR_LEN \ |
||||
(CONFIG_SYS_BOOT_SIZE + CONFIG_SYS_U_BOOT_SIZE) |
||||
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ |
||||
|
||||
#endif /* CONFIG_ENV_IS_IN_DATAFLASH */ |
||||
|
||||
/*
|
||||
* Boot option |
||||
*/ |
||||
#define CONFIG_BOOTDELAY 3 |
||||
|
||||
#ifdef CONFIG_SKIP_LOWLEVEL_INIT |
||||
/* boot.bin, env, u-boot.bin.gz */ |
||||
#define CONFIG_SYS_BOOT_SIZE 0x6000 /* 24 KBytes */ |
||||
#define CONFIG_SYS_U_BOOT_BASE (CONFIG_SYS_FLASH_BASE + 0x10000) |
||||
#define CONFIG_SYS_U_BOOT_SIZE 0x10000 /* 64 KBytes */ |
||||
#else |
||||
/* u-boot.bin */ |
||||
#define CONFIG_SYS_BOOT_SIZE 0x0 /* 0 KBytes */ |
||||
#define CONFIG_SYS_U_BOOT_BASE CONFIG_SYS_FLASH_BASE |
||||
#define CONFIG_SYS_U_BOOT_SIZE 0x40000 /* 128 KBytes */ |
||||
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ |
||||
|
||||
#define CONFIG_SYS_LOAD_ADDR 0x21000000 /* default load address */ |
||||
#define CONFIG_ENV_OVERWRITE 1 |
||||
|
||||
/*
|
||||
* USB Config |
||||
*/ |
||||
#define CONFIG_CMD_USB |
||||
#define CONFIG_USB_OHCI_NEW 1 |
||||
#define CONFIG_USB_KEYBOARD 1 |
||||
#define CONFIG_USB_STORAGE 1 |
||||
#define CONFIG_DOS_PARTITION 1 |
||||
|
||||
#undef CONFIG_SYS_USB_OHCI_BOARD_INIT |
||||
#define CONFIG_SYS_USB_OHCI_CPU_INIT 1 |
||||
#define CONFIG_SYS_USB_OHCI_REGS_BASE AT91_USB_HOST_BASE |
||||
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91rm9200" |
||||
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 |
||||
|
||||
/*
|
||||
* I2C |
||||
*/ |
||||
#define CONFIG_HARD_I2C |
||||
|
||||
#ifdef CONFIG_HARD_I2C |
||||
#define CONFIG_CMD_I2C |
||||
#define CONFIG_I2C_CMD_TREE |
||||
#define CONFIG_SYS_I2C_SPEED 0 /* not used */ |
||||
#define CONFIG_SYS_I2C_SLAVE 0 /* not used */ |
||||
#endif |
||||
|
||||
/*
|
||||
* Shell Settings |
||||
*/ |
||||
#define CONFIG_CMDLINE_EDITING 1 |
||||
#define CONFIG_SYS_LONGHELP 1 |
||||
#define CONFIG_AUTO_COMPLETE 1 |
||||
#define CONFIG_SYS_HUSH_PARSER 1 |
||||
#define CONFIG_SYS_PROMPT "U-Boot> " |
||||
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " |
||||
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
||||
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
||||
/* Print Buffer Size */ |
||||
#define CONFIG_SYS_PBSIZE \ |
||||
(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
||||
|
||||
#ifndef __ASSEMBLY__ |
||||
/*-----------------------------------------------------------------------
|
||||
* Board specific extension for bd_info |
||||
* |
||||
* This structure is embedded in the global bd_info (bd_t) structure |
||||
* and can be used by the board specific code (eg board/...) |
||||
*/ |
||||
|
||||
struct bd_info_ext { |
||||
/* helper variable for board environment handling
|
||||
* |
||||
* env_crc_valid == 0 => uninitialised |
||||
* env_crc_valid > 0 => environment crc in flash is valid |
||||
* env_crc_valid < 0 => environment crc in flash is invalid |
||||
*/ |
||||
int env_crc_valid; |
||||
}; |
||||
#endif |
||||
|
||||
#define CONFIG_SYS_HZ 1000 |
||||
/*
|
||||
* AT91C_TC0_CMR is implicitly set to |
||||
* AT91C_TC_TIMER_DIV1_CLOCK |
||||
*/ |
||||
#define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK / 2) |
||||
|
||||
#define ROUND(A, B) (((A) + (B)) & ~((B) - 1)) |
||||
/*
|
||||
* Size of malloc() pool |
||||
*/ |
||||
#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024 \ |
||||
, 0x1000) |
||||
/* size in bytes reserved for initial data */ |
||||
#define CONFIG_SYS_GBL_DATA_SIZE 128 |
||||
|
||||
#define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ |
||||
#define CONFIG_STACKSIZE_IRQ (4 * 1024) /* Unsure if to big or to small*/ |
||||
#define CONFIG_STACKSIZE_FIQ (4 * 1024) /* Unsure if to big or to small*/ |
||||
#endif |
||||
Loading…
Reference in new issue