@ -269,7 +269,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
# define CONFIG_SYS_PCI1_MEM_BUS 0xc0000000
# define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BUS
# define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000 /* 512M */
# define CONFIG_SYS_PCI1_IO_BASE 0x00000000
# define CONFIG_SYS_PCI1_IO_BUS 0x00000000
# define CONFIG_SYS_PCI1_IO_PHYS 0xe1000000
# define CONFIG_SYS_PCI1_IO_SIZE 0x00010000 /* 64k */
@ -277,7 +277,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
# define CONFIG_SYS_PCIE2_MEM_BUS 0x80000000
# define CONFIG_SYS_PCIE2_MEM_PHYS CONFIG_SYS_PCIE2_MEM_BUS
# define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */
# define CONFIG_SYS_PCIE2_IO_BASE 0x00000000
# define CONFIG_SYS_PCIE2_IO_BUS 0x00000000
# define CONFIG_SYS_PCIE2_IO_PHYS 0xe1010000
# define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */
@ -285,7 +285,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
# define CONFIG_SYS_PCIE1_MEM_BUS 0xa0000000
# define CONFIG_SYS_PCIE1_MEM_PHYS CONFIG_SYS_PCIE1_MEM_BUS
# define CONFIG_SYS_PCIE1_MEM_SIZE 0x10000000 /* 256M */
# define CONFIG_SYS_PCIE1_IO_BASE 0x00000000
# define CONFIG_SYS_PCIE1_IO_BUS 0x00000000
# define CONFIG_SYS_PCIE1_IO_PHYS 0xe1020000
# define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */
@ -293,7 +293,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
# define CONFIG_SYS_PCIE3_MEM_BUS 0xb0000000
# define CONFIG_SYS_PCIE3_MEM_PHYS CONFIG_SYS_PCIE3_MEM_BUS
# define CONFIG_SYS_PCIE3_MEM_SIZE 0x00100000 /* 1M */
# define CONFIG_SYS_PCIE3_IO_BASE 0x00000000
# define CONFIG_SYS_PCIE3_IO_BUS 0x00000000
# define CONFIG_SYS_PCIE3_IO_PHYS 0xb0100000 /* reuse mem LAW */
# define CONFIG_SYS_PCIE3_IO_SIZE 0x00100000 /* 1M */
# define CONFIG_SYS_PCIE3_MEM_BUS2 0xb0200000
@ -336,8 +336,8 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
# endif
# ifndef CONFIG_PCI_PNP
# define PCI_ENET0_IOADDR CONFIG_SYS_PCI1_IO_BASE
# define PCI_ENET0_MEMADDR CONFIG_SYS_PCI1_IO_BASE
# define PCI_ENET0_IOADDR CONFIG_SYS_PCI1_IO_BUS
# define PCI_ENET0_MEMADDR CONFIG_SYS_PCI1_IO_BUS
# define PCI_IDSEL_NUMBER 0x11 /* IDSEL = AD11 */
# endif