OMAP3: Add OMAP3 auto detection

This patch adds OMAP3 cpu type auto detection based on OMAP3 register
and removes hardcoded values.

Signed-off-by: Steve Sakoman <sakoman@gmail.com>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
master
Dirk Behme 16 years ago committed by Jean-Christophe PLAGNIOL-VILLARD
parent f956fd0338
commit 6530a8bf8a
  1. 1
      board/omap3/beagle/beagle.h
  2. 1
      board/omap3/evm/evm.h
  3. 1
      board/omap3/overo/overo.h
  4. 1
      board/omap3/pandora/pandora.h
  5. 1
      board/omap3/zoom1/zoom1.h
  6. 31
      cpu/arm_cortexa8/omap3/sys_info.c
  7. 20
      include/asm-arm/arch-omap3/cpu.h
  8. 1
      include/asm-arm/arch-omap3/sys_proto.h

@ -27,7 +27,6 @@ const omap3_sysinfo sysinfo = {
SDP_3430_V1,
SDP_3430_V2,
DDR_STACKED,
"3530",
"OMAP3 Beagle board",
#if defined(CONFIG_ENV_IS_IN_ONENAND)
"OneNAND",

@ -27,7 +27,6 @@ const omap3_sysinfo sysinfo = {
OMAP3EVM_V1,
OMAP3EVM_V2,
DDR_DISCRETE,
"35X-Family",
"OMAP3 EVM board",
#if defined(CONFIG_ENV_IS_IN_ONENAND)
"OneNAND",

@ -27,7 +27,6 @@ const omap3_sysinfo sysinfo = {
SDP_3430_V1,
SDP_3430_V2,
DDR_STACKED,
"3503",
"Gumstix Overo board",
#if defined(CONFIG_ENV_IS_IN_ONENAND)
"OneNAND",

@ -27,7 +27,6 @@ const omap3_sysinfo sysinfo = {
SDP_3430_V1,
SDP_3430_V2,
DDR_STACKED,
"3530",
"OMAP3 Pandora",
"NAND",
};

@ -31,7 +31,6 @@ const omap3_sysinfo sysinfo = {
SDP_3430_V1,
SDP_3430_V2,
DDR_STACKED,
"3430",
"OMAP3 Zoom MDK Rev 1",
"NAND",
};

@ -37,6 +37,14 @@ static sdrc_t *sdrc_base = (sdrc_t *)OMAP34XX_SDRC_BASE;
static ctrl_t *ctrl_base = (ctrl_t *)OMAP34XX_CTRL_BASE;
/******************************************
* get_cpu_type(void) - extract cpu info
******************************************/
u32 get_cpu_type(void)
{
return readl(&ctrl_base->ctrl_omap_stat);
}
/******************************************
* get_cpu_rev(void) - extract version info
******************************************/
u32 get_cpu_rev(void)
@ -156,7 +164,25 @@ u32 get_board_rev(void)
*********************************************************************/
void display_board_info(u32 btype)
{
char *mem_s, *sec_s;
char *cpu_s, *mem_s, *sec_s;
switch (get_cpu_type()) {
case OMAP3503:
cpu_s = "3503";
break;
case OMAP3515:
cpu_s = "3515";
break;
case OMAP3525:
cpu_s = "3525";
break;
case OMAP3530:
cpu_s = "3530";
break;
default:
cpu_s = "35XX";
break;
}
if (is_mem_sdr())
mem_s = "mSDR";
@ -180,7 +206,8 @@ void display_board_info(u32 btype)
sec_s = "?";
}
printf("OMAP%s-%s rev %d, CPU-OPP2 L3-165MHz\n", sysinfo.cpu_string,
printf("OMAP%s-%s rev %d, CPU-OPP2 L3-165MHz\n", cpu_s,
sec_s, get_cpu_rev());
printf("%s + %s/%s\n", sysinfo.board_string,
mem_s, sysinfo.nand_string);

@ -35,11 +35,31 @@ typedef struct ctrl {
unsigned short gpmc_nwe; /* 0xC4 */
unsigned char res2[0x22A];
unsigned int status; /* 0x2F0 */
unsigned int gpstatus; /* 0x2F4 */
unsigned char res3[0x08];
unsigned int rpubkey_0; /* 0x300 */
unsigned int rpubkey_1; /* 0x304 */
unsigned int rpubkey_2; /* 0x308 */
unsigned int rpubkey_3; /* 0x30C */
unsigned int rpubkey_4; /* 0x310 */
unsigned char res4[0x04];
unsigned int randkey_0; /* 0x318 */
unsigned int randkey_1; /* 0x31C */
unsigned int randkey_2; /* 0x320 */
unsigned int randkey_3; /* 0x324 */
unsigned char res5[0x124];
unsigned int ctrl_omap_stat; /* 0x44C */
} ctrl_t;
#else /* __ASSEMBLY__ */
#define CONTROL_STATUS 0x2F0
#endif /* __ASSEMBLY__ */
/* cpu type */
#define OMAP3503 0x5c00
#define OMAP3515 0x1c00
#define OMAP3525 0x4c00
#define OMAP3530 0x0c00
/* device type */
#define DEVICE_MASK (0x7 << 8)
#define SYSBOOT_MASK 0x1F

@ -25,7 +25,6 @@ typedef struct {
u32 board_type_v1;
u32 board_type_v2;
u32 mtype;
char *cpu_string;
char *board_string;
char *nand_string;
} omap3_sysinfo;

Loading…
Cancel
Save