commit
65b7fe28a1
@ -0,0 +1,58 @@ |
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/*
|
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* Simulate a SPI port and clients (see README.sandbox for details) |
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* |
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* Copyright (c) 2011-2013 The Chromium OS Authors. |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* Licensed under the GPL-2 or later. |
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*/ |
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|
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#ifndef __ASM_SPI_H__ |
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#define __ASM_SPI_H__ |
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|
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#include <linux/types.h> |
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|
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/*
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* The interface between the SPI bus and the SPI client. The bus will |
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* instantiate a client, and that then call into it via these entry |
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* points. These should be enough for the client to emulate the SPI |
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* device just like the real hardware. |
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*/ |
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struct sandbox_spi_emu_ops { |
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/* The bus wants to instantiate a new client, so setup everything */ |
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int (*setup)(void **priv, const char *spec); |
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/* The bus is done with us, so break things down */ |
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void (*free)(void *priv); |
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/* The CS has been "activated" -- we won't worry about low/high */ |
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void (*cs_activate)(void *priv); |
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/* The CS has been "deactivated" -- we won't worry about low/high */ |
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void (*cs_deactivate)(void *priv); |
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/* The client is rx-ing bytes from the bus, so it should tx some */ |
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int (*xfer)(void *priv, const u8 *rx, u8 *tx, uint bytes); |
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}; |
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|
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/*
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* There are times when the data lines are allowed to tristate. What |
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* is actually sensed on the line depends on the hardware. It could |
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* always be 0xFF/0x00 (if there are pull ups/downs), or things could |
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* float and so we'd get garbage back. This func encapsulates that |
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* scenario so we can worry about the details here. |
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*/ |
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static inline void sandbox_spi_tristate(u8 *buf, uint len) |
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{ |
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/* XXX: make this into a user config option ? */ |
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memset(buf, 0xff, len); |
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} |
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|
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/*
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* Extract the bus/cs from the spi spec and return the start of the spi |
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* client spec. If the bus/cs are invalid for the current config, then |
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* it returns NULL. |
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* |
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* Example: arg="0:1:foo" will set bus to 0, cs to 1, and return "foo" |
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*/ |
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const char *sandbox_spi_parse_spec(const char *arg, unsigned long *bus, |
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unsigned long *cs); |
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#endif |
@ -0,0 +1,64 @@ |
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Sandbox SPI/SPI Flash Implementation |
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==================================== |
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U-Boot supports SPI and SPI flash emuation in sandbox. This must be enabled |
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using the --spi_sf paramter when starting U-Boot. |
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For example: |
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$ make O=sandbox sandbox_config |
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$ make O=sandbox |
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$ ./sandbox/u-boot --spi_sf 0:0:W25Q128:b/chromeos_peach/out/image.bin |
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The four parameters to spi_sf are: |
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SPI bus number (typically 0) |
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SPI chip select number (typically 0) |
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SPI chip to emulate |
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File containing emulated data |
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Supported chips are W25Q16 (2MB), W25Q32 (4MB) and W25Q128 (16MB). Once |
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U-Boot it started you can use 'sf' commands as normal. For example: |
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$ ./b/sandbox/u-boot --spi_sf 0:0:W25Q128:b/chromeos_peach/out/image.bin \ |
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-c "sf probe; sf test 0 100000; sf read 0 1000 1000; \ |
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sf erase 1000 1000; sf write 0 1000 1000" |
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U-Boot 2013.10-00237-gd4e0fdb (Nov 07 2013 - 20:08:15) |
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DRAM: 128 MiB |
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Using default environment |
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In: serial |
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Out: serial |
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Err: serial |
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SF: Detected W25Q128BV with page size 256 Bytes, erase size 4 KiB, total 16 MiB |
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SPI flash test: |
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0 erase: 1 ticks, 1024000 KiB/s 8192.000 Mbps |
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1 check: 2 ticks, 512000 KiB/s 4096.000 Mbps |
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2 write: 6 ticks, 170666 KiB/s 1365.328 Mbps |
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3 read: 0 ticks, 1048576000 KiB/s -201326.-592 Mbps |
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Test passed |
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0 erase: 1 ticks, 1024000 KiB/s 8192.000 Mbps |
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1 check: 2 ticks, 512000 KiB/s 4096.000 Mbps |
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2 write: 6 ticks, 170666 KiB/s 1365.328 Mbps |
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3 read: 0 ticks, 1048576000 KiB/s -201326.-592 Mbps |
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SF: 4096 bytes @ 0x1000 Read: OK |
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SF: 4096 bytes @ 0x1000 Erased: OK |
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SF: 4096 bytes @ 0x1000 Written: OK |
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Since the SPI bus is fully implemented as well as the SPI flash connected to |
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it, you can also use low-level SPI commands to access the flash. For example |
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this reads the device ID from the emulated chip: |
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=> sspi 0 32 9f |
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FFEF4018 |
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|
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Simon Glass |
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sjg@chromium.org |
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7/11/2013 |
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Note that the sandbox SPI implementation was written by Mike Frysinger |
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<vapier@gentoo.org>. |
@ -0,0 +1,92 @@ |
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SPI (Serial Peripheral Interface) busses |
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SPI busses can be described with a node for the SPI master device |
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and a set of child nodes for each SPI slave on the bus. For this |
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discussion, it is assumed that the system's SPI controller is in |
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SPI master mode. This binding does not describe SPI controllers |
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in slave mode. |
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|
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The SPI master node requires the following properties: |
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- #address-cells - number of cells required to define a chip select |
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address on the SPI bus. |
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- #size-cells - should be zero. |
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- compatible - name of SPI bus controller following generic names |
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recommended practice. |
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- cs-gpios - (optional) gpios chip select. |
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No other properties are required in the SPI bus node. It is assumed |
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that a driver for an SPI bus device will understand that it is an SPI bus. |
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However, the binding does not attempt to define the specific method for |
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assigning chip select numbers. Since SPI chip select configuration is |
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flexible and non-standardized, it is left out of this binding with the |
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assumption that board specific platform code will be used to manage |
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chip selects. Individual drivers can define additional properties to |
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support describing the chip select layout. |
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Optional property: |
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- num-cs : total number of chipselects |
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If cs-gpios is used the number of chip select will automatically increased |
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with max(cs-gpios > hw cs) |
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So if for example the controller has 2 CS lines, and the cs-gpios |
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property looks like this: |
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cs-gpios = <&gpio1 0 0> <0> <&gpio1 1 0> <&gpio1 2 0>; |
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Then it should be configured so that num_chipselect = 4 with the |
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following mapping: |
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cs0 : &gpio1 0 0 |
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cs1 : native |
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cs2 : &gpio1 1 0 |
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cs3 : &gpio1 2 0 |
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SPI slave nodes must be children of the SPI master node and can |
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contain the following properties. |
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- reg - (required) chip select address of device. |
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- compatible - (required) name of SPI device following generic names |
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recommended practice |
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- spi-max-frequency - (required) Maximum SPI clocking speed of device in Hz |
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- spi-cpol - (optional) Empty property indicating device requires |
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inverse clock polarity (CPOL) mode |
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- spi-cpha - (optional) Empty property indicating device requires |
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shifted clock phase (CPHA) mode |
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- spi-cs-high - (optional) Empty property indicating device requires |
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chip select active high |
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- spi-3wire - (optional) Empty property indicating device requires |
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3-wire mode. |
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- spi-tx-bus-width - (optional) The bus width(number of data wires) that |
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used for MOSI. Defaults to 1 if not present. |
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- spi-rx-bus-width - (optional) The bus width(number of data wires) that |
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used for MISO. Defaults to 1 if not present. |
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Some SPI controllers and devices support Dual and Quad SPI transfer mode. |
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It allows data in SPI system transfered in 2 wires(DUAL) or 4 wires(QUAD). |
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Now the value that spi-tx-bus-width and spi-rx-bus-width can receive is |
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only 1(SINGLE), 2(DUAL) and 4(QUAD). |
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Dual/Quad mode is not allowed when 3-wire mode is used. |
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If a gpio chipselect is used for the SPI slave the gpio number will be passed |
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via the cs_gpio |
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SPI example for an MPC5200 SPI bus: |
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spi@f00 { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; |
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reg = <0xf00 0x20>; |
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interrupts = <2 13 0 2 14 0>; |
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interrupt-parent = <&mpc5200_pic>; |
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ethernet-switch@0 { |
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compatible = "micrel,ks8995m"; |
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spi-max-frequency = <1000000>; |
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reg = <0>; |
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}; |
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codec@1 { |
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compatible = "ti,tlv320aic26"; |
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spi-max-frequency = <100000>; |
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reg = <1>; |
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}; |
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}; |
@ -0,0 +1,483 @@ |
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/*
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* Simulate a SPI flash |
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* |
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* Copyright (c) 2011-2013 The Chromium OS Authors. |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* Licensed under the GPL-2 or later. |
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*/ |
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#include <common.h> |
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#include <malloc.h> |
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#include <spi.h> |
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#include <os.h> |
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#include <spi_flash.h> |
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#include "sf_internal.h" |
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#include <asm/getopt.h> |
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#include <asm/spi.h> |
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#include <asm/state.h> |
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/*
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* The different states that our SPI flash transitions between. |
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* We need to keep track of this across multiple xfer calls since |
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* the SPI bus could possibly call down into us multiple times. |
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*/ |
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enum sandbox_sf_state { |
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SF_CMD, /* default state -- we're awaiting a command */ |
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SF_ID, /* read the flash's (jedec) ID code */ |
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SF_ADDR, /* processing the offset in the flash to read/etc... */ |
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SF_READ, /* reading data from the flash */ |
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SF_WRITE, /* writing data to the flash, i.e. page programming */ |
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SF_ERASE, /* erase the flash */ |
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SF_READ_STATUS, /* read the flash's status register */ |
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SF_READ_STATUS1, /* read the flash's status register upper 8 bits*/ |
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}; |
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static const char *sandbox_sf_state_name(enum sandbox_sf_state state) |
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{ |
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static const char * const states[] = { |
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"CMD", "ID", "ADDR", "READ", "WRITE", "ERASE", "READ_STATUS", |
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}; |
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return states[state]; |
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} |
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/* Bits for the status register */ |
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#define STAT_WIP (1 << 0) |
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#define STAT_WEL (1 << 1) |
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/* Assume all SPI flashes have 3 byte addresses since they do atm */ |
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#define SF_ADDR_LEN 3 |
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struct sandbox_spi_flash_erase_commands { |
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u8 cmd; |
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u32 size; |
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}; |
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#define IDCODE_LEN 5 |
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#define MAX_ERASE_CMDS 3 |
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struct sandbox_spi_flash_data { |
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const char *name; |
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u8 idcode[IDCODE_LEN]; |
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u32 size; |
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const struct sandbox_spi_flash_erase_commands |
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erase_cmds[MAX_ERASE_CMDS]; |
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}; |
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/* Structure describing all the flashes we know how to emulate */ |
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static const struct sandbox_spi_flash_data sandbox_sf_flashes[] = { |
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{ |
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"M25P16", { 0x20, 0x20, 0x15 }, (2 << 20), |
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{ /* erase commands */ |
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{ 0xd8, (64 << 10), }, /* sector */ |
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{ 0xc7, (2 << 20), }, /* bulk */ |
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}, |
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}, |
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{ |
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"W25Q32", { 0xef, 0x40, 0x16 }, (4 << 20), |
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{ /* erase commands */ |
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{ 0x20, (4 << 10), }, /* 4KB */ |
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{ 0xd8, (64 << 10), }, /* sector */ |
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{ 0xc7, (4 << 20), }, /* bulk */ |
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}, |
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}, |
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{ |
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"W25Q128", { 0xef, 0x40, 0x18 }, (16 << 20), |
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{ /* erase commands */ |
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{ 0x20, (4 << 10), }, /* 4KB */ |
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{ 0xd8, (64 << 10), }, /* sector */ |
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{ 0xc7, (16 << 20), }, /* bulk */ |
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}, |
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}, |
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}; |
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/* Used to quickly bulk erase backing store */ |
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static u8 sandbox_sf_0xff[0x1000]; |
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/* Internal state data for each SPI flash */ |
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struct sandbox_spi_flash { |
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/*
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* As we receive data over the SPI bus, our flash transitions |
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* between states. For example, we start off in the SF_CMD |
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* state where the first byte tells us what operation to perform |
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* (such as read or write the flash). But the operation itself |
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* can go through a few states such as first reading in the |
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* offset in the flash to perform the requested operation. |
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* Thus "state" stores the exact state that our machine is in |
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* while "cmd" stores the overall command we're processing. |
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*/ |
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enum sandbox_sf_state state; |
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uint cmd; |
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const void *cmd_data; |
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/* Current position in the flash; used when reading/writing/etc... */ |
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uint off; |
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/* How many address bytes we've consumed */ |
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uint addr_bytes, pad_addr_bytes; |
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/* The current flash status (see STAT_XXX defines above) */ |
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u16 status; |
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/* Data describing the flash we're emulating */ |
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const struct sandbox_spi_flash_data *data; |
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/* The file on disk to serv up data from */ |
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int fd; |
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}; |
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static int sandbox_sf_setup(void **priv, const char *spec) |
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{ |
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/* spec = idcode:file */ |
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struct sandbox_spi_flash *sbsf; |
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const char *file; |
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size_t i, len, idname_len; |
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const struct sandbox_spi_flash_data *data; |
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|
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file = strchr(spec, ':'); |
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if (!file) { |
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printf("sandbox_sf: unable to parse file\n"); |
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goto error; |
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} |
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idname_len = file - spec; |
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++file; |
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|
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for (i = 0; i < ARRAY_SIZE(sandbox_sf_flashes); ++i) { |
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data = &sandbox_sf_flashes[i]; |
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len = strlen(data->name); |
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if (idname_len != len) |
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continue; |
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if (!memcmp(spec, data->name, len)) |
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break; |
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} |
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if (i == ARRAY_SIZE(sandbox_sf_flashes)) { |
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printf("sandbox_sf: unknown flash '%*s'\n", (int)idname_len, |
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spec); |
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goto error; |
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} |
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|
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if (sandbox_sf_0xff[0] == 0x00) |
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memset(sandbox_sf_0xff, 0xff, sizeof(sandbox_sf_0xff)); |
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|
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sbsf = calloc(sizeof(*sbsf), 1); |
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if (!sbsf) { |
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printf("sandbox_sf: out of memory\n"); |
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goto error; |
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} |
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|
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sbsf->fd = os_open(file, 02); |
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if (sbsf->fd == -1) { |
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free(sbsf); |
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printf("sandbox_sf: unable to open file '%s'\n", file); |
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goto error; |
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} |
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|
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sbsf->data = data; |
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|
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*priv = sbsf; |
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return 0; |
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|
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error: |
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return 1; |
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} |
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|
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static void sandbox_sf_free(void *priv) |
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{ |
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struct sandbox_spi_flash *sbsf = priv; |
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|
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os_close(sbsf->fd); |
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free(sbsf); |
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} |
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|
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static void sandbox_sf_cs_activate(void *priv) |
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{ |
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struct sandbox_spi_flash *sbsf = priv; |
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|
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debug("sandbox_sf: CS activated; state is fresh!\n"); |
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|
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/* CS is asserted, so reset state */ |
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sbsf->off = 0; |
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sbsf->addr_bytes = 0; |
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sbsf->pad_addr_bytes = 0; |
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sbsf->state = SF_CMD; |
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sbsf->cmd = SF_CMD; |
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} |
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|
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static void sandbox_sf_cs_deactivate(void *priv) |
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{ |
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debug("sandbox_sf: CS deactivated; cmd done processing!\n"); |
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} |
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|
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/* Figure out what command this stream is telling us to do */ |
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static int sandbox_sf_process_cmd(struct sandbox_spi_flash *sbsf, const u8 *rx, |
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u8 *tx) |
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{ |
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enum sandbox_sf_state oldstate = sbsf->state; |
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|
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/* We need to output a byte for the cmd byte we just ate */ |
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sandbox_spi_tristate(tx, 1); |
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|
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sbsf->cmd = rx[0]; |
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switch (sbsf->cmd) { |
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case CMD_READ_ID: |
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sbsf->state = SF_ID; |
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sbsf->cmd = SF_ID; |
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break; |
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case CMD_READ_ARRAY_FAST: |
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sbsf->pad_addr_bytes = 1; |
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case CMD_READ_ARRAY_SLOW: |
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case CMD_PAGE_PROGRAM: |
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state_addr: |
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sbsf->state = SF_ADDR; |
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break; |
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case CMD_WRITE_DISABLE: |
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debug(" write disabled\n"); |
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sbsf->status &= ~STAT_WEL; |
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break; |
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case CMD_READ_STATUS: |
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sbsf->state = SF_READ_STATUS; |
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break; |
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case CMD_READ_STATUS1: |
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sbsf->state = SF_READ_STATUS1; |
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break; |
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case CMD_WRITE_ENABLE: |
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debug(" write enabled\n"); |
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sbsf->status |= STAT_WEL; |
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break; |
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default: { |
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size_t i; |
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|
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/* handle erase commands first */ |
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for (i = 0; i < MAX_ERASE_CMDS; ++i) { |
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const struct sandbox_spi_flash_erase_commands * |
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erase_cmd = &sbsf->data->erase_cmds[i]; |
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|
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if (erase_cmd->cmd == 0x00) |
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continue; |
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if (sbsf->cmd != erase_cmd->cmd) |
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continue; |
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|
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sbsf->cmd_data = erase_cmd; |
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goto state_addr; |
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} |
||||
|
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debug(" cmd unknown: %#x\n", sbsf->cmd); |
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return 1; |
||||
} |
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} |
||||
|
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if (oldstate != sbsf->state) |
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debug(" cmd: transition to %s state\n", |
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sandbox_sf_state_name(sbsf->state)); |
||||
|
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return 0; |
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} |
||||
|
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int sandbox_erase_part(struct sandbox_spi_flash *sbsf, int size) |
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{ |
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int todo; |
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int ret; |
||||
|
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while (size > 0) { |
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todo = min(size, sizeof(sandbox_sf_0xff)); |
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ret = os_write(sbsf->fd, sandbox_sf_0xff, todo); |
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if (ret != todo) |
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return ret; |
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size -= todo; |
||||
} |
||||
|
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return 0; |
||||
} |
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|
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static int sandbox_sf_xfer(void *priv, const u8 *rx, u8 *tx, |
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uint bytes) |
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{ |
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struct sandbox_spi_flash *sbsf = priv; |
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uint cnt, pos = 0; |
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int ret; |
||||
|
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debug("sandbox_sf: state:%x(%s) bytes:%u\n", sbsf->state, |
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sandbox_sf_state_name(sbsf->state), bytes); |
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|
||||
if (sbsf->state == SF_CMD) { |
||||
/* Figure out the initial state */ |
||||
if (sandbox_sf_process_cmd(sbsf, rx, tx)) |
||||
return 1; |
||||
++pos; |
||||
} |
||||
|
||||
/* Process the remaining data */ |
||||
while (pos < bytes) { |
||||
switch (sbsf->state) { |
||||
case SF_ID: { |
||||
u8 id; |
||||
|
||||
debug(" id: off:%u tx:", sbsf->off); |
||||
if (sbsf->off < IDCODE_LEN) |
||||
id = sbsf->data->idcode[sbsf->off]; |
||||
else |
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id = 0; |
||||
debug("%02x\n", id); |
||||
tx[pos++] = id; |
||||
++sbsf->off; |
||||
break; |
||||
} |
||||
case SF_ADDR: |
||||
debug(" addr: bytes:%u rx:%02x ", sbsf->addr_bytes, |
||||
rx[pos]); |
||||
|
||||
if (sbsf->addr_bytes++ < SF_ADDR_LEN) |
||||
sbsf->off = (sbsf->off << 8) | rx[pos]; |
||||
debug("addr:%06x\n", sbsf->off); |
||||
|
||||
sandbox_spi_tristate(&tx[pos++], 1); |
||||
|
||||
/* See if we're done processing */ |
||||
if (sbsf->addr_bytes < |
||||
SF_ADDR_LEN + sbsf->pad_addr_bytes) |
||||
break; |
||||
|
||||
/* Next state! */ |
||||
if (os_lseek(sbsf->fd, sbsf->off, OS_SEEK_SET) < 0) { |
||||
puts("sandbox_sf: os_lseek() failed"); |
||||
return 1; |
||||
} |
||||
switch (sbsf->cmd) { |
||||
case CMD_READ_ARRAY_FAST: |
||||
case CMD_READ_ARRAY_SLOW: |
||||
sbsf->state = SF_READ; |
||||
break; |
||||
case CMD_PAGE_PROGRAM: |
||||
sbsf->state = SF_WRITE; |
||||
break; |
||||
default: |
||||
/* assume erase state ... */ |
||||
sbsf->state = SF_ERASE; |
||||
goto case_sf_erase; |
||||
} |
||||
debug(" cmd: transition to %s state\n", |
||||
sandbox_sf_state_name(sbsf->state)); |
||||
break; |
||||
case SF_READ: |
||||
/*
|
||||
* XXX: need to handle exotic behavior: |
||||
* - reading past end of device |
||||
*/ |
||||
|
||||
cnt = bytes - pos; |
||||
debug(" tx: read(%u)\n", cnt); |
||||
ret = os_read(sbsf->fd, tx + pos, cnt); |
||||
if (ret < 0) { |
||||
puts("sandbox_spi: os_read() failed\n"); |
||||
return 1; |
||||
} |
||||
pos += ret; |
||||
break; |
||||
case SF_READ_STATUS: |
||||
debug(" read status: %#x\n", sbsf->status); |
||||
cnt = bytes - pos; |
||||
memset(tx + pos, sbsf->status, cnt); |
||||
pos += cnt; |
||||
break; |
||||
case SF_READ_STATUS1: |
||||
debug(" read status: %#x\n", sbsf->status); |
||||
cnt = bytes - pos; |
||||
memset(tx + pos, sbsf->status >> 8, cnt); |
||||
pos += cnt; |
||||
break; |
||||
case SF_WRITE: |
||||
/*
|
||||
* XXX: need to handle exotic behavior: |
||||
* - unaligned addresses |
||||
* - more than a page (256) worth of data |
||||
* - reading past end of device |
||||
*/ |
||||
if (!(sbsf->status & STAT_WEL)) { |
||||
puts("sandbox_sf: write enable not set before write\n"); |
||||
goto done; |
||||
} |
||||
|
||||
cnt = bytes - pos; |
||||
debug(" rx: write(%u)\n", cnt); |
||||
sandbox_spi_tristate(&tx[pos], cnt); |
||||
ret = os_write(sbsf->fd, rx + pos, cnt); |
||||
if (ret < 0) { |
||||
puts("sandbox_spi: os_write() failed\n"); |
||||
return 1; |
||||
} |
||||
pos += ret; |
||||
sbsf->status &= ~STAT_WEL; |
||||
break; |
||||
case SF_ERASE: |
||||
case_sf_erase: { |
||||
const struct sandbox_spi_flash_erase_commands * |
||||
erase_cmd = sbsf->cmd_data; |
||||
|
||||
if (!(sbsf->status & STAT_WEL)) { |
||||
puts("sandbox_sf: write enable not set before erase\n"); |
||||
goto done; |
||||
} |
||||
|
||||
/* verify address is aligned */ |
||||
if (sbsf->off & (erase_cmd->size - 1)) { |
||||
debug(" sector erase: cmd:%#x needs align:%#x, but we got %#x\n", |
||||
erase_cmd->cmd, erase_cmd->size, |
||||
sbsf->off); |
||||
sbsf->status &= ~STAT_WEL; |
||||
goto done; |
||||
} |
||||
|
||||
debug(" sector erase addr: %u\n", sbsf->off); |
||||
|
||||
cnt = bytes - pos; |
||||
sandbox_spi_tristate(&tx[pos], cnt); |
||||
pos += cnt; |
||||
|
||||
/*
|
||||
* TODO(vapier@gentoo.org): latch WIP in status, and |
||||
* delay before clearing it ? |
||||
*/ |
||||
ret = sandbox_erase_part(sbsf, erase_cmd->size); |
||||
sbsf->status &= ~STAT_WEL; |
||||
if (ret) { |
||||
debug("sandbox_sf: Erase failed\n"); |
||||
goto done; |
||||
} |
||||
goto done; |
||||
} |
||||
default: |
||||
debug(" ??? no idea what to do ???\n"); |
||||
goto done; |
||||
} |
||||
} |
||||
|
||||
done: |
||||
return pos == bytes ? 0 : 1; |
||||
} |
||||
|
||||
static const struct sandbox_spi_emu_ops sandbox_sf_ops = { |
||||
.setup = sandbox_sf_setup, |
||||
.free = sandbox_sf_free, |
||||
.cs_activate = sandbox_sf_cs_activate, |
||||
.cs_deactivate = sandbox_sf_cs_deactivate, |
||||
.xfer = sandbox_sf_xfer, |
||||
}; |
||||
|
||||
static int sandbox_cmdline_cb_spi_sf(struct sandbox_state *state, |
||||
const char *arg) |
||||
{ |
||||
unsigned long bus, cs; |
||||
const char *spec = sandbox_spi_parse_spec(arg, &bus, &cs); |
||||
|
||||
if (!spec) |
||||
return 1; |
||||
|
||||
/*
|
||||
* It is safe to not make a copy of 'spec' because it comes from the |
||||
* command line. |
||||
* |
||||
* TODO(sjg@chromium.org): It would be nice if we could parse the |
||||
* spec here, but the problem is that no U-Boot init has been done |
||||
* yet. Perhaps we can figure something out. |
||||
*/ |
||||
state->spi[bus][cs].ops = &sandbox_sf_ops; |
||||
state->spi[bus][cs].spec = spec; |
||||
return 0; |
||||
} |
||||
SANDBOX_CMDLINE_OPT(spi_sf, 1, "connect a SPI flash: <bus>:<cs>:<id>:<file>"); |
@ -0,0 +1,204 @@ |
||||
/*
|
||||
* Simulate a SPI port |
||||
* |
||||
* Copyright (c) 2011-2013 The Chromium OS Authors. |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* Licensed under the GPL-2 or later. |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <malloc.h> |
||||
#include <spi.h> |
||||
#include <os.h> |
||||
|
||||
#include <asm/errno.h> |
||||
#include <asm/spi.h> |
||||
#include <asm/state.h> |
||||
|
||||
#ifndef CONFIG_SPI_IDLE_VAL |
||||
# define CONFIG_SPI_IDLE_VAL 0xFF |
||||
#endif |
||||
|
||||
struct sandbox_spi_slave { |
||||
struct spi_slave slave; |
||||
const struct sandbox_spi_emu_ops *ops; |
||||
void *priv; |
||||
}; |
||||
|
||||
#define to_sandbox_spi_slave(s) container_of(s, struct sandbox_spi_slave, slave) |
||||
|
||||
const char *sandbox_spi_parse_spec(const char *arg, unsigned long *bus, |
||||
unsigned long *cs) |
||||
{ |
||||
char *endp; |
||||
|
||||
*bus = simple_strtoul(arg, &endp, 0); |
||||
if (*endp != ':' || *bus >= CONFIG_SANDBOX_SPI_MAX_BUS) |
||||
return NULL; |
||||
|
||||
*cs = simple_strtoul(endp + 1, &endp, 0); |
||||
if (*endp != ':' || *cs >= CONFIG_SANDBOX_SPI_MAX_CS) |
||||
return NULL; |
||||
|
||||
return endp + 1; |
||||
} |
||||
|
||||
int spi_cs_is_valid(unsigned int bus, unsigned int cs) |
||||
{ |
||||
return bus < CONFIG_SANDBOX_SPI_MAX_BUS && |
||||
cs < CONFIG_SANDBOX_SPI_MAX_CS; |
||||
} |
||||
|
||||
void spi_cs_activate(struct spi_slave *slave) |
||||
{ |
||||
struct sandbox_spi_slave *sss = to_sandbox_spi_slave(slave); |
||||
|
||||
debug("sandbox_spi: activating CS\n"); |
||||
if (sss->ops->cs_activate) |
||||
sss->ops->cs_activate(sss->priv); |
||||
} |
||||
|
||||
void spi_cs_deactivate(struct spi_slave *slave) |
||||
{ |
||||
struct sandbox_spi_slave *sss = to_sandbox_spi_slave(slave); |
||||
|
||||
debug("sandbox_spi: deactivating CS\n"); |
||||
if (sss->ops->cs_deactivate) |
||||
sss->ops->cs_deactivate(sss->priv); |
||||
} |
||||
|
||||
void spi_init(void) |
||||
{ |
||||
} |
||||
|
||||
void spi_set_speed(struct spi_slave *slave, uint hz) |
||||
{ |
||||
} |
||||
|
||||
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, |
||||
unsigned int max_hz, unsigned int mode) |
||||
{ |
||||
struct sandbox_spi_slave *sss; |
||||
struct sandbox_state *state = state_get_current(); |
||||
const char *spec; |
||||
|
||||
if (!spi_cs_is_valid(bus, cs)) { |
||||
debug("sandbox_spi: Invalid SPI bus/cs\n"); |
||||
return NULL; |
||||
} |
||||
|
||||
sss = spi_alloc_slave(struct sandbox_spi_slave, bus, cs); |
||||
if (!sss) { |
||||
debug("sandbox_spi: Out of memory\n"); |
||||
return NULL; |
||||
} |
||||
|
||||
spec = state->spi[bus][cs].spec; |
||||
sss->ops = state->spi[bus][cs].ops; |
||||
if (!spec || !sss->ops || sss->ops->setup(&sss->priv, spec)) { |
||||
free(sss); |
||||
printf("sandbox_spi: unable to locate a slave client\n"); |
||||
return NULL; |
||||
} |
||||
|
||||
return &sss->slave; |
||||
} |
||||
|
||||
void spi_free_slave(struct spi_slave *slave) |
||||
{ |
||||
struct sandbox_spi_slave *sss = to_sandbox_spi_slave(slave); |
||||
|
||||
debug("sandbox_spi: releasing slave\n"); |
||||
|
||||
if (sss->ops->free) |
||||
sss->ops->free(sss->priv); |
||||
|
||||
free(sss); |
||||
} |
||||
|
||||
static int spi_bus_claim_cnt[CONFIG_SANDBOX_SPI_MAX_BUS]; |
||||
|
||||
int spi_claim_bus(struct spi_slave *slave) |
||||
{ |
||||
if (spi_bus_claim_cnt[slave->bus]++) { |
||||
printf("sandbox_spi: error: bus already claimed: %d!\n", |
||||
spi_bus_claim_cnt[slave->bus]); |
||||
} |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
void spi_release_bus(struct spi_slave *slave) |
||||
{ |
||||
if (--spi_bus_claim_cnt[slave->bus]) { |
||||
printf("sandbox_spi: error: bus freed too often: %d!\n", |
||||
spi_bus_claim_cnt[slave->bus]); |
||||
} |
||||
} |
||||
|
||||
int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, |
||||
void *din, unsigned long flags) |
||||
{ |
||||
struct sandbox_spi_slave *sss = to_sandbox_spi_slave(slave); |
||||
uint bytes = bitlen / 8, i; |
||||
int ret = 0; |
||||
u8 *tx = (void *)dout, *rx = din; |
||||
|
||||
if (bitlen == 0) |
||||
goto done; |
||||
|
||||
/* we can only do 8 bit transfers */ |
||||
if (bitlen % 8) { |
||||
printf("sandbox_spi: xfer: invalid bitlen size %u; needs to be 8bit\n", |
||||
bitlen); |
||||
flags |= SPI_XFER_END; |
||||
goto done; |
||||
} |
||||
|
||||
if (flags & SPI_XFER_BEGIN) |
||||
spi_cs_activate(slave); |
||||
|
||||
/* make sure rx/tx buffers are full so clients can assume */ |
||||
if (!tx) { |
||||
debug("sandbox_spi: xfer: auto-allocating tx scratch buffer\n"); |
||||
tx = malloc(bytes); |
||||
if (!tx) { |
||||
debug("sandbox_spi: Out of memory\n"); |
||||
return -ENOMEM; |
||||
} |
||||
} |
||||
if (!rx) { |
||||
debug("sandbox_spi: xfer: auto-allocating rx scratch buffer\n"); |
||||
rx = malloc(bytes); |
||||
if (!rx) { |
||||
debug("sandbox_spi: Out of memory\n"); |
||||
return -ENOMEM; |
||||
} |
||||
} |
||||
|
||||
debug("sandbox_spi: xfer: bytes = %u\n tx:", bytes); |
||||
for (i = 0; i < bytes; ++i) |
||||
debug(" %u:%02x", i, tx[i]); |
||||
debug("\n"); |
||||
|
||||
ret = sss->ops->xfer(sss->priv, tx, rx, bytes); |
||||
|
||||
debug("sandbox_spi: xfer: got back %i (that's %s)\n rx:", |
||||
ret, ret ? "bad" : "good"); |
||||
for (i = 0; i < bytes; ++i) |
||||
debug(" %u:%02x", i, rx[i]); |
||||
debug("\n"); |
||||
|
||||
if (tx != dout) |
||||
free(tx); |
||||
if (rx != din) |
||||
free(rx); |
||||
|
||||
done: |
||||
if (flags & SPI_XFER_END) |
||||
spi_cs_deactivate(slave); |
||||
|
||||
return ret; |
||||
} |
Loading…
Reference in new issue