Add P1023 (dual core) & P1017 (single core) specific information: * SERDES Table * Added P1023/P1017 to cpu_type_list and SVR list (fixed issue with P1013 not being sorted correctly). * Added P1023/P1027 to config_mpc85xx.h * Added new LAW type introduced on P1023/P1017 * Updated a few immap register/defines unique to P1023/P1017 Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>master
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/*
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* Copyright 2010-2011 Freescale Semiconductor, Inc. |
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* Author: Roy Zang <tie-fei.zang@freescale.com> |
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* |
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* This program is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License as published by the Free |
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* Software Foundation; either version 2 of the License, or (at your option) |
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* any later version. |
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*/ |
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#include <config.h> |
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#include <common.h> |
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#include <asm/io.h> |
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#include <asm/immap_85xx.h> |
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#include <asm/fsl_serdes.h> |
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#define SRDS1_MAX_LANES 4 |
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static u32 serdes1_prtcl_map; |
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static const u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { |
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[0x00] = {PCIE1, PCIE2, NONE, NONE}, |
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[0x01] = {PCIE1, PCIE2, PCIE3, NONE}, |
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[0x02] = {PCIE1, PCIE2, PCIE3, SGMII_FM1_DTSEC2}, |
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[0x03] = {PCIE1, PCIE2, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2}, |
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}; |
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int is_serdes_configured(enum srds_prtcl device) |
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{ |
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int ret = (1 << device) & serdes1_prtcl_map; |
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return ret; |
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} |
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void fsl_serdes_init(void) |
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{ |
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ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; |
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u32 pordevsr = in_be32(&gur->pordevsr); |
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u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> |
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MPC85xx_PORDEVSR_IO_SEL_SHIFT; |
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int lane; |
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debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); |
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if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) { |
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printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); |
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return; |
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} |
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for (lane = 0; lane < SRDS1_MAX_LANES; lane++) { |
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enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; |
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serdes1_prtcl_map |= (1 << lane_prtcl); |
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} |
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} |
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