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armv7: fsl: remove sata support

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Remove the old implementation in order to enable DM for sata

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
lime2-spi
Peng Ma 6 years ago committed by York Sun
parent cf2250e787
commit 686203737e
7 changed files with 0 additions and 92 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
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  1. 1
      arch/arm/cpu/armv7/ls102xa/Makefile
  2. 41
      arch/arm/cpu/armv7/ls102xa/ls102xa_sata.c
  3. 27
      arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
  4. 10
      arch/arm/include/asm/arch-ls102xa/ls102xa_sata.h
  5. 5
      board/freescale/ls1021aiot/ls1021aiot.c
  6. 4
      board/freescale/ls1021aqds/ls1021aqds.c
  7. 4
      board/freescale/ls1021atwr/ls1021atwr.c

1
arch/arm/cpu/armv7/ls102xa/Makefile
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@ -10,7 +10,6 @@ obj-y += timer.o
obj-y += fsl_epu.o
obj-y += soc.o
obj-$(CONFIG_SCSI_AHCI_PLAT) += ls102xa_sata.o
obj-$(CONFIG_OF_LIBFDT) += fdt.o
obj-$(CONFIG_SYS_HAS_SERDES) += fsl_ls1_serdes.o ls102xa_serdes.o
obj-$(CONFIG_SPL) += spl.o

41
arch/arm/cpu/armv7/ls102xa/ls102xa_sata.c
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@ -1,41 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2015 Freescale Semiconductor, Inc.
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/immap_ls102xa.h>
#include <ahci.h>
#include <scsi.h>
/* port register default value */
#define AHCI_PORT_PHY_1_CFG 0xa003fffe
#define AHCI_PORT_PHY_2_CFG 0x28183414
#define AHCI_PORT_PHY_3_CFG 0x0e080e06
#define AHCI_PORT_PHY_4_CFG 0x064a080b
#define AHCI_PORT_PHY_5_CFG 0x2aa86470
#define AHCI_PORT_TRANS_CFG 0x08000029
#define SATA_ECC_REG_ADDR 0x20220520
#define SATA_ECC_DISABLE 0x00020000
int ls1021a_sata_init(void)
{
struct ccsr_ahci __iomem *ccsr_ahci = (void *)AHCI_BASE_ADDR;
#ifdef CONFIG_SYS_FSL_ERRATUM_A008407
out_le32((void *)SATA_ECC_REG_ADDR, SATA_ECC_DISABLE);
#endif
out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG);
out_le32(&ccsr_ahci->pp2c, AHCI_PORT_PHY_2_CFG);
out_le32(&ccsr_ahci->pp3c, AHCI_PORT_PHY_3_CFG);
out_le32(&ccsr_ahci->pp4c, AHCI_PORT_PHY_4_CFG);
out_le32(&ccsr_ahci->pp5c, AHCI_PORT_PHY_5_CFG);
out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG);
ahci_init((void __iomem *)AHCI_BASE_ADDR);
scsi_scan(false);
return 0;
}

27
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
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@ -389,33 +389,6 @@ struct ccsr_serdes {
u8 res_a00[0x1000-0xa00]; /* from 0xa00 to 0xfff */
};
/* AHCI (sata) register map */
struct ccsr_ahci {
u32 res1[0xa4/4]; /* 0x0 - 0xa4 */
u32 pcfg; /* port config */
u32 ppcfg; /* port phy1 config */
u32 pp2c; /* port phy2 config */
u32 pp3c; /* port phy3 config */
u32 pp4c; /* port phy4 config */
u32 pp5c; /* port phy5 config */
u32 paxic; /* port AXI config */
u32 axicc; /* AXI cache control */
u32 axipc; /* AXI PROT control */
u32 ptc; /* port Trans Config */
u32 pts; /* port Trans Status */
u32 plc; /* port link config */
u32 plc1; /* port link config1 */
u32 plc2; /* port link config2 */
u32 pls; /* port link status */
u32 pls1; /* port link status1 */
u32 pcmdc; /* port CMD config */
u32 ppcs; /* port phy control status */
u32 pberr; /* port 0/1 BIST error */
u32 cmds; /* port 0/1 CMD status error */
};
#define RCPM_POWMGTCSR 0x130
#define RCPM_POWMGTCSR_SERDES_PW 0x80000000
#define RCPM_POWMGTCSR_LPM20_REQ 0x00100000

10
arch/arm/include/asm/arch-ls102xa/ls102xa_sata.h
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@ -1,10 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2015 Freescale Semiconductor, Inc.
*/
#ifndef __FSL_SATA_H_
#define __FSL_SATA_H_
int ls1021a_sata_init(void);
#endif

5
board/freescale/ls1021aiot/ls1021aiot.c
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@ -11,7 +11,6 @@
#include <asm/arch/ls102xa_devdis.h>
#include <asm/arch/ls102xa_soc.h>
#include <asm/arch/ls102xa_sata.h>
#include <fsl_csu.h>
#include <fsl_esdhc.h>
#include <fsl_immap.h>
@ -206,10 +205,6 @@ int board_init(void)
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
#ifdef CONFIG_SCSI_AHCI_PLAT
ls1021a_sata_init();
#endif
return 0;
}
#endif

4
board/freescale/ls1021aqds/ls1021aqds.c
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@ -11,7 +11,6 @@
#include <asm/arch/fsl_serdes.h>
#include <asm/arch/ls102xa_soc.h>
#include <asm/arch/ls102xa_devdis.h>
#include <asm/arch/ls102xa_sata.h>
#include <hwconfig.h>
#include <mmc.h>
#include <fsl_csu.h>
@ -362,9 +361,6 @@ int config_serdes_mux(void)
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
#ifdef CONFIG_SCSI_AHCI_PLAT
ls1021a_sata_init();
#endif
#ifdef CONFIG_CHAIN_OF_TRUST
fsl_setenv_chain_of_trust();
#endif

4
board/freescale/ls1021atwr/ls1021atwr.c
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@ -11,7 +11,6 @@
#include <asm/arch/fsl_serdes.h>
#include <asm/arch/ls102xa_devdis.h>
#include <asm/arch/ls102xa_soc.h>
#include <asm/arch/ls102xa_sata.h>
#include <hwconfig.h>
#include <mmc.h>
#include <fsl_csu.h>
@ -556,9 +555,6 @@ void spl_board_init(void)
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
#ifdef CONFIG_SCSI_AHCI_PLAT
ls1021a_sata_init();
#endif
#ifdef CONFIG_CHAIN_OF_TRUST
fsl_setenv_chain_of_trust();
#endif

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