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ARM: uniphier: clean up boot mode tables

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Tidy up alignment of open parentheses.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
master
Masahiro Yamada 8 years ago
parent 0bd20207ab
commit 6a555b214b
5 changed files with 13 additions and 13 deletions
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  1. 2
      arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c
  2. 6
      arch/arm/mach-uniphier/boot-mode/boot-mode-ld4.c
  3. 2
      arch/arm/mach-uniphier/boot-mode/boot-mode-pro5.c
  4. 14
      arch/arm/mach-uniphier/boot-mode/boot-mode-pxs2.c
  5. 2
      arch/arm/mach-uniphier/boot-mode/boot-mode-sld3.c

2
arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c
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@ -43,7 +43,7 @@ static struct boot_device_info boot_device_table[] = {
{BOOT_DEVICE_MMC1, "eMMC (High Speed SDR, 8bit, 1.8V, Training Off)"},
{BOOT_DEVICE_MMC1, "eMMC (High Speed SDR, 8bit, 1.8V, Training On)"},
{BOOT_DEVICE_MMC1, "eMMC (Legacy, 4bit, 1.8V, Training Off)"},
{BOOT_DEVICE_NOR, "NOR Boot (XECS1)"},
{BOOT_DEVICE_NOR, "NOR (XECS1)"},
};
static int get_boot_mode_sel(void)

6
arch/arm/mach-uniphier/boot-mode/boot-mode-ld4.c
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@ -36,14 +36,14 @@ struct boot_device_info boot_device_table[] = {
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 24, ONFI, Addr 5)"},
{BOOT_DEVICE_MMC1, "eMMC Boot (3.3V)"},
{BOOT_DEVICE_MMC1, "eMMC Boot (1.8V)"},
{BOOT_DEVICE_MMC1, "eMMC (3.3V)"},
{BOOT_DEVICE_MMC1, "eMMC (1.8V)"},
{BOOT_DEVICE_NONE, "Reserved"},
{BOOT_DEVICE_NONE, "Reserved"},
{BOOT_DEVICE_NONE, "Reserved"},
{BOOT_DEVICE_NONE, "Reserved"},
{BOOT_DEVICE_NONE, "Reserved"},
{BOOT_DEVICE_NOR, "NOR Boot"},
{BOOT_DEVICE_NOR, "NOR (XECS0)"},
};
static int get_boot_mode_sel(void)

2
arch/arm/mach-uniphier/boot-mode/boot-mode-pro5.c
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@ -37,7 +37,7 @@ static struct boot_device_info boot_device_table[] = {
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 4)"},
{BOOT_DEVICE_NONE, "Reserved"},
{BOOT_DEVICE_MMC1, "eMMC Boot (1.8V)"},
{BOOT_DEVICE_MMC1, "eMMC (1.8V)"},
{BOOT_DEVICE_NONE, "Reserved"},
{BOOT_DEVICE_NONE, "Reserved"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128MB, Addr 5)"},

14
arch/arm/mach-uniphier/boot-mode/boot-mode-pxs2.c
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@ -32,17 +32,17 @@ static struct boot_device_info boot_device_table[] = {
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 4)"},
{BOOT_DEVICE_MMC1, "eMMC Boot (1.8V)"},
{BOOT_DEVICE_MMC1, "eMMC (1.8V)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 4)"},
{BOOT_DEVICE_SPI, "SPI 3Byte CS0"},
{BOOT_DEVICE_SPI, "SPI 4Byte CS0"},
{BOOT_DEVICE_SPI, "SPI 3Byte CS1"},
{BOOT_DEVICE_SPI, "SPI 4Byte CS1"},
{BOOT_DEVICE_SPI, "SPI 4Byte CS0"},
{BOOT_DEVICE_SPI, "SPI 3Byte CS0"},
{BOOT_DEVICE_SPI, "SPI (3Byte CS0)"},
{BOOT_DEVICE_SPI, "SPI (4Byte CS0)"},
{BOOT_DEVICE_SPI, "SPI (3Byte CS1)"},
{BOOT_DEVICE_SPI, "SPI (4Byte CS1)"},
{BOOT_DEVICE_SPI, "SPI (4Byte CS0)"},
{BOOT_DEVICE_SPI, "SPI (3Byte CS0)"},
{BOOT_DEVICE_NONE, "Reserved"},
};

2
arch/arm/mach-uniphier/boot-mode/boot-mode-sld3.c
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@ -12,7 +12,7 @@
#include "boot-device.h"
static struct boot_device_info boot_device_table[] = {
{BOOT_DEVICE_NOR, "NOR boot"},
{BOOT_DEVICE_NOR, "NOR (XECS0)"},
{BOOT_DEVICE_NONE, "External Master"},
{BOOT_DEVICE_NONE, "Reserved"},
{BOOT_DEVICE_NONE, "Reserved"},

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