apalis_t30: describe pcie ports

Add some more comments describing the various PCIe ports available.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
lime2-spi
Marcel Ziswiler 6 years ago committed by Tom Warren
parent f1333417e8
commit 6ab8a2b0ee
  1. 3
      arch/arm/dts/tegra30-apalis.dts

@ -43,16 +43,19 @@
vddio-pex-ctl-supply = <&sys_3v3_reg>;
hvdd-pex-supply = <&sys_3v3_reg>;
/* Apalis Type Specific 4 Lane PCIe */
pci@1,0 {
/* TS_DIFF1/2/3/4 left disabled */
nvidia,num-lanes = <4>;
};
/* Apalis PCIe */
pci@2,0 {
/* PCIE1_RX/TX left disabled */
nvidia,num-lanes = <1>;
};
/* I210 Gigabit Ethernet Controller (On-module) */
pci@3,0 {
status = "okay";
nvidia,num-lanes = <1>;

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