arm: socfpga: arria5-socdk: Remove Micrel PHY configuration

The Micrel PHY configuration is now done from OF, so hard-coding
the configuration into the board file is no longer necessary.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>

board/altera/arria5-socdk/socfpga.c

@@ -12,10 +12,6 @@
 #include <usb/dwc2_udc.h>
 #include <usb_mass_storage.h>
 
-#include <micrel.h>
-#include <netdev.h>
-#include <phy.h>
-
 DECLARE_GLOBAL_DATA_PTR;
 
 void s_init(void) {}
@@ -31,42 +27,6 @@ int board_init(void)
 	return 0;
 }
 
-/*
- * PHY configuration
- */
-#ifdef CONFIG_PHY_MICREL_KSZ9021
-int board_phy_config(struct phy_device *phydev)
-{
-	int ret;
-	/*
-	 * These skew settings for the KSZ9021 ethernet phy is required for ethernet
-	 * to work reliably on most flavors of cyclone5 boards.
-	 */
-	ret = ksz9021_phy_extended_write(phydev,
-					 MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW,
-					 0x0);
-	if (ret)
-		return ret;
-
-	ret = ksz9021_phy_extended_write(phydev,
-					 MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW,
-					 0x0);
-	if (ret)
-		return ret;
-
-	ret = ksz9021_phy_extended_write(phydev,
-					 MII_KSZ9021_EXT_RGMII_CLOCK_SKEW,
-					 0xf0f0);
-	if (ret)
-		return ret;
-
-	if (phydev->drv->config)
-		return phydev->drv->config(phydev);
-
-	return 0;
-}
-#endif
-
 #ifdef CONFIG_USB_GADGET
 struct dwc2_plat_otg_data socfpga_otg_data = {
 	.regs_otg	= CONFIG_USB_DWC2_REG_ADDR,

include/configs/socfpga_arria5_socdk.h

@@ -47,15 +47,8 @@
 
 /* Ethernet on SoC (EMAC) */
 #if defined(CONFIG_CMD_NET)
-
-/* PHY */
 #define CONFIG_PHY_MICREL
 #define CONFIG_PHY_MICREL_KSZ9021
-#define CONFIG_KSZ9021_CLK_SKEW_ENV	"micrel-ksz9021-clk-skew"
-#define CONFIG_KSZ9021_CLK_SKEW_VAL	0xf0f0
-#define CONFIG_KSZ9021_DATA_SKEW_ENV	"micrel-ksz9021-data-skew"
-#define CONFIG_KSZ9021_DATA_SKEW_VAL	0x0
-
 #endif
 
 #define CONFIG_ENV_IS_IN_MMC