CPUAT91 is built around Atmel's AT91RM9200 and has up to 16MB of NOR flash, up to 128MB of SDRAM, and includes a Micrel KS8721 PHY in RMII mode. Signed-off-by: Eric Benard <eric@eukrea.com> Signed-off-by: Tom Rix <Tom.Rix@windriver.com>master
Tom Rix
16 years ago
parent
203e6fb2da
commit
6dceeaa679
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#
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# (C) Copyright 2003-2006
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# Wolfgang Denk, DENX Software Engineering, wd at denx.de. <http://lists.denx.de/mailman/listinfo/u-boot>
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
|
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# published by the Free Software Foundation; either version 2 of
|
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
|
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk |
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LIB = $(obj)lib$(BOARD).a
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COBJS := cpuat91.o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS) $(SOBJS) |
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$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
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clean: |
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rm -f $(SOBJS) $(OBJS)
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distclean: clean |
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rm -f $(LIB) core *.bak .depend
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk |
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sinclude $(obj).depend |
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#########################################################################
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@ -0,0 +1 @@ |
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TEXT_BASE = 0x21F00000
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@ -0,0 +1,81 @@ |
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/*
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* (C) Copyright 2006 Eukrea Electromatique <www.eukrea.com> |
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* Eric Benard <eric@eukrea.com> |
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* based on at91rm9200dk.c which is : |
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* (C) Copyright 2002 |
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
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* Marius Groeger <mgroeger@sysgo.de> |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <asm/arch/AT91RM9200.h> |
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#include <at91rm9200_net.h> |
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#include <ks8721.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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/* ------------------------------------------------------------------------- */ |
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/*
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* Miscelaneous platform dependent initialisations |
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*/ |
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int board_init(void) |
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{ |
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/* Enable Ctrlc */ |
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console_init_f(); |
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/* arch number of CPUAT91-Board */ |
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gd->bd->bi_arch_number = MACH_TYPE_CPUAT91; |
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/* adress of boot parameters */ |
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; |
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return 0; |
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} |
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int dram_init(void) |
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{ |
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gd->bd->bi_dram[0].start = PHYS_SDRAM; |
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gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; |
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return 0; |
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} |
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#if defined(CONFIG_DRIVER_ETHER) |
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#if defined(CONFIG_CMD_NET) |
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/*
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* Name: |
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* at91rm9200_GetPhyInterface |
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* Description: |
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* Initialise the interface functions to the PHY |
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* Arguments: |
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* None |
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* Return value: |
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* None |
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*/ |
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void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops) |
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{ |
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p_phyops->Init = ks8721_initphy; |
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p_phyops->IsPhyConnected = ks8721_isphyconnected; |
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p_phyops->GetLinkSpeed = ks8721_getlinkspeed; |
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p_phyops->AutoNegotiate = ks8721_autonegotiate; |
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} |
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#endif /* CONFIG_CMD_NET */ |
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#endif /* CONFIG_DRIVER_ETHER */ |
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@ -0,0 +1,249 @@ |
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/*
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* (C) Copyright 2006 |
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* Author : Eric Benard (Eukrea Electromatique) |
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* based on dm9161.c which is : |
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* (C) Copyright 2003 |
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* Author : Hamid Ikdoumi (Atmel) |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <at91rm9200_net.h> |
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#include <net.h> |
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#include <ks8721.h> |
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#ifdef CONFIG_DRIVER_ETHER |
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#if defined(CONFIG_CMD_NET) |
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/*
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* Name: |
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* ks8721_isphyconnected |
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* Description: |
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* Reads the 2 PHY ID registers |
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* Arguments: |
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* p_mac - pointer to AT91S_EMAC struct |
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* Return value: |
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* 1 - if id read successfully |
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* 0 - if error |
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*/ |
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unsigned int ks8721_isphyconnected(AT91PS_EMAC p_mac) |
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{ |
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unsigned short id1, id2; |
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at91rm9200_EmacEnableMDIO(p_mac); |
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at91rm9200_EmacReadPhy(p_mac, |
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CONFIG_PHY_ADDRESS | KS8721_PHYID1, &id1); |
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at91rm9200_EmacReadPhy(p_mac, |
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CONFIG_PHY_ADDRESS | KS8721_PHYID2, &id2); |
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at91rm9200_EmacDisableMDIO(p_mac); |
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if ((id1 == (KS8721_PHYID_OUI >> 6)) && |
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((id2 >> 10) == (KS8721_PHYID_OUI & KS8721_LSB_MASK))) { |
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if ((id2 & KS8721_MODELMASK) == KS8721BL_MODEL) |
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printf("Micrel KS8721bL PHY detected : "); |
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else |
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printf("Unknown Micrel PHY detected : "); |
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return 1; |
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} |
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return 0; |
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} |
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/*
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* Name: |
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* ks8721_getlinkspeed |
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* Description: |
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* Link parallel detection status of MAC is checked and set in the |
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* MAC configuration registers |
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* Arguments: |
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* p_mac - pointer to MAC |
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* Return value: |
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* 1 - if link status set succesfully |
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* 0 - if link status not set |
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*/ |
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unsigned char ks8721_getlinkspeed(AT91PS_EMAC p_mac) |
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{ |
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unsigned short stat1; |
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if (!at91rm9200_EmacReadPhy(p_mac, KS8721_BMSR, &stat1)) |
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return 0; |
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if (!(stat1 & KS8721_LINK_STATUS)) { |
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/* link status up? */ |
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printf("Link Down !\n"); |
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return 0; |
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} |
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if (stat1 & KS8721_100BASE_TX_FD) { |
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/* set Emac for 100BaseTX and Full Duplex */ |
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printf("100BT FD\n"); |
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p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD; |
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return 1; |
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} |
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if (stat1 & KS8721_10BASE_T_FD) { |
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/* set MII for 10BaseT and Full Duplex */ |
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printf("10BT FD\n"); |
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p_mac->EMAC_CFG = (p_mac->EMAC_CFG & |
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~(AT91C_EMAC_SPD | AT91C_EMAC_FD)) |
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| AT91C_EMAC_FD; |
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return 1; |
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} |
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if (stat1 & KS8721_100BASE_T4_HD) { |
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/* set MII for 100BaseTX and Half Duplex */ |
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printf("100BT HD\n"); |
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p_mac->EMAC_CFG = (p_mac->EMAC_CFG & |
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~(AT91C_EMAC_SPD | AT91C_EMAC_FD)) |
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| AT91C_EMAC_SPD; |
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return 1; |
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} |
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if (stat1 & KS8721_10BASE_T_HD) { |
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/* set MII for 10BaseT and Half Duplex */ |
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printf("10BT HD\n"); |
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p_mac->EMAC_CFG &= ~(AT91C_EMAC_SPD | AT91C_EMAC_FD); |
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return 1; |
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} |
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return 0; |
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} |
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/*
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* Name: |
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* ks8721_initphy |
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* Description: |
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* MAC starts checking its link by using parallel detection and |
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* Autonegotiation and the same is set in the MAC configuration registers |
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* Arguments: |
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* p_mac - pointer to struct AT91S_EMAC |
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* Return value: |
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* 1 - if link status set succesfully |
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* 0 - if link status not set |
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*/ |
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unsigned char ks8721_initphy(AT91PS_EMAC p_mac) |
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{ |
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unsigned char ret = 1; |
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unsigned short intvalue; |
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at91rm9200_EmacEnableMDIO(p_mac); |
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/* Try another time */ |
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if (!ks8721_getlinkspeed(p_mac)) |
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ret = ks8721_getlinkspeed(p_mac); |
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/* Disable PHY Interrupts */ |
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intvalue = 0; |
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at91rm9200_EmacWritePhy(p_mac, |
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CONFIG_PHY_ADDRESS | KS8721_MDINTR, &intvalue); |
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at91rm9200_EmacDisableMDIO(p_mac); |
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return ret; |
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} |
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/*
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* Name: |
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* ks8721_autonegotiate |
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* Description: |
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* MAC Autonegotiates with the partner status of same is set in the |
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* MAC configuration registers |
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* Arguments: |
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* dev - pointer to struct net_device |
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* Return value: |
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* 1 - if link status set successfully |
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* 0 - if link status not set |
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*/ |
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unsigned char ks8721_autonegotiate(AT91PS_EMAC p_mac, int *status) |
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{ |
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unsigned short value; |
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unsigned short phyanar; |
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unsigned short phyanalpar; |
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/* Set ks8721 control register */ |
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if (!at91rm9200_EmacReadPhy(p_mac, |
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CONFIG_PHY_ADDRESS | KS8721_BMCR, &value)) |
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return 0; |
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/* remove autonegotiation enable */ |
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value &= ~KS8721_AUTONEG; |
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/* Electrically isolate PHY */ |
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value |= KS8721_ISOLATE; |
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if (!at91rm9200_EmacWritePhy(p_mac, |
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CONFIG_PHY_ADDRESS | KS8721_BMCR, &value)) { |
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return 0; |
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} |
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/*
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* Set the Auto_negotiation Advertisement Register |
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* MII advertising for Next page, 100BaseTxFD and HD, |
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* 10BaseTFD and HD, IEEE 802.3 |
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*/ |
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phyanar = KS8721_NP | KS8721_TX_FDX | KS8721_TX_HDX | |
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KS8721_10_FDX | KS8721_10_HDX | KS8721_AN_IEEE_802_3; |
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if (!at91rm9200_EmacWritePhy(p_mac, |
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CONFIG_PHY_ADDRESS | KS8721_ANAR, &phyanar)) { |
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return 0; |
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} |
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/* Read the Control Register */ |
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if (!at91rm9200_EmacReadPhy(p_mac, |
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CONFIG_PHY_ADDRESS | KS8721_BMCR, &value)) { |
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return 0; |
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} |
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value |= KS8721_SPEED_SELECT | KS8721_AUTONEG | KS8721_DUPLEX_MODE; |
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if (!at91rm9200_EmacWritePhy(p_mac, |
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CONFIG_PHY_ADDRESS | KS8721_BMCR, &value)) { |
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return 0; |
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} |
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/* Restart Auto_negotiation */ |
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value |= KS8721_RESTART_AUTONEG; |
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value &= ~KS8721_ISOLATE; |
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if (!at91rm9200_EmacWritePhy(p_mac, |
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CONFIG_PHY_ADDRESS | KS8721_BMCR, &value)) { |
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return 0; |
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} |
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/* Check AutoNegotiate complete */ |
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udelay(10000); |
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at91rm9200_EmacReadPhy(p_mac, |
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CONFIG_PHY_ADDRESS | KS8721_BMSR, &value); |
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if (!(value & KS8721_AUTONEG_COMP)) |
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return 0; |
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/* Get the AutoNeg Link partner base page */ |
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if (!at91rm9200_EmacReadPhy(p_mac, |
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CONFIG_PHY_ADDRESS | KS8721_ANLPAR, &phyanalpar)) { |
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return 0; |
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} |
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if ((phyanar & KS8721_TX_FDX) && (phyanalpar & KS8721_TX_FDX)) { |
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/* Set MII for 100BaseTX and Full Duplex */ |
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p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD; |
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return 1; |
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} |
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if ((phyanar & KS8721_10_FDX) && (phyanalpar & KS8721_10_FDX)) { |
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/* Set MII for 10BaseT and Full Duplex */ |
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p_mac->EMAC_CFG = (p_mac->EMAC_CFG & |
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~(AT91C_EMAC_SPD | AT91C_EMAC_FD)) |
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| AT91C_EMAC_FD; |
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return 1; |
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} |
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return 0; |
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} |
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#endif /* CONFIG_CMD_NET */ |
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#endif /* CONFIG_DRIVER_ETHER */ |
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@ -0,0 +1,228 @@ |
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/*
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* CPUAT91 by (C) Copyright 2006 Eric Benard |
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* eric@eukrea.com |
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* |
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* Configuration settings for the CPUAT91 board. |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#ifndef __CONFIG_H |
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#define __CONFIG_H |
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#ifdef CONFIG_CPUAT91_RAM |
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#define CONFIG_SKIP_LOWLEVEL_INIT 1 |
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#define CONFIG_SKIP_RELOCATE_UBOOT 1 |
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#define CONFIG_CPUAT91 1 |
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#else |
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#define CONFIG_BOOTDELAY 1 |
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#endif |
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|
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#define AT91C_MAIN_CLOCK 179712000 |
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#define AT91C_MASTER_CLOCK 59904000 |
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|
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#define AT91_SLOW_CLOCK 32768 |
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|
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#define CONFIG_ARM920T 1 |
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#define CONFIG_AT91RM9200 1 |
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|
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#undef CONFIG_USE_IRQ |
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#define USE_920T_MMU 1 |
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|
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#define CONFIG_CMDLINE_TAG 1 |
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#define CONFIG_SETUP_MEMORY_TAGS 1 |
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#define CONFIG_INITRD_TAG 1 |
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|
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#ifndef CONFIG_SKIP_LOWLEVEL_INIT |
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#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 |
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/* flash */ |
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#define CONFIG_SYS_MC_PUIA_VAL 0x00000000 |
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#define CONFIG_SYS_MC_PUP_VAL 0x00000000 |
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#define CONFIG_SYS_MC_PUER_VAL 0x00000000 |
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#define CONFIG_SYS_MC_ASR_VAL 0x00000000 |
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#define CONFIG_SYS_MC_AASR_VAL 0x00000000 |
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#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 |
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#define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ |
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|
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/* clocks */ |
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#define CONFIG_SYS_PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */ |
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#define CONFIG_SYS_PLLBR_VAL 0x10483E0E /* 48.054857 MHz for USB */ |
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#define CONFIG_SYS_MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock */ |
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|
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/* sdram */ |
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#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as D16/D31 */ |
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#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000 |
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#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000 |
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#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=SDRAM */ |
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#define CONFIG_SYS_SDRC_CR_VAL 0x2188C155 /* set up the SDRAM */ |
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#define CONFIG_SYS_SDRAM 0x20000000 /* address of the SDRAM */ |
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#define CONFIG_SYS_SDRAM1 0x20000080 /* address of the SDRAM */ |
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#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to SDRAM */ |
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#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */ |
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#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */ |
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#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ |
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#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */ |
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#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ |
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#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ |
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|
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/* define one of these to choose the DBGU, USART0 or USART1 as console */ |
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#define CONFIG_AT91RM9200_USART 1 |
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#define CONFIG_DBGU 1 |
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#undef CONFIG_USART0 |
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#undef CONFIG_USART1 |
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|
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#define CONFIG_HARD_I2C 1 |
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|
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#if defined(CONFIG_HARD_I2C) |
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#define CONFIG_SYS_I2C_SPEED 50000 |
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#define CONFIG_SYS_I2C_SLAVE 0 |
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 |
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 |
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#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 1 |
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 |
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#endif |
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|
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#define CONFIG_BOOTP_BOOTFILESIZE 1 |
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#define CONFIG_BOOTP_BOOTPATH 1 |
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#define CONFIG_BOOTP_GATEWAY 1 |
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#define CONFIG_BOOTP_HOSTNAME 1 |
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|
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#include <config_cmd_default.h> |
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|
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#define CONFIG_CMD_DHCP 1 |
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#define CONFIG_CMD_PING 1 |
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#define CONFIG_CMD_MII 1 |
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#define CONFIG_CMD_CACHE 1 |
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#undef CONFIG_CMD_USB |
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#undef CONFIG_CMD_FPGA |
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#undef CONFIG_CMD_IMI |
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#undef CONFIG_CMD_LOADS |
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#undef CONFIG_CMD_NFS |
||||
|
||||
#if defined(CONFIG_HARD_I2C) |
||||
#define CONFIG_CMD_EEPROM 1 |
||||
#define CONFIG_CMD_I2C 1 |
||||
#endif |
||||
|
||||
#define CONFIG_NR_DRAM_BANKS 1 |
||||
#define PHYS_SDRAM 0x20000000 |
||||
#define PHYS_SDRAM_SIZE 0x02000000 |
||||
|
||||
#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM |
||||
#define CONFIG_SYS_MEMTEST_END \ |
||||
(CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 512 * 1024) |
||||
|
||||
#define CONFIG_DRIVER_ETHER 1 |
||||
#define CONFIG_NET_RETRY_COUNT 20 |
||||
#define CONFIG_AT91C_USE_RMII 1 |
||||
#define CONFIG_PHY_ADDRESS (1 << 5) |
||||
#define CONFIG_KS8721_PHY 1 |
||||
|
||||
#define CONFIG_SYS_FLASH_CFI 1 |
||||
#define CONFIG_FLASH_CFI_DRIVER 1 |
||||
#define CONFIG_SYS_FLASH_EMPTY_INFO 1 |
||||
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 |
||||
#define CONFIG_SYS_MAX_FLASH_BANKS 1 |
||||
#define CONFIG_SYS_FLASH_PROTECTION 1 |
||||
#define PHYS_FLASH_1 0x10000000 |
||||
#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 |
||||
#define CONFIG_SYS_MAX_FLASH_SECT 128 |
||||
|
||||
#if defined(CONFIG_CMD_USB) |
||||
#define CONFIG_USB_OHCI_NEW 1 |
||||
#define CONFIG_USB_STORAGE 1 |
||||
#define CONFIG_DOS_PARTITION 1 |
||||
#define CONFIG_AT91C_PQFP_UHPBU 1 |
||||
#undef CONFIG_SYS_USB_OHCI_BOARD_INIT |
||||
#define CONFIG_SYS_USB_OHCI_CPU_INIT 1 |
||||
#define CONFIG_SYS_USB_OHCI_REGS_BASE AT91_USB_HOST_BASE |
||||
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91rm9200" |
||||
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 |
||||
#endif |
||||
|
||||
#define CONFIG_ENV_IS_IN_FLASH 1 |
||||
#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x20000) |
||||
#define CONFIG_ENV_SIZE 0x20000 |
||||
#define CONFIG_ENV_SECT_SIZE 0x20000 |
||||
|
||||
#define CONFIG_SYS_LOAD_ADDR 0x21000000 |
||||
|
||||
#define CONFIG_BAUDRATE 115200 |
||||
#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 } |
||||
|
||||
#define CONFIG_SYS_PROMPT "CPUAT91=> " |
||||
#define CONFIG_SYS_CBSIZE 256 |
||||
#define CONFIG_SYS_MAXARGS 32 |
||||
#define CONFIG_SYS_PBSIZE \ |
||||
(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
||||
#define CONFIG_CMDLINE_EDITING 1 |
||||
#define CONFIG_SYS_LONGHELP 1 |
||||
|
||||
#define CONFIG_SYS_HZ 1000 |
||||
#define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK / 2) |
||||
|
||||
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) |
||||
#define CONFIG_SYS_GBL_DATA_SIZE 128 |
||||
#define CONFIG_STACKSIZE (32 * 1024) |
||||
|
||||
#if defined(CONFIG_USE_IRQ) |
||||
#error CONFIG_USE_IRQ not supported |
||||
#endif |
||||
|
||||
#define CONFIG_DEVICE_NULLDEV 1 |
||||
#define CONFIG_SILENT_CONSOLE 1 |
||||
|
||||
#define CONFIG_AUTOBOOT_KEYED 1 |
||||
#define CONFIG_AUTOBOOT_PROMPT \ |
||||
"Press SPACE to abort autoboot in %d seconds\n" |
||||
#define CONFIG_AUTOBOOT_STOP_STR " " |
||||
#define CONFIG_AUTOBOOT_DELAY_STR "d" |
||||
|
||||
#define CONFIG_VERSION_VARIABLE 1 |
||||
|
||||
#define MTDIDS_DEFAULT "nor0=physmap-flash.0" |
||||
#define MTDPARTS_DEFAULT \ |
||||
"mtdparts=physmap-flash.0:" \
|
||||
"128k(u-boot)ro," \
|
||||
"128k(u-boot-env)," \
|
||||
"1408k(kernel)," \
|
||||
"-(rootfs)" |
||||
|
||||
#define CONFIG_BOOTARGS \ |
||||
"root=/dev/mtdblock3 rootfstype=jffs2 console=ttyS0,115200" |
||||
|
||||
#define CONFIG_BOOTCOMMAND "run flashboot" |
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \ |
||||
"mtdid=" MTDIDS_DEFAULT "\0" \
|
||||
"mtdparts=" MTDPARTS_DEFAULT "\0" \
|
||||
"flub=tftp 21000000 cpuat91/u-boot.bin; protect off 10000000 " \
|
||||
"1001FFFF; erase 10000000 1001FFFF; cp.b 21000000 " \
|
||||
"10000000 ${filesize}\0" \
|
||||
"flui=tftp 21000000 cpuat91/uImage; protect off 10040000 " \
|
||||
"1019ffff; erase 10040000 1019ffff; cp.b 21000000 " \
|
||||
"10040000 ${filesize}\0" \
|
||||
"flrfs=tftp 21000000 cpuat91/rootfs.jffs2; protect off " \
|
||||
"101a0000 10ffffff; erase 101a0000 10ffffff; cp.b " \
|
||||
"21000000 101A0000 ${filesize}\0" \
|
||||
"ramargs=setenv bootargs $(bootargs) $(mtdparts)\0" \
|
||||
"flashboot=run ramargs;bootm 10040000\0" \
|
||||
"netboot=run ramargs;tftpboot 21000000 cpuat91/uImage;" \
|
||||
"bootm 21000000\0" |
||||
#endif /* __CONFIG_H */ |
||||
@ -0,0 +1,78 @@ |
||||
/*
|
||||
* NOTE: MICREL ethernet Physical layer |
||||
* |
||||
* Version: KS8721.h |
||||
* |
||||
* Authors: Eric Benard (based on dm9161.h) |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License |
||||
* as published by the Free Software Foundation; either version |
||||
* 2 of the License, or (at your option) any later version. |
||||
*/ |
||||
|
||||
/* MICREL PHYSICAL LAYER TRANSCEIVER KS8721 */ |
||||
|
||||
#define KS8721_BMCR 0 |
||||
#define KS8721_BMSR 1 |
||||
#define KS8721_PHYID1 2 |
||||
#define KS8721_PHYID2 3 |
||||
#define KS8721_ANAR 4 |
||||
#define KS8721_ANLPAR 5 |
||||
#define KS8721_ANER 6 |
||||
#define KS8721_RECR 15 |
||||
#define KS8721_MDINTR 27 |
||||
#define KS8721_100BT 31 |
||||
|
||||
/* --Bit definitions: KS8721_BMCR */ |
||||
#define KS8721_RESET (1 << 15) |
||||
#define KS8721_LOOPBACK (1 << 14) |
||||
#define KS8721_SPEED_SELECT (1 << 13) |
||||
#define KS8721_AUTONEG (1 << 12) |
||||
#define KS8721_POWER_DOWN (1 << 11) |
||||
#define KS8721_ISOLATE (1 << 10) |
||||
#define KS8721_RESTART_AUTONEG (1 << 9) |
||||
#define KS8721_DUPLEX_MODE (1 << 8) |
||||
#define KS8721_COLLISION_TEST (1 << 7) |
||||
#define KS8721_DISABLE (1 << 0) |
||||
|
||||
/*--Bit definitions: KS8721_BMSR */ |
||||
#define KS8721_100BASE_T4 (1 << 15) |
||||
#define KS8721_100BASE_TX_FD (1 << 14) |
||||
#define KS8721_100BASE_T4_HD (1 << 13) |
||||
#define KS8721_10BASE_T_FD (1 << 12) |
||||
#define KS8721_10BASE_T_HD (1 << 11) |
||||
#define KS8721_MF_PREAMB_SUPPR (1 << 6) |
||||
#define KS8721_AUTONEG_COMP (1 << 5) |
||||
#define KS8721_REMOTE_FAULT (1 << 4) |
||||
#define KS8721_AUTONEG_ABILITY (1 << 3) |
||||
#define KS8721_LINK_STATUS (1 << 2) |
||||
#define KS8721_JABBER_DETECT (1 << 1) |
||||
#define KS8721_EXTEND_CAPAB (1 << 0) |
||||
|
||||
/*--Bit definitions: KS8721_PHYID */ |
||||
#define KS8721_PHYID_OUI 0x0885 |
||||
#define KS8721_LSB_MASK 0x3F |
||||
|
||||
#define KS8721BL_MODEL 0x21 |
||||
#define KS8721_MODELMASK 0x3F0 |
||||
#define KS8721BL_REV 0x9 |
||||
#define KS8721_REVMASK 0xF |
||||
|
||||
/*--Bit definitions: KS8721_ANAR, KS8721_ANLPAR */ |
||||
#define KS8721_NP (1 << 15) |
||||
#define KS8721_ACK (1 << 14) |
||||
#define KS8721_RF (1 << 13) |
||||
#define KS8721_PAUSE (1 << 10) |
||||
#define KS8721_T4 (1 << 9) |
||||
#define KS8721_TX_FDX (1 << 8) |
||||
#define KS8721_TX_HDX (1 << 7) |
||||
#define KS8721_10_FDX (1 << 6) |
||||
#define KS8721_10_HDX (1 << 5) |
||||
#define KS8721_AN_IEEE_802_3 0x0001 |
||||
|
||||
/****************** function prototypes **********************/ |
||||
unsigned int ks8721_isphyconnected(AT91PS_EMAC p_mac); |
||||
unsigned char ks8721_getlinkspeed(AT91PS_EMAC p_mac); |
||||
unsigned char ks8721_autonegotiate(AT91PS_EMAC p_mac, int *status); |
||||
unsigned char ks8721_initphy(AT91PS_EMAC p_mac); |
||||
Loading…
Reference in new issue