From dc9cdf859e11de775e75cc233b09d6b6d257a818 Mon Sep 17 00:00:00 2001 From: Ramneek Mehresh Date: Fri, 29 May 2015 14:47:15 +0530 Subject: [PATCH 01/27] usb: dwc3: Add DWC3 controller driver support Add support for DWC3 XHCI controller driver Signed-off-by: Ramneek Mehresh --- drivers/usb/host/Makefile | 1 + drivers/usb/host/xhci-dwc3.c | 91 ++++++++++++++++++++++++++++++++++++++++++++ include/linux/usb/dwc3.h | 6 +++ 3 files changed, 98 insertions(+) create mode 100644 drivers/usb/host/xhci-dwc3.c diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index 4d35d3e..310d979 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -51,6 +51,7 @@ obj-$(CONFIG_USB_EHCI_ZYNQ) += ehci-zynq.o # xhci obj-$(CONFIG_USB_XHCI) += xhci.o xhci-mem.o xhci-ring.o +obj-$(CONFIG_USB_XHCI_DWC3) += xhci-dwc3.o obj-$(CONFIG_USB_XHCI_KEYSTONE) += xhci-keystone.o obj-$(CONFIG_USB_XHCI_EXYNOS) += xhci-exynos5.o obj-$(CONFIG_USB_XHCI_OMAP) += xhci-omap.o diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c new file mode 100644 index 0000000..67147cb --- /dev/null +++ b/drivers/usb/host/xhci-dwc3.c @@ -0,0 +1,91 @@ +/* + * Copyright 2015 Freescale Semiconductor, Inc. + * + * DWC3 controller driver + * + * Author: Ramneek Mehresh + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include + +void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode) +{ + clrsetbits_le32(&dwc3_reg->g_ctl, + DWC3_GCTL_PRTCAPDIR(DWC3_GCTL_PRTCAP_OTG), + DWC3_GCTL_PRTCAPDIR(mode)); +} + +void dwc3_phy_reset(struct dwc3 *dwc3_reg) +{ + /* Assert USB3 PHY reset */ + setbits_le32(&dwc3_reg->g_usb3pipectl[0], DWC3_GUSB3PIPECTL_PHYSOFTRST); + + /* Assert USB2 PHY reset */ + setbits_le32(&dwc3_reg->g_usb2phycfg, DWC3_GUSB2PHYCFG_PHYSOFTRST); + + mdelay(100); + + /* Clear USB3 PHY reset */ + clrbits_le32(&dwc3_reg->g_usb3pipectl[0], DWC3_GUSB3PIPECTL_PHYSOFTRST); + + /* Clear USB2 PHY reset */ + clrbits_le32(&dwc3_reg->g_usb2phycfg, DWC3_GUSB2PHYCFG_PHYSOFTRST); +} + +void dwc3_core_soft_reset(struct dwc3 *dwc3_reg) +{ + /* Before Resetting PHY, put Core in Reset */ + setbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); + + /* reset USB3 phy - if required */ + dwc3_phy_reset(dwc3_reg); + + /* After PHYs are stable we can take Core out of reset state */ + clrbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); +} + +int dwc3_core_init(struct dwc3 *dwc3_reg) +{ + u32 reg; + u32 revision; + unsigned int dwc3_hwparams1; + + revision = readl(&dwc3_reg->g_snpsid); + /* This should read as U3 followed by revision number */ + if ((revision & DWC3_GSNPSID_MASK) != 0x55330000) { + puts("this is not a DesignWare USB3 DRD Core\n"); + return -1; + } + + dwc3_core_soft_reset(dwc3_reg); + + dwc3_hwparams1 = readl(&dwc3_reg->g_hwparams1); + + reg = readl(&dwc3_reg->g_ctl); + reg &= ~DWC3_GCTL_SCALEDOWN_MASK; + reg &= ~DWC3_GCTL_DISSCRAMBLE; + switch (DWC3_GHWPARAMS1_EN_PWROPT(dwc3_hwparams1)) { + case DWC3_GHWPARAMS1_EN_PWROPT_CLK: + reg &= ~DWC3_GCTL_DSBLCLKGTNG; + break; + default: + debug("No power optimization available\n"); + } + + /* + * WORKAROUND: DWC3 revisions <1.90a have a bug + * where the device can fail to connect at SuperSpeed + * and falls back to high-speed mode which causes + * the device to enter a Connect/Disconnect loop + */ + if ((revision & DWC3_REVISION_MASK) < 0x190a) + reg |= DWC3_GCTL_U2RSTECN; + + writel(reg, &dwc3_reg->g_ctl); + + return 0; +} diff --git a/include/linux/usb/dwc3.h b/include/linux/usb/dwc3.h index 7edc760..ba7f314 100644 --- a/include/linux/usb/dwc3.h +++ b/include/linux/usb/dwc3.h @@ -191,4 +191,10 @@ struct dwc3 { /* offset: 0xC100 */ #define DWC3_DCTL_CSFTRST (1 << 30) #define DWC3_DCTL_LSFTRST (1 << 29) +#ifdef CONFIG_USB_XHCI_DWC3 +void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode); +void dwc3_core_soft_reset(struct dwc3 *dwc3_reg); +int dwc3_core_init(struct dwc3 *dwc3_reg); +void usb_phy_reset(struct dwc3 *dwc3_reg); +#endif #endif /* __DWC3_H_ */ From 552d60cc222f649b762b3adb9b5f1d681ccd062a Mon Sep 17 00:00:00 2001 From: Ramneek Mehresh Date: Fri, 29 May 2015 14:47:16 +0530 Subject: [PATCH 02/27] usb: xhci: exynos: Remove common dwc3 drv functions calls Remove all redundant dwc3 driver function calls that are defined by dwc3 driver Signed-off-by: Ramneek Mehresh --- drivers/usb/host/xhci-exynos5.c | 78 ---------------------------------------- include/configs/exynos5-common.h | 1 + 2 files changed, 1 insertion(+), 78 deletions(-) diff --git a/drivers/usb/host/xhci-exynos5.c b/drivers/usb/host/xhci-exynos5.c index a27a796..251885b 100644 --- a/drivers/usb/host/xhci-exynos5.c +++ b/drivers/usb/host/xhci-exynos5.c @@ -179,84 +179,6 @@ static void exynos5_usb3_phy_exit(struct exynos_usb3_phy *phy) set_usbdrd_phy_ctrl(POWER_USB_DRD_PHY_CTRL_DISABLE); } -static void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode) -{ - clrsetbits_le32(&dwc3_reg->g_ctl, - DWC3_GCTL_PRTCAPDIR(DWC3_GCTL_PRTCAP_OTG), - DWC3_GCTL_PRTCAPDIR(mode)); -} - -static void dwc3_core_soft_reset(struct dwc3 *dwc3_reg) -{ - /* Before Resetting PHY, put Core in Reset */ - setbits_le32(&dwc3_reg->g_ctl, - DWC3_GCTL_CORESOFTRESET); - - /* Assert USB3 PHY reset */ - setbits_le32(&dwc3_reg->g_usb3pipectl[0], - DWC3_GUSB3PIPECTL_PHYSOFTRST); - - /* Assert USB2 PHY reset */ - setbits_le32(&dwc3_reg->g_usb2phycfg, - DWC3_GUSB2PHYCFG_PHYSOFTRST); - - mdelay(100); - - /* Clear USB3 PHY reset */ - clrbits_le32(&dwc3_reg->g_usb3pipectl[0], - DWC3_GUSB3PIPECTL_PHYSOFTRST); - - /* Clear USB2 PHY reset */ - clrbits_le32(&dwc3_reg->g_usb2phycfg, - DWC3_GUSB2PHYCFG_PHYSOFTRST); - - /* After PHYs are stable we can take Core out of reset state */ - clrbits_le32(&dwc3_reg->g_ctl, - DWC3_GCTL_CORESOFTRESET); -} - -static int dwc3_core_init(struct dwc3 *dwc3_reg) -{ - u32 reg; - u32 revision; - unsigned int dwc3_hwparams1; - - revision = readl(&dwc3_reg->g_snpsid); - /* This should read as U3 followed by revision number */ - if ((revision & DWC3_GSNPSID_MASK) != 0x55330000) { - puts("this is not a DesignWare USB3 DRD Core\n"); - return -EINVAL; - } - - dwc3_core_soft_reset(dwc3_reg); - - dwc3_hwparams1 = readl(&dwc3_reg->g_hwparams1); - - reg = readl(&dwc3_reg->g_ctl); - reg &= ~DWC3_GCTL_SCALEDOWN_MASK; - reg &= ~DWC3_GCTL_DISSCRAMBLE; - switch (DWC3_GHWPARAMS1_EN_PWROPT(dwc3_hwparams1)) { - case DWC3_GHWPARAMS1_EN_PWROPT_CLK: - reg &= ~DWC3_GCTL_DSBLCLKGTNG; - break; - default: - debug("No power optimization available\n"); - } - - /* - * WORKAROUND: DWC3 revisions <1.90a have a bug - * where the device can fail to connect at SuperSpeed - * and falls back to high-speed mode which causes - * the device to enter a Connect/Disconnect loop - */ - if ((revision & DWC3_REVISION_MASK) < 0x190a) - reg |= DWC3_GCTL_U2RSTECN; - - writel(reg, &dwc3_reg->g_ctl); - - return 0; -} - static int exynos_xhci_core_init(struct exynos_xhci *exynos) { int ret; diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h index 5476248..e04dec7 100644 --- a/include/configs/exynos5-common.h +++ b/include/configs/exynos5-common.h @@ -182,6 +182,7 @@ /* USB */ #define CONFIG_CMD_USB #define CONFIG_USB_STORAGE +#define CONFIG_USB_XHCI_DWC3 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 From 2770448c8cd440a29619e9daa99484a0e5a6fad7 Mon Sep 17 00:00:00 2001 From: Ramneek Mehresh Date: Fri, 29 May 2015 14:47:17 +0530 Subject: [PATCH 03/27] usb: xhci: omap: Remove common dwc3 drv functions calls Remove all redundant dwc3 driver function calls that are defined by dwc3 driver Signed-off-by: Ramneek Mehresh --- drivers/usb/host/xhci-omap.c | 60 ------------------------------------------ drivers/usb/phy/omap_usb_phy.c | 18 ------------- include/configs/am43xx_evm.h | 1 + include/configs/beagle_x15.h | 1 + include/configs/dra7xx_evm.h | 1 + 5 files changed, 3 insertions(+), 78 deletions(-) diff --git a/drivers/usb/host/xhci-omap.c b/drivers/usb/host/xhci-omap.c index 912b2bd..3a55208 100644 --- a/drivers/usb/host/xhci-omap.c +++ b/drivers/usb/host/xhci-omap.c @@ -34,66 +34,6 @@ inline int __board_usb_init(int index, enum usb_init_type init) int board_usb_init(int index, enum usb_init_type init) __attribute__((weak, alias("__board_usb_init"))); -static void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode) -{ - clrsetbits_le32(&dwc3_reg->g_ctl, - DWC3_GCTL_PRTCAPDIR(DWC3_GCTL_PRTCAP_OTG), - DWC3_GCTL_PRTCAPDIR(mode)); -} - -static void dwc3_core_soft_reset(struct dwc3 *dwc3_reg) -{ - /* Before Resetting PHY, put Core in Reset */ - setbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); - - omap_reset_usb_phy(dwc3_reg); - - /* After PHYs are stable we can take Core out of reset state */ - clrbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); -} - -static int dwc3_core_init(struct dwc3 *dwc3_reg) -{ - u32 reg; - u32 revision; - unsigned int dwc3_hwparams1; - - revision = readl(&dwc3_reg->g_snpsid); - /* This should read as U3 followed by revision number */ - if ((revision & DWC3_GSNPSID_MASK) != 0x55330000) { - puts("this is not a DesignWare USB3 DRD Core\n"); - return -1; - } - - dwc3_core_soft_reset(dwc3_reg); - - dwc3_hwparams1 = readl(&dwc3_reg->g_hwparams1); - - reg = readl(&dwc3_reg->g_ctl); - reg &= ~DWC3_GCTL_SCALEDOWN_MASK; - reg &= ~DWC3_GCTL_DISSCRAMBLE; - switch (DWC3_GHWPARAMS1_EN_PWROPT(dwc3_hwparams1)) { - case DWC3_GHWPARAMS1_EN_PWROPT_CLK: - reg &= ~DWC3_GCTL_DSBLCLKGTNG; - break; - default: - debug("No power optimization available\n"); - } - - /* - * WORKAROUND: DWC3 revisions <1.90a have a bug - * where the device can fail to connect at SuperSpeed - * and falls back to high-speed mode which causes - * the device to enter a Connect/Disconnect loop - */ - if ((revision & DWC3_REVISION_MASK) < 0x190a) - reg |= DWC3_GCTL_U2RSTECN; - - writel(reg, &dwc3_reg->g_ctl); - - return 0; -} - static int omap_xhci_core_init(struct omap_xhci *omap) { int ret = 0; diff --git a/drivers/usb/phy/omap_usb_phy.c b/drivers/usb/phy/omap_usb_phy.c index 63d9301..f9069c7 100644 --- a/drivers/usb/phy/omap_usb_phy.c +++ b/drivers/usb/phy/omap_usb_phy.c @@ -223,24 +223,6 @@ void usb_phy_power(int on) } #endif /* CONFIG_AM437X_USB2PHY2_HOST */ -void omap_reset_usb_phy(struct dwc3 *dwc3_reg) -{ - /* Assert USB3 PHY reset */ - setbits_le32(&dwc3_reg->g_usb3pipectl[0], DWC3_GUSB3PIPECTL_PHYSOFTRST); - - /* Assert USB2 PHY reset */ - setbits_le32(&dwc3_reg->g_usb2phycfg, DWC3_GUSB2PHYCFG_PHYSOFTRST); - - mdelay(100); - - /* Clear USB3 PHY reset */ - clrbits_le32(&dwc3_reg->g_usb3pipectl[0], DWC3_GUSB3PIPECTL_PHYSOFTRST); - - /* Clear USB2 PHY reset */ - clrbits_le32(&dwc3_reg->g_usb2phycfg, DWC3_GUSB2PHYCFG_PHYSOFTRST); - -} - void omap_enable_phy(struct omap_xhci *omap) { #ifdef CONFIG_OMAP_USB2PHY2_HOST diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index 33e534a..ccdfb9c 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -110,6 +110,7 @@ #define CONFIG_CMD_USB #define CONFIG_USB_HOST #define CONFIG_USB_XHCI +#define CONFIG_USB_XHCI_DWC3 #define CONFIG_USB_XHCI_OMAP #define CONFIG_USB_STORAGE #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 diff --git a/include/configs/beagle_x15.h b/include/configs/beagle_x15.h index 17fdded..d38b7b5 100644 --- a/include/configs/beagle_x15.h +++ b/include/configs/beagle_x15.h @@ -68,6 +68,7 @@ /* USB xHCI HOST */ #define CONFIG_CMD_USB #define CONFIG_USB_HOST +#define CONFIG_USB_XHCI_DWC3 #define CONFIG_USB_XHCI #define CONFIG_USB_XHCI_OMAP #define CONFIG_USB_STORAGE diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index d84427d..0323c72 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -175,6 +175,7 @@ #define CONFIG_CMD_USB #define CONFIG_USB_HOST #define CONFIG_USB_XHCI +#define CONFIG_USB_XHCI_DWC3 #define CONFIG_USB_XHCI_OMAP #define CONFIG_USB_STORAGE #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 From 792651f030a0b77961e484f8de36fa42add61900 Mon Sep 17 00:00:00 2001 From: Ramneek Mehresh Date: Fri, 29 May 2015 14:47:18 +0530 Subject: [PATCH 04/27] usb: xhci: keystone: Remove common dwc3 drv functions calls Remove all redundant dwc3 driver function calls that are defined by dwc3 driver Signed-off-by: Ramneek Mehresh --- drivers/usb/host/xhci-keystone.c | 88 ---------------------------------------- include/configs/ks2_evm.h | 1 + 2 files changed, 1 insertion(+), 88 deletions(-) diff --git a/drivers/usb/host/xhci-keystone.c b/drivers/usb/host/xhci-keystone.c index 05d338f..924fb76 100644 --- a/drivers/usb/host/xhci-keystone.c +++ b/drivers/usb/host/xhci-keystone.c @@ -68,94 +68,6 @@ static void keystone_xhci_phy_unset(struct keystone_xhci_phy *phy) writel(val, &phy->phy_clock); } -static void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode) -{ - clrsetbits_le32(&dwc3_reg->g_ctl, - DWC3_GCTL_PRTCAPDIR(DWC3_GCTL_PRTCAP_OTG), - DWC3_GCTL_PRTCAPDIR(mode)); -} - -static void dwc3_core_soft_reset(struct dwc3 *dwc3_reg) -{ - /* Before Resetting PHY, put Core in Reset */ - setbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); - - /* Assert USB3 PHY reset */ - setbits_le32(&dwc3_reg->g_usb3pipectl[0], DWC3_GUSB3PIPECTL_PHYSOFTRST); - - /* Assert USB2 PHY reset */ - setbits_le32(&dwc3_reg->g_usb2phycfg[0], DWC3_GUSB2PHYCFG_PHYSOFTRST); - - mdelay(100); - - /* Clear USB3 PHY reset */ - clrbits_le32(&dwc3_reg->g_usb3pipectl[0], DWC3_GUSB3PIPECTL_PHYSOFTRST); - - /* Clear USB2 PHY reset */ - clrbits_le32(&dwc3_reg->g_usb2phycfg[0], DWC3_GUSB2PHYCFG_PHYSOFTRST); - - /* After PHYs are stable we can take Core out of reset state */ - clrbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); -} - -static int dwc3_core_init(struct dwc3 *dwc3_reg) -{ - u32 revision, val; - unsigned long t_rst; - unsigned int dwc3_hwparams1; - - revision = readl(&dwc3_reg->g_snpsid); - /* This should read as U3 followed by revision number */ - if ((revision & DWC3_GSNPSID_MASK) != 0x55330000) { - puts("this is not a DesignWare USB3 DRD Core\n"); - return -EINVAL; - } - - /* issue device SoftReset too */ - writel(DWC3_DCTL_CSFTRST, &dwc3_reg->d_ctl); - - t_rst = get_timer(0); - do { - val = readl(&dwc3_reg->d_ctl); - if (!(val & DWC3_DCTL_CSFTRST)) - break; - WATCHDOG_RESET(); - } while (get_timer(t_rst) < 500); - - if (val & DWC3_DCTL_CSFTRST) { - debug("Reset timed out\n"); - return -2; - } - - dwc3_core_soft_reset(dwc3_reg); - - dwc3_hwparams1 = readl(&dwc3_reg->g_hwparams1); - - val = readl(&dwc3_reg->g_ctl); - val &= ~DWC3_GCTL_SCALEDOWN_MASK; - val &= ~DWC3_GCTL_DISSCRAMBLE; - switch (DWC3_GHWPARAMS1_EN_PWROPT(dwc3_hwparams1)) { - case DWC3_GHWPARAMS1_EN_PWROPT_CLK: - val &= ~DWC3_GCTL_DSBLCLKGTNG; - break; - default: - printf("No power optimization available\n"); - } - - /* - * WORKAROUND: DWC3 revisions <1.90a have a bug - * where the device can fail to connect at SuperSpeed - * and falls back to high-speed mode which causes - * the device to enter a Connect/Disconnect loop - */ - if ((revision & DWC3_REVISION_MASK) < 0x190a) - val |= DWC3_GCTL_U2RSTECN; - - writel(val, &dwc3_reg->g_ctl); - - return 0; -} - static int keystone_xhci_core_init(struct dwc3 *dwc3_reg) { int ret; diff --git a/include/configs/ks2_evm.h b/include/configs/ks2_evm.h index e05d56c..eb4bcaf 100644 --- a/include/configs/ks2_evm.h +++ b/include/configs/ks2_evm.h @@ -195,6 +195,7 @@ /* USB Configuration */ #define CONFIG_USB_XHCI +#define CONFIG_USB_XHCI_DWC3 #define CONFIG_USB_XHCI_KEYSTONE #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 #define CONFIG_USB_STORAGE From ba92ee06a5b792e5cbc144f95883cc54f4982255 Mon Sep 17 00:00:00 2001 From: Ramneek Mehresh Date: Fri, 29 May 2015 14:47:19 +0530 Subject: [PATCH 05/27] usb: fsl: Add XHCI driver support Add xhci driver support for all FSL socs Signed-off-by: Ramneek Mehresh --- drivers/usb/host/Makefile | 1 + drivers/usb/host/xhci-fsl.c | 109 +++++++++++++++++++++++++++++++++++++++++++ include/linux/usb/xhci-fsl.h | 54 +++++++++++++++++++++ 3 files changed, 164 insertions(+) create mode 100644 drivers/usb/host/xhci-fsl.c create mode 100644 include/linux/usb/xhci-fsl.h diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index 310d979..6cc3bbd 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -54,6 +54,7 @@ obj-$(CONFIG_USB_XHCI) += xhci.o xhci-mem.o xhci-ring.o obj-$(CONFIG_USB_XHCI_DWC3) += xhci-dwc3.o obj-$(CONFIG_USB_XHCI_KEYSTONE) += xhci-keystone.o obj-$(CONFIG_USB_XHCI_EXYNOS) += xhci-exynos5.o +obj-$(CONFIG_USB_XHCI_FSL) += xhci-fsl.o obj-$(CONFIG_USB_XHCI_OMAP) += xhci-omap.o obj-$(CONFIG_USB_XHCI_PCI) += xhci-pci.o obj-$(CONFIG_USB_XHCI_UNIPHIER) += xhci-uniphier.o diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c new file mode 100644 index 0000000..f624c90 --- /dev/null +++ b/drivers/usb/host/xhci-fsl.c @@ -0,0 +1,109 @@ +/* + * Copyright 2015 Freescale Semiconductor, Inc. + * + * FSL USB HOST xHCI Controller + * + * Author: Ramneek Mehresh + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include "xhci.h" + +/* Declare global data pointer */ +DECLARE_GLOBAL_DATA_PTR; + +static struct fsl_xhci fsl_xhci; +unsigned long ctr_addr[] = FSL_USB_XHCI_ADDR; + +__weak int __board_usb_init(int index, enum usb_init_type init) +{ + return 0; +} + +void usb_phy_reset(struct dwc3 *dwc3_reg) +{ + /* Assert USB3 PHY reset */ + setbits_le32(&dwc3_reg->g_usb3pipectl[0], DWC3_GUSB3PIPECTL_PHYSOFTRST); + + /* Assert USB2 PHY reset */ + setbits_le32(&dwc3_reg->g_usb2phycfg, DWC3_GUSB2PHYCFG_PHYSOFTRST); + + mdelay(200); + + /* Clear USB3 PHY reset */ + clrbits_le32(&dwc3_reg->g_usb3pipectl[0], DWC3_GUSB3PIPECTL_PHYSOFTRST); + + /* Clear USB2 PHY reset */ + clrbits_le32(&dwc3_reg->g_usb2phycfg, DWC3_GUSB2PHYCFG_PHYSOFTRST); +} + +static int fsl_xhci_core_init(struct fsl_xhci *fsl_xhci) +{ + int ret = 0; + + ret = dwc3_core_init(fsl_xhci->dwc3_reg); + if (ret) { + debug("%s:failed to initialize core\n", __func__); + return ret; + } + + /* We are hard-coding DWC3 core to Host Mode */ + dwc3_set_mode(fsl_xhci->dwc3_reg, DWC3_GCTL_PRTCAP_HOST); + + return ret; +} + +static int fsl_xhci_core_exit(struct fsl_xhci *fsl_xhci) +{ + /* + * Currently fsl socs do not support PHY shutdown from + * sw. But this support may be added in future socs. + */ + return 0; +} + +int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor) +{ + struct fsl_xhci *ctx = &fsl_xhci; + int ret = 0; + + ctx->hcd = (struct xhci_hccr *)ctr_addr[index]; + ctx->dwc3_reg = (struct dwc3 *)((char *)(ctx->hcd) + DWC3_REG_OFFSET); + + ret = board_usb_init(index, USB_INIT_HOST); + if (ret != 0) { + puts("Failed to initialize board for USB\n"); + return ret; + } + + ret = fsl_xhci_core_init(ctx); + if (ret < 0) { + puts("Failed to initialize xhci\n"); + return ret; + } + + *hccr = (struct xhci_hccr *)ctx->hcd; + *hcor = (struct xhci_hcor *)((uint32_t) *hccr + + HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase))); + + debug("fsl-xhci: init hccr %x and hcor %x hc_length %d\n", + (uint32_t)*hccr, (uint32_t)*hcor, + (uint32_t)HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase))); + + return ret; +} + +void xhci_hcd_stop(int index) +{ + struct fsl_xhci *ctx = &fsl_xhci; + + fsl_xhci_core_exit(ctx); +} diff --git a/include/linux/usb/xhci-fsl.h b/include/linux/usb/xhci-fsl.h new file mode 100644 index 0000000..8eaab2c --- /dev/null +++ b/include/linux/usb/xhci-fsl.h @@ -0,0 +1,54 @@ +/* + * Copyright 2015 Freescale Semiconductor, Inc. + * + * FSL USB HOST xHCI Controller + * + * Author: Ramneek Mehresh + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _ASM_ARCH_XHCI_FSL_H_ +#define _ASM_ARCH_XHCI_FSL_H_ + +/* Default to the FSL XHCI defines */ +#define USB3_PWRCTL_CLK_CMD_MASK 0x3FE000 +#define USB3_PWRCTL_CLK_FREQ_MASK 0xFFC +#define USB3_PHY_PARTIAL_RX_POWERON BIT(6) +#define USB3_PHY_RX_POWERON BIT(14) +#define USB3_PHY_TX_POWERON BIT(15) +#define USB3_PHY_TX_RX_POWERON (USB3_PHY_RX_POWERON | USB3_PHY_TX_POWERON) +#define USB3_PWRCTL_CLK_CMD_SHIFT 14 +#define USB3_PWRCTL_CLK_FREQ_SHIFT 22 + +/* USBOTGSS_WRAPPER definitions */ +#define USBOTGSS_WRAPRESET BIT(17) +#define USBOTGSS_DMADISABLE BIT(16) +#define USBOTGSS_STANDBYMODE_NO_STANDBY BIT(4) +#define USBOTGSS_STANDBYMODE_SMRT BIT(5) +#define USBOTGSS_STANDBYMODE_SMRT_WKUP (0x3 << 4) +#define USBOTGSS_IDLEMODE_NOIDLE BIT(2) +#define USBOTGSS_IDLEMODE_SMRT BIT(3) +#define USBOTGSS_IDLEMODE_SMRT_WKUP (0x3 << 2) + +/* USBOTGSS_IRQENABLE_SET_0 bit */ +#define USBOTGSS_COREIRQ_EN BIT(1) + +/* USBOTGSS_IRQENABLE_SET_1 bits */ +#define USBOTGSS_IRQ_SET_1_IDPULLUP_FALL_EN BIT(1) +#define USBOTGSS_IRQ_SET_1_DISCHRGVBUS_FALL_EN BIT(3) +#define USBOTGSS_IRQ_SET_1_CHRGVBUS_FALL_EN BIT(4) +#define USBOTGSS_IRQ_SET_1_DRVVBUS_FALL_EN BIT(5) +#define USBOTGSS_IRQ_SET_1_IDPULLUP_RISE_EN BIT(8) +#define USBOTGSS_IRQ_SET_1_DISCHRGVBUS_RISE_EN BIT(11) +#define USBOTGSS_IRQ_SET_1_CHRGVBUS_RISE_EN BIT(12) +#define USBOTGSS_IRQ_SET_1_DRVVBUS_RISE_EN BIT(13) +#define USBOTGSS_IRQ_SET_1_OEVT_EN BIT(16) +#define USBOTGSS_IRQ_SET_1_DMADISABLECLR_EN BIT(17) + +struct fsl_xhci { + struct xhci_hccr *hcd; + struct dwc3 *dwc3_reg; +}; + +#endif /* _ASM_ARCH_XHCI_FSL_H_ */ From d09e401b439859cf9435bfe363265b4322e93cd9 Mon Sep 17 00:00:00 2001 From: Ramneek Mehresh Date: Fri, 29 May 2015 14:47:20 +0530 Subject: [PATCH 06/27] arch: arm: fsl: Add XHCI support for LS1021A Add base register address information for USB XHCI controller on LS1021A Signed-off-by: Ramneek Mehresh --- arch/arm/include/asm/arch-ls102xa/config.h | 1 + arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 10 ++++++++++ 2 files changed, 11 insertions(+) diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index 4dc528b..c55cdef 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -35,6 +35,7 @@ #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x011c0500) #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x011d0500) #define CONFIG_SYS_DCU_ADDR (CONFIG_SYS_IMMR + 0x01ce0000) +#define CONFIG_SYS_LS102XA_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x02100000) #define CONFIG_SYS_LS102XA_USB1_ADDR \ (CONFIG_SYS_IMMR + CONFIG_SYS_LS102XA_USB1_OFFSET) diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h index 6a330cc..e759b52 100644 --- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h @@ -396,4 +396,14 @@ struct ccsr_cci400 { } pcounter[4]; /* Performance Counter */ u8 res_e004[0x10000 - 0xe004]; }; + +/* USB-XHCI */ +#define FSL_XHCI_BASE 0x3100000 +#define FSL_OCP1_SCP_BASE 0x4a084c00 +#define FSL_OTG_WRAPPER_BASE 0x4A020000 + +#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_LS102XA_XHCI_USB1_ADDR +#define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0 +#define FSL_USB_XHCI_ADDR {CONFIG_SYS_FSL_XHCI_USB1_ADDR, \ + CONFIG_SYS_FSL_XHCI_USB2_ADDR} #endif /* __ASM_ARCH_LS102XA_IMMAP_H_ */ From 10a28644941327dc26760bc06294a5f588b46d30 Mon Sep 17 00:00:00 2001 From: Ramneek Mehresh Date: Fri, 29 May 2015 14:47:21 +0530 Subject: [PATCH 07/27] ls1021atwr: Enable USB IP support Enable USB IP support for both EHCI and XHCI for ls1021atwr platform Signed-off-by: Ramneek Mehresh --- include/configs/ls1021atwr.h | 38 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index d0432c3..cf2aaa3 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -28,6 +28,44 @@ #define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE /* + * USB + */ + +/* + * EHCI Support - disbaled by default as + * there is no signal coming out of soc on + * this board for this controller. However, + * the silicon still has this controller, + * and anyone can use this controller by + * taking signals out on their board. + */ + +/*#define CONFIG_HAS_FSL_DR_USB*/ + +#ifdef CONFIG_HAS_FSL_DR_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_FSL +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#endif + +/* XHCI Support - enabled by default */ +#define CONFIG_HAS_FSL_XHCI_USB + +#ifdef CONFIG_HAS_FSL_XHCI_USB +#define CONFIG_USB_XHCI_FSL +#define CONFIG_USB_XHCI_DWC3 +#define CONFIG_USB_XHCI +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 +#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 +#endif + +#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_XHCI_USB) +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#define CONFIG_CMD_EXT2 +#endif + +/* * Generic Timer Definitions */ #define GENERIC_TIMER_CLK 12500000 From 081a1b730d5bc63070765e0e3e61517eef3f9eb0 Mon Sep 17 00:00:00 2001 From: Ramneek Mehresh Date: Fri, 29 May 2015 14:47:22 +0530 Subject: [PATCH 08/27] ls1021aqds: Enable USB IP support Enable USB IP support for both EHCI and XHCI for ls1021aqds platform Signed-off-by: Ramneek Mehresh --- include/configs/ls1021aqds.h | 22 +++++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-) diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index cacbae7..13f9338 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -432,19 +432,31 @@ unsigned long get_board_ddr_clk(void); /* * USB */ -#define CONFIG_HAS_FSL_DR_USB +/* EHCI Support - disbaled by default */ +/*#define CONFIG_HAS_FSL_DR_USB*/ #ifdef CONFIG_HAS_FSL_DR_USB #define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_FSL +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#endif -#ifdef CONFIG_USB_EHCI +/*XHCI Support - enabled by default*/ +#define CONFIG_HAS_FSL_XHCI_USB + +#ifdef CONFIG_HAS_FSL_XHCI_USB +#define CONFIG_USB_XHCI_FSL +#define CONFIG_USB_XHCI_DWC3 +#define CONFIG_USB_XHCI +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 +#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 +#endif + +#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_XHCI_USB) #define CONFIG_CMD_USB #define CONFIG_USB_STORAGE -#define CONFIG_USB_EHCI_FSL -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_CMD_EXT2 #endif -#endif /* * Video From 7e5a32fcf378d30cb2ab5f8471071350574ff70a Mon Sep 17 00:00:00 2001 From: Nikhil Badola Date: Tue, 23 Jun 2015 09:17:32 +0530 Subject: [PATCH 09/27] drivers: usb: fsl: Remove warnings for 64-bit architectures Replace uint32_t with uintptr_t to remove compilation warnings for 64-bit architectures. Signed-off-by: Nikhil Badola --- drivers/usb/host/xhci-fsl.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c index f624c90..385422a 100644 --- a/drivers/usb/host/xhci-fsl.c +++ b/drivers/usb/host/xhci-fsl.c @@ -91,12 +91,12 @@ int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor) } *hccr = (struct xhci_hccr *)ctx->hcd; - *hcor = (struct xhci_hcor *)((uint32_t) *hccr + *hcor = (struct xhci_hcor *)((uintptr_t) *hccr + HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase))); - debug("fsl-xhci: init hccr %x and hcor %x hc_length %d\n", - (uint32_t)*hccr, (uint32_t)*hcor, - (uint32_t)HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase))); + debug("fsl-xhci: init hccr %lx and hcor %lx hc_length %lx\n", + (uintptr_t)*hccr, (uintptr_t)*hcor, + (uintptr_t)HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase))); return ret; } From 667f4dd90f0f40f8d4fde7ef280550ef5f7946f8 Mon Sep 17 00:00:00 2001 From: Nikhil Badola Date: Tue, 23 Jun 2015 09:17:49 +0530 Subject: [PATCH 10/27] drivers: usb: fsl: Implement Erratum A-009116 for XHCI controller This adjusts (micro)frame length to appropriate value thus avoiding USB devices to time out over a longer run Signed-off-by: Nikhil Badola --- drivers/usb/host/xhci-dwc3.c | 6 ++++++ drivers/usb/host/xhci-fsl.c | 3 +++ include/linux/usb/dwc3.h | 22 ++++++++++++++++------ 3 files changed, 25 insertions(+), 6 deletions(-) diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c index 67147cb..c722c50 100644 --- a/drivers/usb/host/xhci-dwc3.c +++ b/drivers/usb/host/xhci-dwc3.c @@ -89,3 +89,9 @@ int dwc3_core_init(struct dwc3 *dwc3_reg) return 0; } + +void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val) +{ + setbits_le32(&dwc3_reg->g_fladj, GFLADJ_30MHZ_REG_SEL | + GFLADJ_30MHZ(val)); +} diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c index 385422a..6781b94 100644 --- a/drivers/usb/host/xhci-fsl.c +++ b/drivers/usb/host/xhci-fsl.c @@ -58,6 +58,9 @@ static int fsl_xhci_core_init(struct fsl_xhci *fsl_xhci) /* We are hard-coding DWC3 core to Host Mode */ dwc3_set_mode(fsl_xhci->dwc3_reg, DWC3_GCTL_PRTCAP_HOST); + /* Set GFLADJ_30MHZ as 20h as per XHCI spec default value */ + dwc3_set_fladj(fsl_xhci->dwc3_reg, GFLADJ_30MHZ_DEFAULT); + return ret; } diff --git a/include/linux/usb/dwc3.h b/include/linux/usb/dwc3.h index ba7f314..dd934a0 100644 --- a/include/linux/usb/dwc3.h +++ b/include/linux/usb/dwc3.h @@ -109,7 +109,11 @@ struct dwc3 { /* offset: 0xC100 */ u32 g_hwparams8; - u32 reserved4[63]; + u32 reserved4[11]; + + u32 g_fladj; + + u32 reserved5[51]; u32 d_cfg; u32 d_ctl; @@ -118,15 +122,15 @@ struct dwc3 { /* offset: 0xC100 */ u32 d_gcmdpar; u32 d_gcmd; - u32 reserved5[2]; + u32 reserved6[2]; u32 d_alepena; - u32 reserved6[55]; + u32 reserved7[55]; struct d_physical_endpoint d_phy_ep_cmd[32]; - u32 reserved7[128]; + u32 reserved8[128]; u32 o_cfg; u32 o_ctl; @@ -134,7 +138,7 @@ struct dwc3 { /* offset: 0xC100 */ u32 o_evten; u32 o_sts; - u32 reserved8[3]; + u32 reserved9[3]; u32 adp_cfg; u32 adp_ctl; @@ -143,7 +147,7 @@ struct dwc3 { /* offset: 0xC100 */ u32 bc_cfg; - u32 reserved9; + u32 reserved10; u32 bc_evt; u32 bc_evten; @@ -191,10 +195,16 @@ struct dwc3 { /* offset: 0xC100 */ #define DWC3_DCTL_CSFTRST (1 << 30) #define DWC3_DCTL_LSFTRST (1 << 29) +/* Global Frame Length Adjustment Register */ +#define GFLADJ_30MHZ_REG_SEL (1 << 7) +#define GFLADJ_30MHZ(n) ((n) & 0x3f) +#define GFLADJ_30MHZ_DEFAULT 0x20 + #ifdef CONFIG_USB_XHCI_DWC3 void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode); void dwc3_core_soft_reset(struct dwc3 *dwc3_reg); int dwc3_core_init(struct dwc3 *dwc3_reg); void usb_phy_reset(struct dwc3 *dwc3_reg); +void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val); #endif #endif /* __DWC3_H_ */ From 909a1ab2f05a53b2e5a0c604a88c06adc8b4929c Mon Sep 17 00:00:00 2001 From: Nikhil Badola Date: Tue, 23 Jun 2015 09:18:03 +0530 Subject: [PATCH 11/27] include: usb: Move USB controller base address mapping Move USB controller Base address mapping from ls102xa immap to fsl xhci header. This is required to remove any warnings when controller base addresses are mapped for multiple platforms in their respective files. Signed-off-by: Nikhil Badola --- arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 9 --------- include/linux/usb/xhci-fsl.h | 7 +++++++ 2 files changed, 7 insertions(+), 9 deletions(-) diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h index e759b52..d34044a 100644 --- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h @@ -397,13 +397,4 @@ struct ccsr_cci400 { u8 res_e004[0x10000 - 0xe004]; }; -/* USB-XHCI */ -#define FSL_XHCI_BASE 0x3100000 -#define FSL_OCP1_SCP_BASE 0x4a084c00 -#define FSL_OTG_WRAPPER_BASE 0x4A020000 - -#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_LS102XA_XHCI_USB1_ADDR -#define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0 -#define FSL_USB_XHCI_ADDR {CONFIG_SYS_FSL_XHCI_USB1_ADDR, \ - CONFIG_SYS_FSL_XHCI_USB2_ADDR} #endif /* __ASM_ARCH_LS102XA_IMMAP_H_ */ diff --git a/include/linux/usb/xhci-fsl.h b/include/linux/usb/xhci-fsl.h index 8eaab2c..b07bf19 100644 --- a/include/linux/usb/xhci-fsl.h +++ b/include/linux/usb/xhci-fsl.h @@ -51,4 +51,11 @@ struct fsl_xhci { struct dwc3 *dwc3_reg; }; +#if defined(CONFIG_LS102XA) +#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_LS102XA_XHCI_USB1_ADDR +#define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0 +#endif + +#define FSL_USB_XHCI_ADDR {CONFIG_SYS_FSL_XHCI_USB1_ADDR, \ + CONFIG_SYS_FSL_XHCI_USB2_ADDR} #endif /* _ASM_ARCH_XHCI_FSL_H_ */ From 2f47324255e6c9d106310ed1a2198ffb24e4891e Mon Sep 17 00:00:00 2001 From: Nikhil Badola Date: Tue, 23 Jun 2015 09:18:20 +0530 Subject: [PATCH 12/27] include: usb: Map USB controller base addresses for LS2085A Map USB XHCI controller base addresses for LS2085A SOC Signed-off-by: Nikhil Badola --- include/linux/usb/xhci-fsl.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/linux/usb/xhci-fsl.h b/include/linux/usb/xhci-fsl.h index b07bf19..602a413 100644 --- a/include/linux/usb/xhci-fsl.h +++ b/include/linux/usb/xhci-fsl.h @@ -54,6 +54,9 @@ struct fsl_xhci { #if defined(CONFIG_LS102XA) #define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_LS102XA_XHCI_USB1_ADDR #define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0 +#elif defined(CONFIG_LS2085A) +#define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_LS2085A_XHCI_USB1_ADDR +#define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_LS2085A_XHCI_USB2_ADDR #endif #define FSL_USB_XHCI_ADDR {CONFIG_SYS_FSL_XHCI_USB1_ADDR, \ From f2226c0dbec2de90f92367f66af3a4cb20109ed3 Mon Sep 17 00:00:00 2001 From: Nikhil Badola Date: Wed, 24 Jun 2015 10:52:48 +0530 Subject: [PATCH 13/27] drivers: usb: fsl: Remove LS102XA immap inclusion Remove LS102XA immap header inclusion from xhci fsl driver. It removes redefinition warnings when built for platforms other than LS102XA Signed-off-by: Nikhil Badola --- drivers/usb/host/xhci-fsl.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c index 6781b94..6481e07 100644 --- a/drivers/usb/host/xhci-fsl.c +++ b/drivers/usb/host/xhci-fsl.c @@ -11,7 +11,6 @@ #include #include #include -#include #include #include #include From 01acd6abbdd5a5951f68d08c245550c720ea6ad8 Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Fri, 12 Jun 2015 19:56:58 +0200 Subject: [PATCH 14/27] usb: USB download gadget and functions config options coherent naming This introduces a coherent scheme for naming USB download gadget and functions config options. The download USB gadget config option is moved to CONFIG_USB_GADGET_DOWNLOAD for better consistency with other gadgets and each function's config option is moved to a CONFIG_USB_FUNCTION_ prefix. Signed-off-by: Paul Kocialkowski Tested-by: Lukasz Majewski Test HW: Odroid_XU3 (Exynos5422), trats (Exynos4210) --- README | 2 +- board/samsung/common/Makefile | 2 +- board/siemens/common/factoryset.c | 4 ++-- doc/README.android-fastboot | 2 +- drivers/dfu/Makefile | 2 +- drivers/usb/gadget/Makefile | 8 ++++---- include/configs/am335x_evm.h | 4 ++-- include/configs/am43xx_evm.h | 4 ++-- include/configs/bav335x.h | 6 +++--- include/configs/colibri_vf.h | 6 +++--- include/configs/dra7xx_evm.h | 4 ++-- include/configs/exynos4-common.h | 8 ++++---- include/configs/gw_ventana.h | 4 ++-- include/configs/mx6sabre_common.h | 4 ++-- include/configs/nitrogen6x.h | 4 ++-- include/configs/odroid_xu3.h | 8 ++++---- include/configs/omap3_beagle.h | 2 +- include/configs/s5p_goni.h | 8 ++++---- include/configs/siemens-am33x-common.h | 4 ++-- include/configs/socfpga_common.h | 6 +++--- include/configs/tbs2910.h | 4 ++-- include/configs/tegra-common-usb-gadget.h | 6 +++--- include/configs/warp.h | 6 +++--- include/configs/zynq-common.h | 6 +++--- 24 files changed, 57 insertions(+), 57 deletions(-) diff --git a/README b/README index b564640..c13a383 100644 --- a/README +++ b/README @@ -1671,7 +1671,7 @@ The following options need to be configured: key for the Replay Protection Memory Block partition in eMMC. - USB Device Firmware Update (DFU) class support: - CONFIG_DFU_FUNCTION + CONFIG_USB_FUNCTION_DFU This enables the USB portion of the DFU USB class CONFIG_CMD_DFU diff --git a/board/samsung/common/Makefile b/board/samsung/common/Makefile index 93347ef..5fb01ce 100644 --- a/board/samsung/common/Makefile +++ b/board/samsung/common/Makefile @@ -6,7 +6,7 @@ # obj-$(CONFIG_SOFT_I2C_MULTI_BUS) += multi_i2c.o -obj-$(CONFIG_USBDOWNLOAD_GADGET) += gadget.o +obj-$(CONFIG_USB_GADGET_DOWNLOAD) += gadget.o obj-$(CONFIG_MISC_COMMON) += misc.o ifndef CONFIG_SPL_BUILD diff --git a/board/siemens/common/factoryset.c b/board/siemens/common/factoryset.c index d81f548..6c869ed 100644 --- a/board/siemens/common/factoryset.c +++ b/board/siemens/common/factoryset.c @@ -144,7 +144,7 @@ int factoryset_read_eeprom(int i2c_addr) unsigned char eeprom_buf[0x3c00], hdr[4], buf[MAX_STRING_LENGTH]; unsigned char *cp, *cp1; -#if defined(CONFIG_DFU_FUNCTION) +#if defined(CONFIG_USB_FUNCTION_DFU) factory_dat.usb_vendor_id = CONFIG_G_DNL_VENDOR_NUM; factory_dat.usb_product_id = CONFIG_G_DNL_PRODUCT_NUM; #endif @@ -202,7 +202,7 @@ int factoryset_read_eeprom(int i2c_addr) cp1 += 3; } -#if defined(CONFIG_DFU_FUNCTION) +#if defined(CONFIG_USB_FUNCTION_DFU) /* read vid and pid for dfu mode */ if (0 <= get_factory_record_val(cp, size, (uchar *)"USBD1", (uchar *)"vid", buf, diff --git a/doc/README.android-fastboot b/doc/README.android-fastboot index 04411e9..c2a2418 100644 --- a/doc/README.android-fastboot +++ b/doc/README.android-fastboot @@ -33,7 +33,7 @@ Board specific The fastboot gadget relies on the USB download gadget, so the following options must be configured: -CONFIG_USBDOWNLOAD_GADGET +CONFIG_USB_GADGET_DOWNLOAD CONFIG_G_DNL_VENDOR_NUM CONFIG_G_DNL_PRODUCT_NUM CONFIG_G_DNL_MANUFACTURER diff --git a/drivers/dfu/Makefile b/drivers/dfu/Makefile index 5cc535e..cebea30 100644 --- a/drivers/dfu/Makefile +++ b/drivers/dfu/Makefile @@ -5,7 +5,7 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_DFU_FUNCTION) += dfu.o +obj-$(CONFIG_USB_FUNCTION_DFU) += dfu.o obj-$(CONFIG_DFU_MMC) += dfu_mmc.o obj-$(CONFIG_DFU_NAND) += dfu_nand.o obj-$(CONFIG_DFU_RAM) += dfu_ram.o diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile index 70bb550..46d7d94 100644 --- a/drivers/usb/gadget/Makefile +++ b/drivers/usb/gadget/Makefile @@ -15,10 +15,10 @@ obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG) += s3c_udc_otg.o obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG_PHY) += s3c_udc_otg_phy.o obj-$(CONFIG_USB_GADGET_FOTG210) += fotg210.o obj-$(CONFIG_CI_UDC) += ci_udc.o -obj-$(CONFIG_THOR_FUNCTION) += f_thor.o -obj-$(CONFIG_USBDOWNLOAD_GADGET) += g_dnl.o -obj-$(CONFIG_DFU_FUNCTION) += f_dfu.o -obj-$(CONFIG_USB_GADGET_MASS_STORAGE) += f_mass_storage.o +obj-$(CONFIG_USB_GADGET_DOWNLOAD) += g_dnl.o +obj-$(CONFIG_USB_FUNCTION_THOR) += f_thor.o +obj-$(CONFIG_USB_FUNCTION_DFU) += f_dfu.o +obj-$(CONFIG_USB_FUNCTION_MASS_STORAGE) += f_mass_storage.o obj-$(CONFIG_CMD_FASTBOOT) += f_fastboot.o endif ifdef CONFIG_USB_ETHER diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 035c156..7fd8cf7 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -287,7 +287,7 @@ #define CONFIG_MUSB_PIO_ONLY #define CONFIG_MUSB_DISABLE_BULK_COMBINE_SPLIT #define CONFIG_USB_GADGET -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_USB_GADGET_DUALSPEED #define CONFIG_USB_GADGET_VBUS_DRAW 2 #define CONFIG_MUSB_HOST @@ -344,7 +344,7 @@ /* USB Device Firmware Update support */ #ifndef CONFIG_SPL_BUILD -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_MMC #define CONFIG_CMD_DFU #define DFU_ALT_INFO_MMC \ diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index ccdfb9c..b43489d 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -128,7 +128,7 @@ #define CONFIG_USB_DWC3_GADGET #define CONFIG_USB_GADGET -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_USB_GADGET_VBUS_DRAW 2 #define CONFIG_G_DNL_MANUFACTURER "Texas Instruments" #define CONFIG_G_DNL_VENDOR_NUM 0x0403 @@ -138,7 +138,7 @@ #ifndef CONFIG_SPL_BUILD /* USB Device Firmware Update support */ -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_RAM #define CONFIG_CMD_DFU diff --git a/include/configs/bav335x.h b/include/configs/bav335x.h index 741fb05..b53c49e 100644 --- a/include/configs/bav335x.h +++ b/include/configs/bav335x.h @@ -444,7 +444,7 @@ DEFAULT_LINUX_BOOT_ENV \ #define CONFIG_MUSB_PIO_ONLY #define CONFIG_MUSB_DISABLE_BULK_COMBINE_SPLIT #define CONFIG_USB_GADGET -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_USB_GADGET_DUALSPEED #define CONFIG_USB_GADGET_VBUS_DRAW 2 #define CONFIG_MUSB_HOST @@ -472,7 +472,7 @@ DEFAULT_LINUX_BOOT_ENV \ #ifdef CONFIG_MUSB_GADGET #define CONFIG_CMD_USB_MASS_STORAGE -#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USB_FUNCTION_MASS_STORAGE /* USB TI's IDs */ #define CONFIG_G_DNL_VENDOR_NUM 0x0451 @@ -494,7 +494,7 @@ DEFAULT_LINUX_BOOT_ENV \ /* USB Device Firmware Update support */ #ifndef CONFIG_SPL_BUILD -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_MMC #define CONFIG_CMD_DFU #define DFU_ALT_INFO_MMC \ diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index f2f8e2e..ab8d293 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -257,16 +257,16 @@ #define CONFIG_G_DNL_PRODUCT_NUM CONFIG_TRDX_PID_COLIBRI_VF50 /* USB DFU */ -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_CMD_DFU -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_NAND #define CONFIG_DFU_MMC #define CONFIG_SYS_DFU_DATA_BUF_SIZE (1024 * 1024) /* USB Storage */ #define CONFIG_USB_STORAGE -#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USB_FUNCTION_MASS_STORAGE #define CONFIG_CMD_USB_MASS_STORAGE /* Enable SPI support */ diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index 0323c72..b969944 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -190,7 +190,7 @@ #define CONFIG_USB_DWC3_GADGET #define CONFIG_USB_GADGET -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_USB_GADGET_VBUS_DRAW 2 #define CONFIG_G_DNL_MANUFACTURER "Texas Instruments" #define CONFIG_G_DNL_VENDOR_NUM 0x0451 @@ -198,7 +198,7 @@ #define CONFIG_USB_GADGET_DUALSPEED /* USB Device Firmware Update support */ -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_RAM #define CONFIG_CMD_DFU diff --git a/include/configs/exynos4-common.h b/include/configs/exynos4-common.h index 08e2009..ec1f882 100644 --- a/include/configs/exynos4-common.h +++ b/include/configs/exynos4-common.h @@ -28,13 +28,13 @@ #define CONFIG_CMD_GPT /* USB Composite download gadget - g_dnl */ -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD /* TIZEN THOR downloader support */ #define CONFIG_CMD_THOR_DOWNLOAD -#define CONFIG_THOR_FUNCTION +#define CONFIG_USB_FUNCTION_THOR -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_MMC #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M #define DFU_DEFAULT_POLL_TIMEOUT 300 @@ -57,7 +57,7 @@ #define CONFIG_USB_GADGET_VBUS_DRAW 2 #define CONFIG_CMD_USB_MASS_STORAGE -#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USB_FUNCTION_MASS_STORAGE /* Common environment variables */ #define CONFIG_EXTRA_ENV_ITB \ diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 902ec2c..2cbd5e0 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -205,8 +205,8 @@ /* USB Mass Storage Gadget */ #define CONFIG_USB_GADGET #define CONFIG_CMD_USB_MASS_STORAGE -#define CONFIG_USB_GADGET_MASS_STORAGE -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_FUNCTION_MASS_STORAGE +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_USB_GADGET_VBUS_DRAW 2 /* Netchip IDs */ diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index 6c3c52e..47a37f4 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -217,8 +217,8 @@ #define CONFIG_USB_GADGET #define CONFIG_CMD_USB_MASS_STORAGE -#define CONFIG_USB_GADGET_MASS_STORAGE -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_FUNCTION_MASS_STORAGE +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_USB_GADGET_VBUS_DRAW 2 #define CONFIG_G_DNL_VENDOR_NUM 0x0525 diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 67a3c97..231da72 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -337,8 +337,8 @@ #define CONFIG_USB_GADGET #define CONFIG_CMD_USB_MASS_STORAGE -#define CONFIG_USB_GADGET_MASS_STORAGE -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_FUNCTION_MASS_STORAGE +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_USB_GADGET_VBUS_DRAW 2 /* Netchip IDs */ diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index cf17f3d..8d5c736 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -60,10 +60,10 @@ #define CONFIG_G_DNL_VENDOR_NUM 0x04E8 #define CONFIG_G_DNL_PRODUCT_NUM 0x6601 #define CONFIG_G_DNL_MANUFACTURER "Samsung" -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD /* DFU */ -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_MMC #define CONFIG_CMD_DFU #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M @@ -72,13 +72,13 @@ /* THOR */ #define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM #define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D -#define CONFIG_THOR_FUNCTION +#define CONFIG_USB_FUNCTION_THOR #define CONFIG_CMD_THOR_DOWNLOAD /* UMS */ #define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525 #define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5 -#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USB_FUNCTION_MASS_STORAGE #define CONFIG_CMD_USB_MASS_STORAGE /* FIXME: MUST BE REMOVED AFTER TMU IS TURNED ON */ diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index e574742..8ebb5bd 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -68,7 +68,7 @@ #define CONFIG_USB_ETHER_RNDIS #define CONFIG_USB_GADGET #define CONFIG_USB_GADGET_VBUS_DRAW 0 -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_G_DNL_VENDOR_NUM 0x0451 #define CONFIG_G_DNL_PRODUCT_NUM 0xd022 #define CONFIG_G_DNL_MANUFACTURER "TI" diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 7994ecf..235bba5 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -68,15 +68,15 @@ #define CONFIG_CMD_GPT /* USB Composite download gadget - g_dnl */ -#define CONFIG_USBDOWNLOAD_GADGET -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_GADGET_DOWNLOAD +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_MMC #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M #define DFU_DEFAULT_POLL_TIMEOUT 300 /* TIZEN THOR downloader support */ #define CONFIG_CMD_THOR_DOWNLOAD -#define CONFIG_THOR_FUNCTION +#define CONFIG_USB_FUNCTION_THOR /* USB Samsung's IDs */ #define CONFIG_G_DNL_VENDOR_NUM 0x04E8 @@ -275,7 +275,7 @@ #define CONFIG_USB_GADGET_DUALSPEED #define CONFIG_USB_GADGET_VBUS_DRAW 2 #define CONFIG_CMD_USB_MASS_STORAGE -#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USB_FUNCTION_MASS_STORAGE #define CONFIG_OF_LIBFDT diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index e5fd147..f33f9b4 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -249,7 +249,7 @@ #endif /* CONFIG_MUSB_GADGET */ #define CONFIG_USB_GADGET -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD /* USB DRACO ID as default */ #define CONFIG_USBD_HS @@ -258,7 +258,7 @@ #define CONFIG_G_DNL_MANUFACTURER "Siemens AG" /* USB Device Firmware Update support */ -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_NAND #define CONFIG_CMD_DFU #define CONFIG_SYS_DFU_DATA_BUF_SIZE (1 << 20) diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 4c3366a..e8473b8 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -243,10 +243,10 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_USB_GADGET_VBUS_DRAW 2 /* USB Composite download gadget - g_dnl */ -#define CONFIG_USBDOWNLOAD_GADGET -#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USB_GADGET_DOWNLOAD +#define CONFIG_USB_FUNCTION_MASS_STORAGE -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_MMC #define CONFIG_SYS_DFU_DATA_BUF_SIZE (32 * 1024 * 1024) #define DFU_DEFAULT_POLL_TIMEOUT 300 diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index 42e5821..397c95c 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -133,10 +133,10 @@ #define CONFIG_CI_UDC #define CONFIG_USBD_HS #define CONFIG_USB_GADGET -#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USB_FUNCTION_MASS_STORAGE #define CONFIG_USB_GADGET_DUALSPEED #define CONFIG_USB_GADGET_VBUS_DRAW 0 -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_G_DNL_VENDOR_NUM 0x0525 #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 #define CONFIG_G_DNL_MANUFACTURER "TBS" diff --git a/include/configs/tegra-common-usb-gadget.h b/include/configs/tegra-common-usb-gadget.h index 287460c..d70a4e7 100644 --- a/include/configs/tegra-common-usb-gadget.h +++ b/include/configs/tegra-common-usb-gadget.h @@ -18,12 +18,12 @@ #define CONFIG_G_DNL_VENDOR_NUM 0x0955 #define CONFIG_G_DNL_PRODUCT_NUM 0x701A #define CONFIG_G_DNL_MANUFACTURER "NVIDIA" -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_DOWNLOAD /* USB mass storage protocol */ -#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USB_FUNCTION_MASS_STORAGE #define CONFIG_CMD_USB_MASS_STORAGE /* DFU protocol */ -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_SYS_DFU_DATA_BUF_SIZE (1 * 1024 * 1024) #define CONFIG_CMD_DFU #ifdef CONFIG_MMC diff --git a/include/configs/warp.h b/include/configs/warp.h index 48e2058..5a9bb33 100644 --- a/include/configs/warp.h +++ b/include/configs/warp.h @@ -80,8 +80,8 @@ #define CONFIG_USB_GADGET #define CONFIG_CMD_USB_MASS_STORAGE -#define CONFIG_USB_GADGET_MASS_STORAGE -#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_FUNCTION_MASS_STORAGE +#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_USB_GADGET_VBUS_DRAW 2 #define CONFIG_G_DNL_VENDOR_NUM 0x0525 @@ -89,7 +89,7 @@ #define CONFIG_G_DNL_MANUFACTURER "FSL" #define CONFIG_CMD_DFU -#define CONFIG_DFU_FUNCTION +#define CONFIG_USB_FUNCTION_DFU #define CONFIG_DFU_MMC #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M #define DFU_DEFAULT_POLL_TIMEOUT 300 diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 5526214..98bebd0 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -110,10 +110,10 @@ # define CONFIG_CI_UDC /* ChipIdea CI13xxx UDC */ # define CONFIG_USB_GADGET # define CONFIG_USB_GADGET_DUALSPEED -# define CONFIG_USBDOWNLOAD_GADGET +# define CONFIG_USB_GADGET_DOWNLOAD # define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000 # define DFU_DEFAULT_POLL_TIMEOUT 300 -# define CONFIG_DFU_FUNCTION +# define CONFIG_USB_FUNCTION_DFU # define CONFIG_DFU_RAM # define CONFIG_USB_GADGET_VBUS_DRAW 2 # define CONFIG_G_DNL_VENDOR_NUM 0x03FD @@ -123,7 +123,7 @@ # define CONFIG_USB_CABLE_CHECK # define CONFIG_CMD_DFU # define CONFIG_CMD_THOR_DOWNLOAD -# define CONFIG_THOR_FUNCTION +# define CONFIG_USB_FUNCTION_THOR # define DFU_ALT_INFO_RAM \ "dfu_ram_info=" \ "set dfu_alt_info " \ From 17da3c0c8cad2a40903c078d178cd663d73ccc7c Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Fri, 12 Jun 2015 19:56:59 +0200 Subject: [PATCH 15/27] usb: Fastboot function config for better consistency with other functions USB download gadget functions such as thor and dfu have a separate config option for the USB gadget part of the code, independent from the command part. This switches the fastboot USB gadget to the same scheme, for better consistency. Signed-off-by: Paul Kocialkowski Tested-by: Lukasz Majewski Test HW: Odroid_XU3 (Exynos5422), trats (Exynos4210) --- README | 3 +++ arch/arm/cpu/armv7/omap-common/boot-common.c | 2 +- doc/README.android-fastboot | 4 ++-- drivers/usb/gadget/Makefile | 2 +- include/configs/am335x_evm.h | 1 + include/configs/bav335x.h | 1 + include/configs/dra7xx_evm.h | 1 + include/configs/nitrogen6x.h | 1 + include/configs/omap3_beagle.h | 1 + 9 files changed, 12 insertions(+), 4 deletions(-) diff --git a/README b/README index c13a383..1e04cf8 100644 --- a/README +++ b/README @@ -1716,6 +1716,9 @@ The following options need to be configured: sending again an USB request to the device. - USB Device Android Fastboot support: + CONFIG_USB_FUNCTION_FASTBOOT + This enables the USB part of the fastboot gadget + CONFIG_CMD_FASTBOOT This enables the command "fastboot" which enables the Android fastboot mode for the platform's USB device. Fastboot is a USB diff --git a/arch/arm/cpu/armv7/omap-common/boot-common.c b/arch/arm/cpu/armv7/omap-common/boot-common.c index bbc6bed..7fc0a56 100644 --- a/arch/arm/cpu/armv7/omap-common/boot-common.c +++ b/arch/arm/cpu/armv7/omap-common/boot-common.c @@ -163,7 +163,7 @@ void arch_preboot_os(void) } #endif -#if defined(CONFIG_CMD_FASTBOOT) && !defined(CONFIG_ENV_IS_NOWHERE) +#if defined(CONFIG_USB_FUNCTION_FASTBOOT) && !defined(CONFIG_ENV_IS_NOWHERE) int fb_set_reboot_flag(void) { printf("Setting reboot to fastboot flag ...\n"); diff --git a/doc/README.android-fastboot b/doc/README.android-fastboot index c2a2418..92f2897 100644 --- a/doc/README.android-fastboot +++ b/doc/README.android-fastboot @@ -42,8 +42,8 @@ NOTE: The CONFIG_G_DNL_VENDOR_NUM must be one of the numbers supported by the fastboot client. The list of vendor IDs supported can be found in the fastboot client source code (fastboot.c) mentioned above. -The fastboot function is enabled by defining CONFIG_CMD_FASTBOOT and -CONFIG_ANDROID_BOOT_IMAGE. +The fastboot function is enabled by defining CONFIG_USB_FUNCTION_FASTBOOT, +CONFIG_CMD_FASTBOOT and CONFIG_ANDROID_BOOT_IMAGE. The fastboot protocol requires a large memory buffer for downloads. This buffer should be as large as possible for a platform. The location of the diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile index 46d7d94..4e15323 100644 --- a/drivers/usb/gadget/Makefile +++ b/drivers/usb/gadget/Makefile @@ -19,7 +19,7 @@ obj-$(CONFIG_USB_GADGET_DOWNLOAD) += g_dnl.o obj-$(CONFIG_USB_FUNCTION_THOR) += f_thor.o obj-$(CONFIG_USB_FUNCTION_DFU) += f_dfu.o obj-$(CONFIG_USB_FUNCTION_MASS_STORAGE) += f_mass_storage.o -obj-$(CONFIG_CMD_FASTBOOT) += f_fastboot.o +obj-$(CONFIG_USB_FUNCTION_FASTBOOT) += f_fastboot.o endif ifdef CONFIG_USB_ETHER obj-y += ether.o diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 7fd8cf7..abcdfda 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -298,6 +298,7 @@ #ifndef CONFIG_SPL_USBETH_SUPPORT /* Fastboot */ +#define CONFIG_USB_FUNCTION_FASTBOOT #define CONFIG_CMD_FASTBOOT #define CONFIG_ANDROID_BOOT_IMAGE #define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR diff --git a/include/configs/bav335x.h b/include/configs/bav335x.h index b53c49e..31b75f2 100644 --- a/include/configs/bav335x.h +++ b/include/configs/bav335x.h @@ -455,6 +455,7 @@ DEFAULT_LINUX_BOOT_ENV \ #ifndef CONFIG_SPL_USBETH_SUPPORT /* Fastboot */ +#define CONFIG_USB_FUNCTION_FASTBOOT #define CONFIG_CMD_FASTBOOT #define CONFIG_ANDROID_BOOT_IMAGE #define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index b969944..62330bf 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -89,6 +89,7 @@ DFU_ALT_INFO_RAM /* Fastboot */ +#define CONFIG_USB_FUNCTION_FASTBOOT #define CONFIG_CMD_FASTBOOT #define CONFIG_ANDROID_BOOT_IMAGE #define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 231da72..47239b1 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -346,6 +346,7 @@ #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 #define CONFIG_G_DNL_MANUFACTURER "Boundary" +#define CONFIG_USB_FUNCTION_FASTBOOT #define CONFIG_CMD_FASTBOOT #define CONFIG_ANDROID_BOOT_IMAGE #define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 8ebb5bd..59c780e 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -72,6 +72,7 @@ #define CONFIG_G_DNL_VENDOR_NUM 0x0451 #define CONFIG_G_DNL_PRODUCT_NUM 0xd022 #define CONFIG_G_DNL_MANUFACTURER "TI" +#define CONFIG_USB_FUNCTION_FASTBOOT #define CONFIG_CMD_FASTBOOT #define CONFIG_ANDROID_BOOT_IMAGE #define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR From 8d2f0039f00f6a07298545ec2b913ef9f5f5ce25 Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Fri, 12 Jun 2015 19:57:00 +0200 Subject: [PATCH 16/27] usb: board_usb_init and board_usb_cleanup calls in the fastboot command Each USB download function command calls board_usb_init before registering the USB gadget and board_usb_cleanup after de-registering it. On devices currently using fasboot, musb-new is usually initialized earlier, but some other boards might need the board_usb_init call to properly initialize musb-new. This requires adding an argument (the USB controller index) to the fastboot command, as it is currently done with other USB download gadget functions. Signed-off-by: Paul Kocialkowski Tested-by: Lukasz Majewski Test HW: Odroid_XU3 (Exynos5422), trats (Exynos4210) --- common/cmd_fastboot.c | 31 +++++++++++++++++++++++++------ include/configs/ti_omap5_common.h | 2 +- 2 files changed, 26 insertions(+), 7 deletions(-) diff --git a/common/cmd_fastboot.c b/common/cmd_fastboot.c index d52ccfb..86fbddf 100644 --- a/common/cmd_fastboot.c +++ b/common/cmd_fastboot.c @@ -10,11 +10,26 @@ #include #include #include +#include static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) { + int controller_index; + char *usb_controller; int ret; + if (argc < 2) + return CMD_RET_USAGE; + + usb_controller = argv[1]; + controller_index = simple_strtoul(usb_controller, NULL, 0); + + ret = board_usb_init(controller_index, USB_INIT_DEVICE); + if (ret) { + error("USB init failed: %d", ret); + return CMD_RET_FAILURE; + } + g_dnl_clear_detach(); ret = g_dnl_register("usb_dnl_fastboot"); if (ret) @@ -23,9 +38,8 @@ static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) if (!g_dnl_board_usb_cable_connected()) { puts("\rUSB cable not detected.\n" \ "Command exit.\n"); - g_dnl_unregister(); - g_dnl_clear_detach(); - return CMD_RET_FAILURE; + ret = CMD_RET_FAILURE; + goto exit; } while (1) { @@ -36,14 +50,19 @@ static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) usb_gadget_handle_interrupts(0); } + ret = CMD_RET_SUCCESS; + +exit: g_dnl_unregister(); g_dnl_clear_detach(); - return CMD_RET_SUCCESS; + board_usb_cleanup(controller_index, USB_INIT_DEVICE); + + return ret; } U_BOOT_CMD( - fastboot, 1, 0, do_fastboot, + fastboot, 2, 1, do_fastboot, "use USB Fastboot protocol", - "\n" + "\n" " - run as a fastboot usb device" ); diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index f3e5a75..4179a57 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -135,7 +135,7 @@ "if test ${dofastboot} -eq 1; then " \ "echo Boot fastboot requested, resetting dofastboot ...;" \ "setenv dofastboot 0; saveenv;" \ - "echo Booting into fastboot ...; fastboot;" \ + "echo Booting into fastboot ...; fastboot 0;" \ "fi;" \ "run findfdt; " \ "run mmcboot;" \ From 99fc2221a059b2571aedf6ff27d7d17dac2b0994 Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Fri, 12 Jun 2015 19:57:01 +0200 Subject: [PATCH 17/27] usb: gadget: Weak board_usb_init/cleanup definitions in USB download gadget code Weak versions of board_usb_init and board_usb_cleanup are defined in common USB host code, but it is also used for USB device gadgets, so we also need a weak definition of it when there is no USB host enabled. Both weak definitions do not conflict. Signed-off-by: Paul Kocialkowski Tested-by: Lukasz Majewski Test HW: Odroid_XU3 (Exynos5422), trats (Exynos4210) --- drivers/usb/gadget/g_dnl.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/usb/gadget/g_dnl.c b/drivers/usb/gadget/g_dnl.c index ee52a29..ad89a0d 100644 --- a/drivers/usb/gadget/g_dnl.c +++ b/drivers/usb/gadget/g_dnl.c @@ -12,6 +12,7 @@ #include #include +#include #include #include @@ -148,6 +149,18 @@ static int g_dnl_config_register(struct usb_composite_dev *cdev) } __weak +int board_usb_init(int index, enum usb_init_type init) +{ + return 0; +} + +__weak +int board_usb_cleanup(int index, enum usb_init_type init) +{ + return 0; +} + +__weak int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name) { return 0; From eca76b7429cedb600d724f6f1655bc43ede811a8 Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Sun, 24 May 2015 11:41:04 +0200 Subject: [PATCH 18/27] fastboot: Dynamic controller index for usb_gadget_handle_interrupts Since we're now using a dynamic controller index for fastboot too, usb_gadget_handle_interrupts should be using it instead of 0 (despite the fact that it's currently not being used at all in the musb-new implementation). Signed-off-by: Paul Kocialkowski --- common/cmd_fastboot.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/cmd_fastboot.c b/common/cmd_fastboot.c index 86fbddf..b9d1c8c 100644 --- a/common/cmd_fastboot.c +++ b/common/cmd_fastboot.c @@ -47,7 +47,7 @@ static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) break; if (ctrlc()) break; - usb_gadget_handle_interrupts(0); + usb_gadget_handle_interrupts(controller_index); } ret = CMD_RET_SUCCESS; From 94b385fa236c85b00ee0bceced05aad2550c2208 Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Sat, 4 Jul 2015 16:46:15 +0200 Subject: [PATCH 19/27] usb: gadget: fastboot: Request status and length check in rx handler This avoids handling requests that have an error status or no data. In particular, this avoids showing unnecessary error messages when the USB gadget gets disconnected (e.g. with fastboot continue) and the fastboot USB gadget driver sends an error back to the host (that has disconnected already). Signed-off-by: Paul Kocialkowski --- drivers/usb/gadget/f_fastboot.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c index 206b6d1..b9a9099 100644 --- a/drivers/usb/gadget/f_fastboot.c +++ b/drivers/usb/gadget/f_fastboot.c @@ -635,6 +635,9 @@ static void rx_handler_command(struct usb_ep *ep, struct usb_request *req) void (*func_cb)(struct usb_ep *ep, struct usb_request *req) = NULL; int i; + if (req->status != 0 || req->length == 0) + return; + for (i = 0; i < ARRAY_SIZE(cmd_dispatch_info); i++) { if (!strcmp_l1(cmd_dispatch_info[i].cmd, cmdbuf)) { func_cb = cmd_dispatch_info[i].cb; @@ -656,9 +659,7 @@ static void rx_handler_command(struct usb_ep *ep, struct usb_request *req) } } - if (req->status == 0) { - *cmdbuf = '\0'; - req->actual = 0; - usb_ep_queue(ep, req, 0); - } + *cmdbuf = '\0'; + req->actual = 0; + usb_ep_queue(ep, req, 0); } From bc9071c9f318aa69c815927b3828096d1976de1b Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Sat, 4 Jul 2015 16:46:16 +0200 Subject: [PATCH 20/27] usb: gadget: fastboot: Dequeue the previous IN request for the current request Recent versions of the fastboot tool will query the partition type before doing an operation on a partition (such as erase, flash, etc). It will then submit the operation as soon as the response for the partition type is received. Usually, the MUSB controller will see that the partition type request return status was read by the host at the very same time as the actual operation request is submitted by the host. However, the operation will be read first (int_rx is handled first in musb_interrupt) and after it is completed, the fastboot USB gadget driver will send another return status. Hence, this happens before the musb gadget framework has had a chance to handle the previous acknowledgement that the host read the return status and dequeue the request. The host will then usually empty the FIFO by the time musb_interrupt gets around handling the return status acknowledgement (for the previous request, this is still on the same musb_interrupt call), so no other interrupt is generated and the most recent return status acknowledgement remains unaccounted for. It will then be used as a response for the next command, and the proper response for it will be delayed to the next command, and so on. Dequeuing the previous IN request in the fastboot code ensures that no previous return status remains. It is acceptable to do it since there is no callback to it anyways. Signed-off-by: Paul Kocialkowski --- drivers/usb/gadget/f_fastboot.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c index b9a9099..60c846d 100644 --- a/drivers/usb/gadget/f_fastboot.c +++ b/drivers/usb/gadget/f_fastboot.c @@ -311,6 +311,9 @@ static int fastboot_tx_write(const char *buffer, unsigned int buffer_size) memcpy(in_req->buf, buffer, buffer_size); in_req->length = buffer_size; + + usb_ep_dequeue(fastboot_func->in_ep, in_req); + ret = usb_ep_queue(fastboot_func->in_ep, in_req, 0); if (ret) printf("Error %d on queue\n", ret); From 05a950cf5947d33367d8060fca165adabb0cd970 Mon Sep 17 00:00:00 2001 From: Steve Rae Date: Thu, 9 Jul 2015 14:26:38 -0700 Subject: [PATCH 21/27] g_dnl: add missing declaration Signed-off-by: Steve Rae Tested-by: Lukasz Majewski Test HW: Exynos 4210 (trats), Exynos 5422 (Odroid XU3) --- include/g_dnl.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/g_dnl.h b/include/g_dnl.h index 4eeb5e4..ba49f1f 100644 --- a/include/g_dnl.h +++ b/include/g_dnl.h @@ -34,6 +34,7 @@ struct g_dnl_bind_callback { }; int g_dnl_bind_fixup(struct usb_device_descriptor *, const char *); +int g_dnl_get_board_bcd_device_number(int gcnum); int g_dnl_board_usb_cable_connected(void); int g_dnl_register(const char *s); void g_dnl_unregister(void); From 854cbd2977561f8572c7ab07b95ee90226451185 Mon Sep 17 00:00:00 2001 From: Jiandong Zheng Date: Thu, 9 Jul 2015 14:26:39 -0700 Subject: [PATCH 22/27] usb: gadget: bcm_udc_otg files Add the required files for the Broadcom UDC OTG interface. Signed-off-by: Jiandong Zheng Signed-off-by: Steve Rae --- arch/arm/include/asm/arch-bcm281xx/sysmap.h | 7 ++++ drivers/usb/gadget/bcm_udc_otg.h | 22 +++++++++++++ drivers/usb/gadget/bcm_udc_otg_phy.c | 51 +++++++++++++++++++++++++++++ 3 files changed, 80 insertions(+) create mode 100644 drivers/usb/gadget/bcm_udc_otg.h create mode 100644 drivers/usb/gadget/bcm_udc_otg_phy.c diff --git a/arch/arm/include/asm/arch-bcm281xx/sysmap.h b/arch/arm/include/asm/arch-bcm281xx/sysmap.h index 93ebf34..dbcc88c 100644 --- a/arch/arm/include/asm/arch-bcm281xx/sysmap.h +++ b/arch/arm/include/asm/arch-bcm281xx/sysmap.h @@ -27,4 +27,11 @@ #define SECWD2_BASE_ADDR 0x35002f40 #define TIMER_BASE_ADDR 0x3e00d000 +#define HSOTG_DCTL_OFFSET 0x00000804 +#define HSOTG_DCTL_SFTDISCON_MASK 0x00000002 + +#define HSOTG_CTRL_PHY_P1CTL_OFFSET 0x00000008 +#define HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK 0x00000002 +#define HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK 0x00000001 + #endif diff --git a/drivers/usb/gadget/bcm_udc_otg.h b/drivers/usb/gadget/bcm_udc_otg.h new file mode 100644 index 0000000..d47aefa --- /dev/null +++ b/drivers/usb/gadget/bcm_udc_otg.h @@ -0,0 +1,22 @@ +/* + * Copyright 2015 Broadcom Corporation. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __BCM_UDC_OTG_H +#define __BCM_UDC_OTG_H + +#include + +static inline void wfld_set(uintptr_t addr, uint32_t fld_val, uint32_t fld_mask) +{ + writel(((readl(addr) & ~(fld_mask)) | (fld_val)), (addr)); +} + +static inline void wfld_clear(uintptr_t addr, uint32_t fld_mask) +{ + writel((readl(addr) & ~(fld_mask)), (addr)); +} + +#endif diff --git a/drivers/usb/gadget/bcm_udc_otg_phy.c b/drivers/usb/gadget/bcm_udc_otg_phy.c new file mode 100644 index 0000000..f8690b0 --- /dev/null +++ b/drivers/usb/gadget/bcm_udc_otg_phy.c @@ -0,0 +1,51 @@ +/* + * Copyright 2015 Broadcom Corporation. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +#include +#include "bcm_udc_otg.h" + +void otg_phy_init(struct s3c_udc *dev) +{ + /* set Phy to driving mode */ + wfld_clear(HSOTG_CTRL_BASE_ADDR + HSOTG_CTRL_PHY_P1CTL_OFFSET, + HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK); + + udelay(100); + + /* clear Soft Disconnect */ + wfld_clear(HSOTG_BASE_ADDR + HSOTG_DCTL_OFFSET, + HSOTG_DCTL_SFTDISCON_MASK); + + /* invoke Reset (active low) */ + wfld_clear(HSOTG_CTRL_BASE_ADDR + HSOTG_CTRL_PHY_P1CTL_OFFSET, + HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK); + + /* Reset needs to be asserted for 2ms */ + udelay(2000); + + /* release Reset */ + wfld_set(HSOTG_CTRL_BASE_ADDR + HSOTG_CTRL_PHY_P1CTL_OFFSET, + HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK, + HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK); +} + +void otg_phy_off(struct s3c_udc *dev) +{ + /* Soft Disconnect */ + wfld_set(HSOTG_BASE_ADDR + HSOTG_DCTL_OFFSET, + HSOTG_DCTL_SFTDISCON_MASK, + HSOTG_DCTL_SFTDISCON_MASK); + + /* set Phy to non-driving (reset) mode */ + wfld_set(HSOTG_CTRL_BASE_ADDR + HSOTG_CTRL_PHY_P1CTL_OFFSET, + HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK, + HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK); +} From d00bf7812181f53d6027610f35c1aa2018ce9fd3 Mon Sep 17 00:00:00 2001 From: Jiandong Zheng Date: Thu, 9 Jul 2015 14:26:40 -0700 Subject: [PATCH 23/27] implement Fastboot via USB OTG on bcm28155_ap boards Signed-off-by: Jiandong Zheng Signed-off-by: Steve Rae --- board/broadcom/bcm28155_ap/bcm28155_ap.c | 40 ++++++++++++++++++++++++++++++++ drivers/usb/gadget/Makefile | 1 + include/configs/bcm28155_ap.h | 20 ++++++++++++++++ 3 files changed, 61 insertions(+) diff --git a/board/broadcom/bcm28155_ap/bcm28155_ap.c b/board/broadcom/bcm28155_ap/bcm28155_ap.c index 940a1c2..20eb191 100644 --- a/board/broadcom/bcm28155_ap/bcm28155_ap.c +++ b/board/broadcom/bcm28155_ap/bcm28155_ap.c @@ -12,12 +12,20 @@ #include #include +#include +#include +#include + #define SECWATCHDOG_SDOGCR_OFFSET 0x00000000 #define SECWATCHDOG_SDOGCR_EN_SHIFT 27 #define SECWATCHDOG_SDOGCR_SRSTEN_SHIFT 26 #define SECWATCHDOG_SDOGCR_CLKS_SHIFT 20 #define SECWATCHDOG_SDOGCR_LD_SHIFT 0 +#ifndef CONFIG_USB_SERIALNO +#define CONFIG_USB_SERIALNO "1234567890" +#endif + DECLARE_GLOBAL_DATA_PTR; /* @@ -85,3 +93,35 @@ int board_mmc_init(bd_t *bis) return ret; } #endif + +#ifdef CONFIG_USB_GADGET +static struct s3c_plat_otg_data bcm_otg_data = { + .regs_otg = HSOTG_BASE_ADDR +}; + +int board_usb_init(int index, enum usb_init_type init) +{ + debug("%s: performing s3c_udc_probe\n", __func__); + return s3c_udc_probe(&bcm_otg_data); +} + +int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name) +{ + debug("%s\n", __func__); + if (!getenv("serial#")) + g_dnl_set_serialnumber(CONFIG_USB_SERIALNO); + return 0; +} + +int g_dnl_get_board_bcd_device_number(int gcnum) +{ + debug("%s\n", __func__); + return 1; +} + +int board_usb_cleanup(int index, enum usb_init_type init) +{ + debug("%s\n", __func__); + return 0; +} +#endif diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile index 4e15323..4c11a7e 100644 --- a/drivers/usb/gadget/Makefile +++ b/drivers/usb/gadget/Makefile @@ -11,6 +11,7 @@ obj-$(CONFIG_USB_ETHER) += epautoconf.o config.o usbstring.o # new USB gadget layer dependencies ifdef CONFIG_USB_GADGET obj-$(CONFIG_USB_GADGET_ATMEL_USBA) += atmel_usba_udc.o +obj-$(CONFIG_USB_GADGET_BCM_UDC_OTG_PHY) += bcm_udc_otg_phy.o obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG) += s3c_udc_otg.o obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG_PHY) += s3c_udc_otg_phy.o obj-$(CONFIG_USB_GADGET_FOTG210) += fotg210.o diff --git a/include/configs/bcm28155_ap.h b/include/configs/bcm28155_ap.h index 8f0f7f0..97e1508 100644 --- a/include/configs/bcm28155_ap.h +++ b/include/configs/bcm28155_ap.h @@ -108,6 +108,7 @@ * for example. */ #define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION /* version string, parser, etc */ #define CONFIG_VERSION_VARIABLE @@ -133,4 +134,23 @@ #define CONFIG_FAT_WRITE +/* Fastboot and USB OTG */ +#define CONFIG_USB_FUNCTION_FASTBOOT +#define CONFIG_CMD_FASTBOOT +#define CONFIG_FASTBOOT_FLASH +#define CONFIG_FASTBOOT_FLASH_MMC_DEV 0 +#define CONFIG_SYS_CACHELINE_SIZE 64 +#define CONFIG_USB_FASTBOOT_BUF_SIZE (CONFIG_SYS_SDRAM_SIZE - SZ_1M) +#define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_SDRAM_BASE +#define CONFIG_USB_GADGET +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_GADGET_VBUS_DRAW 0 +#define CONFIG_USB_GADGET_S3C_UDC_OTG +#define CONFIG_USB_GADGET_BCM_UDC_OTG_PHY +#define CONFIG_USB_GADGET_DOWNLOAD +#define CONFIG_USBID_ADDR 0x34052c46 +#define CONFIG_G_DNL_VENDOR_NUM 0x18d1 /* google */ +#define CONFIG_G_DNL_PRODUCT_NUM 0x0d02 /* nexus one */ +#define CONFIG_G_DNL_MANUFACTURER "Broadcom Corporation" + #endif /* __BCM28155_AP_H */ From a588d99ac19fe09818c6c874bec273012699d82a Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Mon, 20 Jul 2015 12:38:22 +0200 Subject: [PATCH 24/27] usb: CONFIG_USB_FASTBOOT prefix replacement for consistency FASTBOOT is defined both by CONFIG_USB_FUNCTION_FASTBOOT AND CONFIG_CMD_FASTBOOT, so it doesn't make much sense to have a CONFIG_USB_FASTBOOT prefix for fastboot-specific options, especially given that other config options for fastboot use the CONFIG_FASTBOOT prefix. This replaces the CONFIG_USB_FASTBOOT prefix with CONFIG_FASTBOOT, for consistency. Signed-off-by: Paul Kocialkowski --- README | 4 ++-- doc/README.android-fastboot | 4 ++-- drivers/usb/gadget/f_fastboot.c | 8 ++++---- include/configs/am335x_evm.h | 4 ++-- include/configs/bav335x.h | 4 ++-- include/configs/bcm28155_ap.h | 4 ++-- include/configs/dra7xx_evm.h | 4 ++-- include/configs/nitrogen6x.h | 4 ++-- include/configs/omap3_beagle.h | 4 ++-- 9 files changed, 20 insertions(+), 20 deletions(-) diff --git a/README b/README index 1e04cf8..4e0ff9f 100644 --- a/README +++ b/README @@ -1730,12 +1730,12 @@ The following options need to be configured: This enables support for booting images which use the Android image format header. - CONFIG_USB_FASTBOOT_BUF_ADDR + CONFIG_FASTBOOT_BUF_ADDR The fastboot protocol requires a large memory buffer for downloads. Define this to the starting RAM address to use for downloaded images. - CONFIG_USB_FASTBOOT_BUF_SIZE + CONFIG_FASTBOOT_BUF_SIZE The fastboot protocol requires a large memory buffer for downloads. This buffer should be as large as possible for a platform. Define this to the size available RAM for fastboot. diff --git a/doc/README.android-fastboot b/doc/README.android-fastboot index 92f2897..ce12bc5 100644 --- a/doc/README.android-fastboot +++ b/doc/README.android-fastboot @@ -47,8 +47,8 @@ CONFIG_CMD_FASTBOOT and CONFIG_ANDROID_BOOT_IMAGE. The fastboot protocol requires a large memory buffer for downloads. This buffer should be as large as possible for a platform. The location of the -buffer and size are set with CONFIG_USB_FASTBOOT_BUF_ADDR and -CONFIG_USB_FASTBOOT_BUF_SIZE. +buffer and size are set with CONFIG_FASTBOOT_BUF_ADDR and +CONFIG_FASTBOOT_BUF_SIZE. Fastboot partition aliases can also be defined for devices where GPT limitations prevent user-friendly partition names such as "boot", "system" diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c index 60c846d..ca01a01 100644 --- a/drivers/usb/gadget/f_fastboot.c +++ b/drivers/usb/gadget/f_fastboot.c @@ -380,7 +380,7 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req) !strcmp_l1("max-download-size", cmd)) { char str_num[12]; - sprintf(str_num, "0x%08x", CONFIG_USB_FASTBOOT_BUF_SIZE); + sprintf(str_num, "0x%08x", CONFIG_FASTBOOT_BUF_SIZE); strncat(response, str_num, chars_left); } else if (!strcmp_l1("serialno", cmd)) { s = getenv("serial#"); @@ -430,7 +430,7 @@ static void rx_handler_dl_image(struct usb_ep *ep, struct usb_request *req) if (buffer_size < transfer_size) transfer_size = buffer_size; - memcpy((void *)CONFIG_USB_FASTBOOT_BUF_ADDR + download_bytes, + memcpy((void *)CONFIG_FASTBOOT_BUF_ADDR + download_bytes, buffer, transfer_size); pre_dot_num = download_bytes / BYTES_PER_DOT; @@ -483,7 +483,7 @@ static void cb_download(struct usb_ep *ep, struct usb_request *req) if (0 == download_size) { sprintf(response, "FAILdata invalid size"); - } else if (download_size > CONFIG_USB_FASTBOOT_BUF_SIZE) { + } else if (download_size > CONFIG_FASTBOOT_BUF_SIZE) { download_size = 0; sprintf(response, "FAILdata too large"); } else { @@ -544,7 +544,7 @@ static void cb_flash(struct usb_ep *ep, struct usb_request *req) strcpy(response, "FAILno flash device defined"); #ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV - fb_mmc_flash_write(cmd, (void *)CONFIG_USB_FASTBOOT_BUF_ADDR, + fb_mmc_flash_write(cmd, (void *)CONFIG_FASTBOOT_BUF_ADDR, download_bytes, response); #endif fastboot_tx_write_str(response); diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index abcdfda..633391b 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -301,8 +301,8 @@ #define CONFIG_USB_FUNCTION_FASTBOOT #define CONFIG_CMD_FASTBOOT #define CONFIG_ANDROID_BOOT_IMAGE -#define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR -#define CONFIG_USB_FASTBOOT_BUF_SIZE 0x07000000 +#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000 /* To support eMMC booting */ #define CONFIG_STORAGE_EMMC diff --git a/include/configs/bav335x.h b/include/configs/bav335x.h index 31b75f2..fa32fa4 100644 --- a/include/configs/bav335x.h +++ b/include/configs/bav335x.h @@ -458,8 +458,8 @@ DEFAULT_LINUX_BOOT_ENV \ #define CONFIG_USB_FUNCTION_FASTBOOT #define CONFIG_CMD_FASTBOOT #define CONFIG_ANDROID_BOOT_IMAGE -#define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR -#define CONFIG_USB_FASTBOOT_BUF_SIZE 0x07000000 +#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000 /* To support eMMC booting */ #define CONFIG_STORAGE_EMMC diff --git a/include/configs/bcm28155_ap.h b/include/configs/bcm28155_ap.h index 97e1508..b7c5716 100644 --- a/include/configs/bcm28155_ap.h +++ b/include/configs/bcm28155_ap.h @@ -140,8 +140,8 @@ #define CONFIG_FASTBOOT_FLASH #define CONFIG_FASTBOOT_FLASH_MMC_DEV 0 #define CONFIG_SYS_CACHELINE_SIZE 64 -#define CONFIG_USB_FASTBOOT_BUF_SIZE (CONFIG_SYS_SDRAM_SIZE - SZ_1M) -#define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_SDRAM_BASE +#define CONFIG_FASTBOOT_BUF_SIZE (CONFIG_SYS_SDRAM_SIZE - SZ_1M) +#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_SDRAM_BASE #define CONFIG_USB_GADGET #define CONFIG_USB_GADGET_DUALSPEED #define CONFIG_USB_GADGET_VBUS_DRAW 0 diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index 62330bf..7499447 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -92,8 +92,8 @@ #define CONFIG_USB_FUNCTION_FASTBOOT #define CONFIG_CMD_FASTBOOT #define CONFIG_ANDROID_BOOT_IMAGE -#define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR -#define CONFIG_USB_FASTBOOT_BUF_SIZE 0x2F000000 +#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_FASTBOOT_BUF_SIZE 0x2F000000 #define CONFIG_FASTBOOT_FLASH #define CONFIG_FASTBOOT_FLASH_MMC_DEV 1 #endif diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 47239b1..3bb2e8f 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -349,7 +349,7 @@ #define CONFIG_USB_FUNCTION_FASTBOOT #define CONFIG_CMD_FASTBOOT #define CONFIG_ANDROID_BOOT_IMAGE -#define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR -#define CONFIG_USB_FASTBOOT_BUF_SIZE 0x07000000 +#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000 #endif /* __CONFIG_H */ diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 59c780e..804e307 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -75,8 +75,8 @@ #define CONFIG_USB_FUNCTION_FASTBOOT #define CONFIG_CMD_FASTBOOT #define CONFIG_ANDROID_BOOT_IMAGE -#define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR -#define CONFIG_USB_FASTBOOT_BUF_SIZE 0x07000000 +#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000 /* USB EHCI */ #define CONFIG_CMD_USB From 82b9143bf8e5b359f094b90a19feb50a87268e8a Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Wed, 22 Jul 2015 10:01:30 +0200 Subject: [PATCH 25/27] usb: ehci-marvell: Drop wrl accessor function This patch removes the wrl accessor function from the Marvell EHCI driver by replacing it with the writel function. Signed-off-by: Stefan Roese Cc: Marek Vasut --- drivers/usb/host/ehci-marvell.c | 26 ++++++++++++-------------- 1 file changed, 12 insertions(+), 14 deletions(-) diff --git a/drivers/usb/host/ehci-marvell.c b/drivers/usb/host/ehci-marvell.c index 03c489c..3a9f60f 100644 --- a/drivers/usb/host/ehci-marvell.c +++ b/drivers/usb/host/ehci-marvell.c @@ -21,9 +21,6 @@ DECLARE_GLOBAL_DATA_PTR; -#define rdl(off) readl(MVUSB0_BASE + (off)) -#define wrl(off, val) writel((val), MVUSB0_BASE + (off)) - #define USB_WINDOW_CTRL(i) (0x320 + ((i) << 4)) #define USB_WINDOW_BASE(i) (0x324 + ((i) << 4)) #define USB_TARGET_DRAM 0x0 @@ -48,20 +45,20 @@ static void usb_brg_adrdec_setup(void) dram = mvebu_mbus_dram_info(); for (i = 0; i < 4; i++) { - wrl(USB_WINDOW_CTRL(i), 0); - wrl(USB_WINDOW_BASE(i), 0); + writel(0, MVUSB0_BASE + USB_WINDOW_CTRL(i)); + writel(0, MVUSB0_BASE + USB_WINDOW_BASE(i)); } for (i = 0; i < dram->num_cs; i++) { const struct mbus_dram_window *cs = dram->cs + i; /* Write size, attributes and target id to control register */ - wrl(USB_WINDOW_CTRL(i), - ((cs->size - 1) & 0xffff0000) | (cs->mbus_attr << 8) | - (dram->mbus_dram_target_id << 4) | 1); + writel(((cs->size - 1) & 0xffff0000) | (cs->mbus_attr << 8) | + (dram->mbus_dram_target_id << 4) | 1, + MVUSB0_BASE + USB_WINDOW_CTRL(i)); /* Write base address to base register */ - wrl(USB_WINDOW_BASE(i), cs->base); + writel(cs->base, MVUSB0_BASE + USB_WINDOW_BASE(i)); } } #else @@ -95,13 +92,14 @@ static void usb_brg_adrdec_setup(void) size = gd->bd->bi_dram[i].size; base = gd->bd->bi_dram[i].start; if ((size) && (attrib)) - wrl(USB_WINDOW_CTRL(i), - MVCPU_WIN_CTRL_DATA(size, USB_TARGET_DRAM, - attrib, MVCPU_WIN_ENABLE)); + writel(MVCPU_WIN_CTRL_DATA(size, USB_TARGET_DRAM, + attrib, MVCPU_WIN_ENABLE), + MVUSB0_BASE + USB_WINDOW_CTRL(i)); else - wrl(USB_WINDOW_CTRL(i), MVCPU_WIN_DISABLE); + writel(MVCPU_WIN_DISABLE, + MVUSB0_BASE + USB_WINDOW_CTRL(i)); - wrl(USB_WINDOW_BASE(i), base); + writel(base, MVUSB0_BASE + USB_WINDOW_BASE(i)); } } #endif From 85a9ea314e36fc42656bc93c9e3d83d58b595d3e Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Wed, 22 Jul 2015 15:16:20 -0600 Subject: [PATCH 26/27] ci_udc: fix 64-bit compile warnings This is the same as f72d8320b605 "usb: ci_udc: fix warnings on 64-bit builds", but more. Signed-off-by: Stephen Warren --- drivers/usb/gadget/ci_udc.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/drivers/usb/gadget/ci_udc.c b/drivers/usb/gadget/ci_udc.c index aadff42..993be31 100644 --- a/drivers/usb/gadget/ci_udc.c +++ b/drivers/usb/gadget/ci_udc.c @@ -221,8 +221,8 @@ static void ci_flush_qtd(int ep_num) */ static void ci_flush_td(struct ept_queue_item *td) { - const uint32_t start = (uint32_t)td; - const uint32_t end = (uint32_t) td + ILIST_ENT_SZ; + const unsigned long start = (unsigned long)td; + const unsigned long end = (unsigned long)td + ILIST_ENT_SZ; flush_dcache_range(start, end); } @@ -249,8 +249,8 @@ static void ci_invalidate_qtd(int ep_num) */ static void ci_invalidate_td(struct ept_queue_item *td) { - const uint32_t start = (uint32_t)td; - const uint32_t end = start + ILIST_ENT_SZ; + const unsigned long start = (unsigned long)td; + const unsigned long end = start + ILIST_ENT_SZ; invalidate_dcache_range(start, end); } @@ -459,7 +459,7 @@ static void ci_ep_submit_next_request(struct ci_ep *ci_ep) if (len) { qtd = (struct ept_queue_item *) memalign(ILIST_ALIGN, ILIST_ENT_SZ); - dtd->next = (uint32_t)qtd; + dtd->next = (unsigned long)qtd; dtd = qtd; memset(dtd, 0, ILIST_ENT_SZ); } @@ -503,10 +503,10 @@ static void ci_ep_submit_next_request(struct ci_ep *ci_ep) ci_flush_qtd(num); - item = (struct ept_queue_item *)head->next; + item = (struct ept_queue_item *)(unsigned long)head->next; while (item->next != TERMINATE) { - ci_flush_td((struct ept_queue_item *)item->next); - item = (struct ept_queue_item *)item->next; + ci_flush_td((struct ept_queue_item *)(unsigned long)item->next); + item = (struct ept_queue_item *)(unsigned long)item->next; } DBG("ept%d %s queue len %x, req %p, buffer %p\n", @@ -594,7 +594,8 @@ static void handle_ep_complete(struct ci_ep *ci_ep) printf("EP%d/%s FAIL info=%x pg0=%x\n", num, in ? "in" : "out", item->info, item->page0); if (j != ci_req->dtd_count - 1) - next_td = (struct ept_queue_item *)item->next; + next_td = (struct ept_queue_item *)(unsigned long) + item->next; if (j != 0) free(item); } From 58d6d139c3e7bb923029e7ba18bfec7f420ead0f Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 24 Jul 2015 10:14:21 -0500 Subject: [PATCH 27/27] usb: ci_udc: fix request allocation when endpoints are disabled The ci_udc driver request allocation assumes that the endpoint descriptor pointer is set to retrieve the endpoint number, but that is only true when the endpoint is enabled. This results in a NULL ptr dereference which for me happens to return 0 value. This causes the EP0 request struct to be returned for other endpoints. Some gadget drivers like fastboot and USB MS work fine, but ethernet does not. Really, the ci_udc driver is the oddball here doing this EP0 special case handling Stephen added. All the other drivers alloc/free functions are pretty much the same with the only variation being the size of the private struct. This could all be consolidated to a common function. Signed-off-by: Rob Herring Cc: Marek Vasut Acked-by: Stephen Warren --- drivers/usb/gadget/ci_udc.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/usb/gadget/ci_udc.c b/drivers/usb/gadget/ci_udc.c index 993be31..3e8eb87 100644 --- a/drivers/usb/gadget/ci_udc.c +++ b/drivers/usb/gadget/ci_udc.c @@ -258,10 +258,12 @@ static struct usb_request * ci_ep_alloc_request(struct usb_ep *ep, unsigned int gfp_flags) { struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep); - int num; + int num = -1; struct ci_req *ci_req; - num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; + if (ci_ep->desc) + num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; + if (num == 0 && controller.ep0_req) return &controller.ep0_req->req; @@ -281,9 +283,11 @@ static void ci_ep_free_request(struct usb_ep *ep, struct usb_request *req) { struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep); struct ci_req *ci_req = container_of(req, struct ci_req, req); - int num; + int num = -1; + + if (ci_ep->desc) + num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; - num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; if (num == 0) { if (!controller.ep0_req) return;