Tested USB host functionality on DA830 EVM. Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com> Signed-off-by: Swaminathan S <swami.iyer@ti.com>master
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/*
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* da8xx.c - TI's DA8xx platform specific usb wrapper functions. |
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* |
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* Author: Ajay Kumar Gupta <ajay.gupta@ti.com> |
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* |
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* Based on drivers/usb/musb/davinci.c |
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* |
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* Copyright (C) 2009 Texas Instruments Incorporated |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License as published by |
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* the Free Software Foundation; either version 2 of the License, or |
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* (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
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*/ |
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#include <common.h> |
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#include "da8xx.h" |
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/* MUSB platform configuration */ |
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struct musb_config musb_cfg = { |
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(struct musb_regs *)DA8XX_USB_OTG_CORE_BASE, |
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DA8XX_USB_OTG_TIMEOUT, |
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0 |
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}; |
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/*
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* This function enables VBUS by driving the GPIO Bank4 Pin 15 high. |
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*/ |
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static void enable_vbus(void) |
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{ |
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u32 value; |
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/* configure GPIO bank4 pin 15 in output direction */ |
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value = readl(&davinci_gpio_bank45->dir); |
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writel((value & (~DA8XX_USB_VBUS_GPIO)), &davinci_gpio_bank45->dir); |
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/* set GPIO bank4 pin 15 high to drive VBUS */ |
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value = readl(&davinci_gpio_bank45->set_data); |
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writel((value | DA8XX_USB_VBUS_GPIO), &davinci_gpio_bank45->set_data); |
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} |
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/*
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* Enable the usb0 phy. This initialization procedure is explained in |
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* the DA8xx USB user guide document. |
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*/ |
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static u8 phy_on(void) |
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{ |
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u32 timeout; |
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u32 cfgchip2; |
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cfgchip2 = readl(&davinci_syscfg_regs->cfgchip2); |
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cfgchip2 &= ~(CFGCHIP2_RESET | CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN | |
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CFGCHIP2_OTGMODE | CFGCHIP2_REFFREQ); |
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cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN | CFGCHIP2_PHY_PLLON | |
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CFGCHIP2_REFFREQ_24MHZ; |
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writel(cfgchip2, &davinci_syscfg_regs->cfgchip2); |
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/* wait until the usb phy pll locks */ |
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timeout = musb_cfg.timeout; |
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while (timeout--) |
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if (readl(&davinci_syscfg_regs->cfgchip2) & CFGCHIP2_PHYCLKGD) |
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return 1; |
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/* USB phy was not turned on */ |
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return 0; |
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} |
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/*
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* Disable the usb phy |
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*/ |
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static void phy_off(void) |
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{ |
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u32 cfgchip2; |
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/*
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* Power down the on-chip PHY. |
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*/ |
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cfgchip2 = readl(&davinci_syscfg_regs->cfgchip2); |
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cfgchip2 &= ~CFGCHIP2_PHY_PLLON; |
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cfgchip2 |= CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN; |
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writel(cfgchip2, &davinci_syscfg_regs->cfgchip2); |
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} |
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/*
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* This function performs DA8xx platform specific initialization for usb0. |
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*/ |
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int musb_platform_init(void) |
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{ |
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u32 revision; |
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/* enable psc for usb2.0 */ |
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lpsc_on(33); |
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/* enable usb vbus */ |
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enable_vbus(); |
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/* reset the controller */ |
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writel(0x1, &da8xx_usb_regs->control); |
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udelay(5000); |
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/* start the on-chip usb phy and its pll */ |
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if (phy_on() == 0) |
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return -1; |
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/* Returns zero if e.g. not clocked */ |
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revision = readl(&da8xx_usb_regs->revision); |
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if (revision == 0) |
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return -1; |
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/* Disable all interrupts */ |
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writel((DA8XX_USB_USBINT_MASK | DA8XX_USB_TXINT_MASK | |
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DA8XX_USB_RXINT_MASK), &da8xx_usb_regs->intmsk_set); |
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return 0; |
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} |
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/*
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* This function performs DA8xx platform specific deinitialization for usb0. |
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*/ |
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void musb_platform_deinit(void) |
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{ |
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/* Turn of the phy */ |
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phy_off(); |
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/* flush any interrupts */ |
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writel((DA8XX_USB_USBINT_MASK | DA8XX_USB_TXINT_MASK | |
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DA8XX_USB_RXINT_MASK), &da8xx_usb_regs->intmsk_clr); |
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writel(0, &da8xx_usb_regs->eoi); |
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} |
@ -0,0 +1,103 @@ |
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/*
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* da8xx.h -- TI's DA8xx platform specific usb wrapper definitions. |
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* |
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* Author: Ajay Kumar Gupta <ajay.gupta@ti.com> |
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* |
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* Based on drivers/usb/musb/davinci.h |
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* |
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* Copyright (C) 2009 Texas Instruments Incorporated |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License as published by |
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* the Free Software Foundation; either version 2 of the License, or |
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* (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
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*/ |
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#ifndef __DA8XX_MUSB_H__ |
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#define __DA8XX_MUSB_H__ |
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#include <asm/arch/hardware.h> |
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#include <asm/arch/gpio_defs.h> |
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#include "musb_core.h" |
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/* Base address of da8xx usb0 wrapper */ |
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#define DA8XX_USB_OTG_BASE 0x01E00000 |
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/* Base address of da8xx musb core */ |
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#define DA8XX_USB_OTG_CORE_BASE (DA8XX_USB_OTG_BASE + 0x400) |
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/* Timeout for DA8xx usb module */ |
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#define DA8XX_USB_OTG_TIMEOUT 0x3FFFFFF |
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/*
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* DA8xx platform USB wrapper register overlay. |
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*/ |
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struct da8xx_usb_regs { |
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dv_reg revision; |
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dv_reg control; |
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dv_reg status; |
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dv_reg emulation; |
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dv_reg mode; |
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dv_reg autoreq; |
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dv_reg srpfixtime; |
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dv_reg teardown; |
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dv_reg intsrc; |
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dv_reg intsrc_set; |
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dv_reg intsrc_clr; |
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dv_reg intmsk; |
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dv_reg intmsk_set; |
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dv_reg intmsk_clr; |
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dv_reg intsrcmsk; |
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dv_reg eoi; |
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dv_reg intvector; |
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dv_reg grndis_size[4]; |
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}; |
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#define da8xx_usb_regs ((struct da8xx_usb_regs *)DA8XX_USB_OTG_BASE) |
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/* DA8XX interrupt bits definitions */ |
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#define DA8XX_USB_TX_ENDPTS_MASK 0x1f /* ep0 + 4 tx */ |
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#define DA8XX_USB_RX_ENDPTS_MASK 0x1e /* 4 rx */ |
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#define DA8XX_USB_TXINT_SHIFT 0 |
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#define DA8XX_USB_RXINT_SHIFT 8 |
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#define DA8XX_USB_USBINT_MASK 0x01ff0000 /* 8 Mentor, DRVVBUS */ |
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#define DA8XX_USB_TXINT_MASK \ |
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(DA8XX_USB_TX_ENDPTS_MASK << DA8XX_USB_TXINT_SHIFT) |
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#define DA8XX_USB_RXINT_MASK \ |
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(DA8XX_USB_RX_ENDPTS_MASK << DA8XX_USB_RXINT_SHIFT) |
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/* DA8xx CFGCHIP2 (USB 2.0 PHY Control) register bits */ |
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#define CFGCHIP2_PHYCLKGD (1 << 17) |
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#define CFGCHIP2_VBUSSENSE (1 << 16) |
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#define CFGCHIP2_RESET (1 << 15) |
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#define CFGCHIP2_OTGMODE (3 << 13) |
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#define CFGCHIP2_NO_OVERRIDE (0 << 13) |
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#define CFGCHIP2_FORCE_HOST (1 << 13) |
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#define CFGCHIP2_FORCE_DEVICE (2 << 13) |
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#define CFGCHIP2_FORCE_HOST_VBUS_LOW (3 << 13) |
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#define CFGCHIP2_USB1PHYCLKMUX (1 << 12) |
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#define CFGCHIP2_USB2PHYCLKMUX (1 << 11) |
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#define CFGCHIP2_PHYPWRDN (1 << 10) |
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#define CFGCHIP2_OTGPWRDN (1 << 9) |
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#define CFGCHIP2_DATPOL (1 << 8) |
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#define CFGCHIP2_USB1SUSPENDM (1 << 7) |
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#define CFGCHIP2_PHY_PLLON (1 << 6) /* override PLL suspend */ |
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#define CFGCHIP2_SESENDEN (1 << 5) /* Vsess_end comparator */ |
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#define CFGCHIP2_VBDTCTEN (1 << 4) /* Vbus comparator */ |
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#define CFGCHIP2_REFFREQ (0xf << 0) |
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#define CFGCHIP2_REFFREQ_12MHZ (1 << 0) |
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#define CFGCHIP2_REFFREQ_24MHZ (2 << 0) |
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#define CFGCHIP2_REFFREQ_48MHZ (3 << 0) |
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#define DA8XX_USB_VBUS_GPIO (1 << 15) |
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#endif /* __DA8XX_MUSB_H__ */ |
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