Add pin configuration and pinmux support for UniPhier PXs3 SoC. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>master
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/*
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* Copyright (C) 2017 Socionext Inc. |
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* Author: Masahiro Yamada <yamada.masahiro@socionext.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <dm/device.h> |
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#include <dm/pinctrl.h> |
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#include "pinctrl-uniphier.h" |
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static const unsigned emmc_pins[] = {31, 32, 33, 34, 35, 36, 37, 38}; |
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static const int emmc_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0}; |
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static const unsigned emmc_dat8_pins[] = {39, 40, 41, 42}; |
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static const int emmc_dat8_muxvals[] = {0, 0, 0, 0}; |
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static const unsigned ether_rgmii_pins[] = {52, 53, 54, 55, 56, 57, 58, 59, 60, |
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61, 62, 63, 64, 65, 66, 67}; |
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static const int ether_rgmii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
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0, 0, 0, 0}; |
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static const unsigned ether_rmii_pins[] = {52, 53, 54, 55, 56, 57, 58, 59, 61, |
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63, 64, 67}; |
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static const int ether_rmii_muxvals[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1}; |
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static const unsigned ether1_rgmii_pins[] = {68, 69, 70, 71, 72, 73, 74, 75, 76, |
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77, 78, 79, 80, 81, 82, 83}; |
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static const int ether1_rgmii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
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0, 0, 0, 0}; |
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static const unsigned ether1_rmii_pins[] = {68, 69, 70, 71, 72, 73, 74, 75, 77, |
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79, 80, 83}; |
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static const int ether1_rmii_muxvals[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1}; |
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static const unsigned i2c0_pins[] = {104, 105}; |
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static const int i2c0_muxvals[] = {0, 0}; |
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static const unsigned i2c1_pins[] = {106, 107}; |
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static const int i2c1_muxvals[] = {0, 0}; |
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static const unsigned i2c2_pins[] = {108, 109}; |
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static const int i2c2_muxvals[] = {0, 0}; |
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static const unsigned i2c3_pins[] = {110, 111}; |
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static const int i2c3_muxvals[] = {0, 0}; |
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static const unsigned nand_pins[] = {16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, |
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27, 28, 29, 30}; |
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static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; |
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static const unsigned sd_pins[] = {43, 44, 45, 46, 47, 48, 49, 50, 51}; |
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static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; |
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static const unsigned system_bus_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, |
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12, 13, 14}; |
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static const int system_bus_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
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0}; |
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static const unsigned system_bus_cs1_pins[] = {15}; |
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static const int system_bus_cs1_muxvals[] = {0}; |
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static const unsigned uart0_pins[] = {92, 93}; |
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static const int uart0_muxvals[] = {0, 0}; |
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static const unsigned uart1_pins[] = {94, 95}; |
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static const int uart1_muxvals[] = {0, 0}; |
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static const unsigned uart2_pins[] = {96, 97}; |
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static const int uart2_muxvals[] = {0, 0}; |
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static const unsigned uart3_pins[] = {98, 99}; |
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static const int uart3_muxvals[] = {0, 0}; |
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static const unsigned usb0_pins[] = {84, 85}; |
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static const int usb0_muxvals[] = {0, 0}; |
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static const unsigned usb1_pins[] = {86, 87}; |
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static const int usb1_muxvals[] = {0, 0}; |
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static const unsigned usb2_pins[] = {88, 89}; |
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static const int usb2_muxvals[] = {0, 0}; |
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static const unsigned usb3_pins[] = {90, 91}; |
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static const int usb3_muxvals[] = {0, 0}; |
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static const struct uniphier_pinctrl_group uniphier_pxs3_groups[] = { |
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UNIPHIER_PINCTRL_GROUP(emmc), |
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UNIPHIER_PINCTRL_GROUP(emmc_dat8), |
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UNIPHIER_PINCTRL_GROUP(ether_rgmii), |
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UNIPHIER_PINCTRL_GROUP(ether_rmii), |
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UNIPHIER_PINCTRL_GROUP(ether1_rgmii), |
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UNIPHIER_PINCTRL_GROUP(ether1_rmii), |
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UNIPHIER_PINCTRL_GROUP(i2c0), |
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UNIPHIER_PINCTRL_GROUP(i2c1), |
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UNIPHIER_PINCTRL_GROUP(i2c2), |
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UNIPHIER_PINCTRL_GROUP(i2c3), |
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UNIPHIER_PINCTRL_GROUP(nand), |
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UNIPHIER_PINCTRL_GROUP(sd), |
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UNIPHIER_PINCTRL_GROUP_SPL(system_bus), |
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UNIPHIER_PINCTRL_GROUP_SPL(system_bus_cs1), |
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UNIPHIER_PINCTRL_GROUP_SPL(uart0), |
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UNIPHIER_PINCTRL_GROUP_SPL(uart1), |
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UNIPHIER_PINCTRL_GROUP_SPL(uart2), |
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UNIPHIER_PINCTRL_GROUP_SPL(uart3), |
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UNIPHIER_PINCTRL_GROUP(usb0), |
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UNIPHIER_PINCTRL_GROUP(usb1), |
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UNIPHIER_PINCTRL_GROUP(usb2), |
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UNIPHIER_PINCTRL_GROUP(usb3), |
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}; |
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static const char * const uniphier_pxs3_functions[] = { |
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UNIPHIER_PINMUX_FUNCTION(emmc), |
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UNIPHIER_PINMUX_FUNCTION(ether_rgmii), |
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UNIPHIER_PINMUX_FUNCTION(ether_rmii), |
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UNIPHIER_PINMUX_FUNCTION(ether1_rgmii), |
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UNIPHIER_PINMUX_FUNCTION(ether1_rmii), |
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UNIPHIER_PINMUX_FUNCTION(i2c0), |
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UNIPHIER_PINMUX_FUNCTION(i2c1), |
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UNIPHIER_PINMUX_FUNCTION(i2c2), |
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UNIPHIER_PINMUX_FUNCTION(i2c3), |
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UNIPHIER_PINMUX_FUNCTION(nand), |
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UNIPHIER_PINMUX_FUNCTION(sd), |
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UNIPHIER_PINMUX_FUNCTION_SPL(system_bus), |
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UNIPHIER_PINMUX_FUNCTION_SPL(uart0), |
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UNIPHIER_PINMUX_FUNCTION_SPL(uart1), |
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UNIPHIER_PINMUX_FUNCTION_SPL(uart2), |
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UNIPHIER_PINMUX_FUNCTION_SPL(uart3), |
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UNIPHIER_PINMUX_FUNCTION(usb0), |
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UNIPHIER_PINMUX_FUNCTION(usb1), |
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UNIPHIER_PINMUX_FUNCTION(usb2), |
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UNIPHIER_PINMUX_FUNCTION(usb3), |
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}; |
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static struct uniphier_pinctrl_socdata uniphier_pxs3_pinctrl_socdata = { |
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.groups = uniphier_pxs3_groups, |
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.groups_count = ARRAY_SIZE(uniphier_pxs3_groups), |
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.functions = uniphier_pxs3_functions, |
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.functions_count = ARRAY_SIZE(uniphier_pxs3_functions), |
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.caps = UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL, |
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}; |
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static int uniphier_pxs3_pinctrl_probe(struct udevice *dev) |
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{ |
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return uniphier_pinctrl_probe(dev, &uniphier_pxs3_pinctrl_socdata); |
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} |
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static const struct udevice_id uniphier_pxs3_pinctrl_match[] = { |
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{ .compatible = "socionext,uniphier-pxs3-pinctrl" }, |
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{ /* sentinel */ } |
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}; |
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U_BOOT_DRIVER(uniphier_pxs3_pinctrl) = { |
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.name = "uniphier-pxs3-pinctrl", |
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.id = UCLASS_PINCTRL, |
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.of_match = of_match_ptr(uniphier_pxs3_pinctrl_match), |
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.probe = uniphier_pxs3_pinctrl_probe, |
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.priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv), |
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.ops = &uniphier_pinctrl_ops, |
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}; |
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