This patch adds a simple pmic driver for the mc34vr500 pmic which is used in conjunction with the fsl T1 and LS1 series SoC. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: York Sun <york.sun@nxp.com>master
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/*
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* Copyright 2016 Freescale Semiconductor, Inc. |
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* Hou Zhiqiang <Zhiqiang.Hou@freescale.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <errno.h> |
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#include <i2c.h> |
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#include <power/pmic.h> |
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#include <power/mc34vr500_pmic.h> |
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int power_mc34vr500_init(unsigned char bus) |
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{ |
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static const char name[] = "MC34VR500"; |
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struct pmic *p = pmic_alloc(); |
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if (!p) { |
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printf("%s: POWER allocation error!\n", __func__); |
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return -ENOMEM; |
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} |
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p->name = name; |
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p->interface = PMIC_I2C; |
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p->number_of_regs = MC34VR500_NUM_OF_REGS; |
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p->hw.i2c.addr = MC34VR500_I2C_ADDR; |
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p->hw.i2c.tx_num = 1; |
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p->bus = bus; |
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return 0; |
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} |
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/*
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* Copyright 2016 Freescale Semiconductor, Inc. |
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* Hou Zhiqiang <Zhiqiang.Hou@freescale.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#ifndef __MC34VR500_H_ |
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#define __MC34VR500_H_ |
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#include <power/pmic.h> |
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#define MC34VR500_I2C_ADDR 0x08 |
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/* Drivers name */ |
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#define MC34VR500_REGULATOR_DRIVER "mc34vr500_regulator" |
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/* Register map */ |
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enum { |
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MC34VR500_DEVICEID = 0x00, |
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MC34VR500_SILICONREVID = 0x03, |
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MC34VR500_FABID, |
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MC34VR500_INTSTAT0, |
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MC34VR500_INTMASK0, |
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MC34VR500_INTSENSE0, |
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MC34VR500_INTSTAT1, |
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MC34VR500_INTMASK1, |
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MC34VR500_INTSENSE1, |
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MC34VR500_INTSTAT4 = 0x11, |
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MC34VR500_INTMASK4, |
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MC34VR500_INTSENSE4, |
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MC34VR500_PWRCTL = 0x1B, |
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MC34VR500_SW1VOLT = 0x2E, |
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MC34VR500_SW1STBY, |
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MC34VR500_SW1OFF, |
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MC34VR500_SW1MODE, |
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MC34VR500_SW1CONF, |
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MC34VR500_SW2VOLT, |
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MC34VR500_SW2STBY, |
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MC34VR500_SW2OFF, |
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MC34VR500_SW2MODE, |
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MC34VR500_SW2CONF, |
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MC34VR500_SW3VOLT = 0x3C, |
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MC34VR500_SW3STBY, |
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MC34VR500_SW3OFF, |
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MC34VR500_SW3MODE, |
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MC34VR500_SW3CONF, |
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MC34VR500_SW4VOLT = 0x4A, |
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MC34VR500_SW4STBY, |
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MC34VR500_SW4OFF, |
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MC34VR500_SW4MODE, |
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MC34VR500_SW4CONF, |
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MC34VR500_REFOUTCRTRL = 0x6A, |
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MC34VR500_LDO1CTL = 0x6D, |
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MC34VR500_LDO2CTL, |
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MC34VR500_LDO3CTL, |
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MC34VR500_LDO4CTL, |
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MC34VR500_LDO5CTL, |
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MC34VR500_PAGE_REGISTER = 0x7F, |
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/* Internal RAM */ |
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MC34VR500_SW1_VOLT = 0xA8, |
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MC34VR500_SW1_SEQ, |
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MC34VR500_SW1_CONFIG, |
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MC34VR500_SW2_VOLT = 0xAC, |
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MC34VR500_SW2_SEQ, |
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MC34VR500_SW2_CONFIG, |
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MC34VR500_SW3_VOLT = 0xB0, |
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MC34VR500_SW3_SEQ, |
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MC34VR500_SW3_CONFIG, |
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MC34VR500_SW4_VOLT = 0xB8, |
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MC34VR500_SW4_SEQ, |
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MC34VR500_SW4_CONFIG, |
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MC34VR500_REFOUT_SEQ = 0xC4, |
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MC34VR500_LDO1_VOLT = 0xCC, |
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MC34VR500_LDO1_SEQ, |
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MC34VR500_LDO2_VOLT = 0xD0, |
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MC34VR500_LDO2_SEQ, |
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MC34VR500_LDO3_VOLT = 0xD4, |
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MC34VR500_LDO3_SEQ, |
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MC34VR500_LDO4_VOLT = 0xD8, |
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MC34VR500_LDO4_SEQ, |
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MC34VR500_LDO5_VOLT = 0xDC, |
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MC34VR500_LDO5_SEQ, |
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MC34VR500_PU_CONFIG1 = 0xE0, |
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MC34VR500_TBB_POR = 0xE4, |
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MC34VR500_PWRGD_EN = 0xE8, |
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MC34VR500_NUM_OF_REGS, |
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}; |
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/* Registor offset based on SWxVOLT register */ |
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#define MC34VR500_VOLT_OFFSET 0 |
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#define MC34VR500_STBY_OFFSET 1 |
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#define MC34VR500_OFF_OFFSET 2 |
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#define MC34VR500_MODE_OFFSET 3 |
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#define MC34VR500_CONF_OFFSET 4 |
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#define SW_MODE_MASK 0xf |
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#define SW_MODE_SHIFT 0 |
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#define LDO_VOL_MASK 0xf |
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#define LDO_EN (1 << 4) |
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#define LDO_MODE_SHIFT 4 |
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#define LDO_MODE_MASK (1 << 4) |
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#define LDO_MODE_OFF 0 |
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#define LDO_MODE_ON 1 |
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#define REFOUTEN (1 << 4) |
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/*
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* Regulator Mode Control |
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* |
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* OFF: The regulator is switched off and the output voltage is discharged. |
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* PFM: In this mode, the regulator is always in PFM mode, which is useful |
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* at light loads for optimized efficiency. |
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* PWM: In this mode, the regulator is always in PWM mode operation |
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* regardless of load conditions. |
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* APS: In this mode, the regulator moves automatically between pulse |
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* skipping mode and PWM mode depending on load conditions. |
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* |
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* SWxMODE[3:0] |
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* Normal Mode | Standby Mode | value |
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* OFF OFF 0x0 |
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* PWM OFF 0x1 |
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* PFM OFF 0x3 |
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* APS OFF 0x4 |
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* PWM PWM 0x5 |
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* PWM APS 0x6 |
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* APS APS 0x8 |
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* APS PFM 0xc |
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* PWM PFM 0xd |
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*/ |
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#define OFF_OFF 0x0 |
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#define PWM_OFF 0x1 |
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#define PFM_OFF 0x3 |
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#define APS_OFF 0x4 |
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#define PWM_PWM 0x5 |
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#define PWM_APS 0x6 |
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#define APS_APS 0x8 |
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#define APS_PFM 0xc |
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#define PWM_PFM 0xd |
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int power_mc34vr500_init(unsigned char bus); |
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#endif /* __MC34VR500_PMIC_H_ */ |
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