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@ -10,22 +10,13 @@ |
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#ifndef __CONFIG_H |
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#define __CONFIG_H |
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/*
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* High Level Configuration Options |
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*/ |
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#define CONFIG_OMAP 1 /* in a TI OMAP core */ |
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#define CONFIG_OMAP3_PANDORA 1 /* working with pandora */ |
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#define CONFIG_OMAP_GPIO |
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#define CONFIG_OMAP_COMMON |
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/* Common ARM Erratas */ |
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#define CONFIG_ARM_ERRATA_454179 |
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#define CONFIG_ARM_ERRATA_430973 |
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#define CONFIG_ARM_ERRATA_621766 |
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#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ |
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#define CONFIG_NAND |
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#define CONFIG_SDRC /* The chip has SDRC controller */ |
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/* override base for compatibility with MLO the device ships with */ |
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#define CONFIG_SYS_TEXT_BASE 0x80008000 |
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#include <asm/arch/cpu.h> /* get chip and board defs */ |
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#include <asm/arch/omap.h> |
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#include <configs/ti_omap3_common.h> |
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/*
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* Display CPU and Board information |
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@ -33,79 +24,42 @@ |
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#define CONFIG_DISPLAY_CPUINFO 1 |
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#define CONFIG_DISPLAY_BOARDINFO 1 |
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/* Clock Defines */ |
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#define V_OSCK 26000000 /* Clock output from T2 */ |
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#define V_SCLK (V_OSCK >> 1) |
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#define CONFIG_MISC_INIT_R |
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
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#define CONFIG_SETUP_MEMORY_TAGS 1 |
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#define CONFIG_INITRD_TAG 1 |
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#define CONFIG_REVISION_TAG 1 |
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#define CONFIG_OF_LIBFDT 1 |
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/*
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* Size of malloc() pool |
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*/ |
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#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ |
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#define CONFIG_SYS_MALLOC_LEN (1024 * 1024 + CONFIG_ENV_SIZE) |
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 |
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#define CONFIG_SYS_DEVICE_NULLDEV 1 |
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/*
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* Hardware drivers |
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*/ |
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 |
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#define CONFIG_SYS_DEVICE_NULLDEV 1 |
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/* I2C Support */ |
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#define CONFIG_SYS_I2C_OMAP34XX |
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/* USB */ |
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#define CONFIG_MUSB_UDC 1 |
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#define CONFIG_USB_OMAP3 1 |
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#define CONFIG_TWL4030_USB 1 |
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/* TWL4030 LED */ |
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#define CONFIG_TWL4030_LED |
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/* USB device configuration */ |
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#define CONFIG_USB_DEVICE 1 |
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#define CONFIG_USB_TTY 1 |
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/* Initialize GPIOs by default */ |
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#define CONFIG_OMAP3_GPIO_4 /* GPIO96..127 is in GPIO Bank 4 */ |
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#define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO Bank 6 */ |
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/*
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* NS16550 Configuration |
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*/ |
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#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ |
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#define CONFIG_SYS_NS16550 |
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#undef CONFIG_OMAP_SERIAL |
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#define CONFIG_SYS_NS16550_SERIAL |
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#define CONFIG_SYS_NS16550_REG_SIZE (-4) |
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#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK |
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/*
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* select serial console configuration |
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*/ |
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#define CONFIG_CONS_INDEX 3 |
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#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 |
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#define CONFIG_SERIAL3 3 |
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/* allow to overwrite serial and ethaddr */ |
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#define CONFIG_ENV_OVERWRITE |
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#define CONFIG_BAUDRATE 115200 |
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#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \ |
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115200} |
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#define CONFIG_GENERIC_MMC 1 |
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#define CONFIG_MMC 1 |
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#define CONFIG_OMAP_HSMMC 1 |
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#define CONFIG_DOS_PARTITION 1 |
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/* commands to include */ |
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#include <config_cmd_default.h> |
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#define CONFIG_CMD_EXT2 /* EXT2 Support */ |
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#define CONFIG_CMD_FAT /* FAT support */ |
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#define CONFIG_CMD_I2C /* I2C serial bus support */ |
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#define CONFIG_CMD_MMC /* MMC support */ |
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#define CONFIG_CMD_NAND /* NAND support */ |
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#define CONFIG_CMD_CACHE /* Cache control */ |
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#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ |
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#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ |
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#undef CONFIG_CMD_IMI /* iminfo */ |
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@ -113,53 +67,36 @@ |
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#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ |
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#undef CONFIG_CMD_NFS /* NFS support */ |
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#define CONFIG_SYS_NO_FLASH |
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#define CONFIG_SYS_I2C |
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#define CONFIG_SYS_OMAP24_I2C_SPEED 100000 |
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#define CONFIG_SYS_OMAP24_I2C_SLAVE 1 |
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#define CONFIG_SYS_I2C_OMAP34XX |
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/*
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* TWL4030 |
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*/ |
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#define CONFIG_TWL4030_POWER 1 |
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#define CONFIG_TWL4030_LED 1 |
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/*
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* Board NAND Info. |
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*/ |
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#define CONFIG_NAND_OMAP_GPMC |
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#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ |
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/* to access nand */ |
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#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ |
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/* to access nand */ |
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/* at CS0 */ |
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#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ |
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/* devices */ |
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#ifdef CONFIG_CMD_NAND |
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#define CONFIG_CMD_MTDPARTS |
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#define CONFIG_MTD_PARTITIONS |
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#define CONFIG_MTD_DEVICE |
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#define CONFIG_CMD_UBI |
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#define CONFIG_CMD_UBIFS |
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#define CONFIG_RBTREE |
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#define CONFIG_LZO |
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#define MTDIDS_DEFAULT "nand0=nand" |
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#define MTDPARTS_DEFAULT "mtdparts=nand:512k(xloader),"\ |
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#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16 |
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#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW |
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#define CONFIG_SYS_NAND_PAGE_SIZE 2048 |
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#define CONFIG_SYS_NAND_OOBSIZE 64 |
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#ifdef CONFIG_NAND |
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#define CONFIG_CMD_UBI /* UBI-formated MTD partition support */ |
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#define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */ |
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#define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */ |
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#define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */ |
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#define CONFIG_MTD_PARTITIONS /* required for UBI partition support */ |
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#define MTDIDS_DEFAULT "nand0=omap2-nand.0" |
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#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(xloader),"\ |
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"1920k(uboot),128k(uboot-env),"\
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"10m(boot),-(rootfs)" |
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#else |
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#define MTDPARTS_DEFAULT |
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#endif |
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/* Environment information */ |
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#define CONFIG_BOOTDELAY 1 |
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#define CONFIG_EXTRA_ENV_SETTINGS \ |
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DEFAULT_LINUX_BOOT_ENV \
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"usbtty=cdc_acm\0" \
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"loadaddr=0x82000000\0" \
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"bootargs=ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs " \
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"rw rootflags=bulk_read vram=6272K omapfb.vram=0:3000K\0" \
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"mtdparts=" MTDPARTS_DEFAULT "\0" \
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@ -172,60 +109,18 @@ |
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"ubi part boot && ubifsmount ubi:boot && " \
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"ubifsload ${loadaddr} uImage && bootm ${loadaddr}" |
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#define CONFIG_AUTO_COMPLETE 1 |
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/*
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* Miscellaneous configurable options |
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*/ |
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#define CONFIG_SYS_LONGHELP /* undef to save memory */ |
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#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ |
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#undef CONFIG_SYS_PROMPT |
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#define CONFIG_SYS_PROMPT "Pandora # " |
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#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ |
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/* Print Buffer Size */ |
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
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sizeof(CONFIG_SYS_PROMPT) + 16) |
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#define CONFIG_SYS_MAXARGS 16 /* max number of command */ |
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/* args */ |
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/* Boot Argument Buffer Size */ |
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
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/* memtest works on */ |
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#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) |
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#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ |
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0x01F00000) /* 31MB */ |
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#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ |
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/* address */ |
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/*
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* OMAP3 has 12 GP timers, they can be driven by the system clock |
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* (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). |
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* This rate is divided by a local divisor. |
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*/ |
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#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 |
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#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ |
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/*-----------------------------------------------------------------------
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* Physical Memory Map |
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*/ |
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#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ |
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 |
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#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 |
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#define CONFIG_SYS_TEXT_BASE 0x80008000 |
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
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#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 |
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#define CONFIG_SYS_INIT_RAM_SIZE 0x800 |
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ |
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CONFIG_SYS_INIT_RAM_SIZE - \
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GENERATED_GBL_DATA_SIZE) |
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/*-----------------------------------------------------------------------
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* FLASH and environment organization |
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*/ |
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/* **** PISMO SUPPORT *** */ |
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#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ |
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#if defined(CONFIG_CMD_NAND) |
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#if defined(CONFIG_NAND) |
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#define CONFIG_SYS_FLASH_BASE NAND_BASE |
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#endif |
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