arm: move SYS_ARCH_TIMER to KConfig

SYS_ARCH_TIMER guards the usage of the ARM Generic Timer (aka arch
timer) in U-Boot.
At the moment it is mandatory for ARMv8 and used by a few ARMv7 boards.
Add a proper Kconfig symbol to express this dependency properly,
allowing certain board configuration to later disable arch timer in case
there are any problems with it.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[tuomas: rebase + fix conflicts and resync with moveconfig & use select]
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>

arch/arm/Kconfig

@@ -242,6 +242,16 @@ config SYS_CACHELINE_SIZE
 	default 64 if SYS_CACHE_SHIFT_6
 	default 32 if SYS_CACHE_SHIFT_5
 
+config SYS_ARCH_TIMER
+	bool "ARM Generic Timer support"
+	depends on CPU_V7 || ARM64
+	default y if ARM64
+	help
+	  The ARM Generic Timer (aka arch-timer) provides an architected
+	  interface to a timer source on an SoC.
+	  It is mandantory for ARMv8 implementation and widely available
+	  on ARMv7 systems.
+
 config ARM_SMCCC
 	bool "Support for ARM SMC Calling Convention (SMCCC)"
 	depends on CPU_V7 || ARM64
@@ -570,6 +580,7 @@ config ARCH_KEYSTONE
 	select SUPPORT_SPL
 	select SYS_THUMB_BUILD
 	select CMD_POWEROFF
+	select SYS_ARCH_TIMER
 	imply CMD_MTDPARTS
 	imply FIT
 	imply CMD_SAVES

arch/arm/cpu/armv8/Makefile

@@ -9,7 +9,7 @@ extra-y	:= start.o
 
 obj-y	+= cpu.o
 ifndef CONFIG_$(SPL_TPL_)TIMER
-obj-y	+= generic_timer.o
+obj-$(CONFIG_SYS_ARCH_TIMER) += generic_timer.o
 endif
 obj-y	+= cache_v8.o
 obj-y	+= exceptions.o

arch/arm/mach-imx/mx7ulp/Kconfig

@@ -9,6 +9,7 @@ choice
 
 config TARGET_MX7ULP_EVK
         bool "Support mx7ulp EVK board"
+	select SYS_ARCH_TIMER
 
 endchoice
 

arch/arm/mach-qemu/Kconfig

@@ -16,6 +16,7 @@ config TARGET_QEMU_ARM_32BIT
 	depends on ARCH_QEMU
 	select CPU_V7
 	select ARCH_SUPPORT_PSCI
+	select SYS_ARCH_TIMER
 
 config TARGET_QEMU_ARM_64BIT
 	bool "Support qemu_arm64"

arch/arm/mach-stm32mp/Kconfig

@@ -27,6 +27,7 @@ config TARGET_STM32MP1
 	select CPU_V7
 	select PINCTRL_STM32
 	select STM32_RESET
+	select SYS_ARCH_TIMER
 	select SYSRESET_SYSCON
 	help
 		target STMicroelectronics SOC STM32MP1 family

include/configs/mx7ulp_evk.h

@@ -46,7 +46,6 @@
 /* Using ULP WDOG for reset */
 #define WDOG_BASE_ADDR			WDG1_RBASE
 
-#define CONFIG_SYS_ARCH_TIMER
 #define CONFIG_SYS_HZ_CLOCK		1000000 /* Fixed at 1Mhz from TSTMR */
 
 #define CONFIG_INITRD_TAG

include/configs/qemu-arm.h

@@ -20,7 +20,6 @@
 #define CONFIG_SYS_MALLOC_LEN		SZ_16M
 
 /* For timer, QEMU emulates an ARMv7/ARMv8 architected timer */
-#define CONFIG_SYS_ARCH_TIMER
 #define CONFIG_SYS_HZ                       1000
 
 /* For block devices, QEMU emulates an ICH9 AHCI controller over PCI */

include/configs/stm32mp1.h

@@ -17,7 +17,6 @@
  * Number of clock ticks in 1 sec
  */
 #define CONFIG_SYS_HZ				1000
-#define CONFIG_SYS_ARCH_TIMER
 
 /*
  * malloc() pool size

include/configs/ti_armv7_keystone2.h

@@ -17,7 +17,6 @@
 
 /* SoC Configuration */
 #define CONFIG_ARCH_CPU_INIT
-#define CONFIG_SYS_ARCH_TIMER
 #define CONFIG_SPL_TARGET		"u-boot-spi.gph"
 #define CONFIG_SYS_DCACHE_OFF
 

scripts/config_whitelist.txt

@@ -2074,7 +2074,6 @@ CONFIG_SYS_APP1_BASE
 CONFIG_SYS_APP1_SIZE
 CONFIG_SYS_APP2_BASE
 CONFIG_SYS_APP2_SIZE
-CONFIG_SYS_ARCH_TIMER
 CONFIG_SYS_ARM_CACHE_WRITETHROUGH
 CONFIG_SYS_AT91_CPU_NAME
 CONFIG_SYS_AT91_MAIN_CLOCK