mx6qsabresd is a board based on mx6q SoC with the following features: - 1GB of DDR3 - 1 USB OTG port - 1 HDMI output port - SPI NOR - LVDS panel - Gigabit Ethernet - Camera Connector - eMMC and SD card slot - Audio Add very basic support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>master
Fabio Estevam
13 years ago
committed by
Tom Rini
parent
af7ec0b058
commit
7891e258d4
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#
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# Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
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#
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# (C) Copyright 2011 Freescale Semiconductor, Inc.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk |
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LIB = $(obj)lib$(BOARD).o
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COBJS := mx6qsabresd.o
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SRCS := $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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$(LIB): $(obj).depend $(OBJS) |
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$(call cmd_link_o_target, $(OBJS))
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk |
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sinclude $(obj).depend |
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#########################################################################
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@ -0,0 +1,118 @@ |
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/*
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* Copyright (C) 2012 Freescale Semiconductor, Inc. |
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* |
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* Author: Fabio Estevam <fabio.estevam@freescale.com> |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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*/ |
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#include <common.h> |
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#include <asm/io.h> |
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#include <asm/arch/clock.h> |
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#include <asm/arch/imx-regs.h> |
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#include <asm/arch/iomux.h> |
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#include <asm/arch/mx6x_pins.h> |
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#include <asm/errno.h> |
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#include <asm/gpio.h> |
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#include <asm/imx-common/iomux-v3.h> |
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#include <mmc.h> |
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#include <fsl_esdhc.h> |
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#include <miiphy.h> |
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#include <netdev.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ |
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PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
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PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) |
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#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ |
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PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \
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PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) |
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#define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ |
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PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
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PAD_CTL_DSE_40ohm | PAD_CTL_HYS) |
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int dram_init(void) |
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{ |
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gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); |
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return 0; |
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} |
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iomux_v3_cfg_t uart1_pads[] = { |
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MX6Q_PAD_CSI0_DAT10__UART1_TXD | MUX_PAD_CTRL(UART_PAD_CTRL), |
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MX6Q_PAD_CSI0_DAT11__UART1_RXD | MUX_PAD_CTRL(UART_PAD_CTRL), |
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}; |
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iomux_v3_cfg_t usdhc3_pads[] = { |
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MX6Q_PAD_SD3_CLK__USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6Q_PAD_SD3_CMD__USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6Q_PAD_SD3_DAT0__USDHC3_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6Q_PAD_SD3_DAT1__USDHC3_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6Q_PAD_SD3_DAT2__USDHC3_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6Q_PAD_SD3_DAT3__USDHC3_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), |
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MX6Q_PAD_NANDF_D0__GPIO_2_0 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ |
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}; |
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static void setup_iomux_uart(void) |
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{ |
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imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); |
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} |
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#ifdef CONFIG_FSL_ESDHC |
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struct fsl_esdhc_cfg usdhc_cfg[1] = { |
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{USDHC3_BASE_ADDR}, |
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}; |
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int board_mmc_getcd(struct mmc *mmc) |
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{ |
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gpio_direction_input(IMX_GPIO_NR(2, 0)); |
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return !gpio_get_value(IMX_GPIO_NR(2, 0)); |
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} |
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int board_mmc_init(bd_t *bis) |
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{ |
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imx_iomux_v3_setup_multiple_pads(usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); |
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return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); |
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} |
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#endif |
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u32 get_board_rev(void) |
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{ |
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return 0x63000; |
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} |
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int board_early_init_f(void) |
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{ |
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setup_iomux_uart(); |
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return 0; |
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} |
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int board_init(void) |
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{ |
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/* address of boot parameters */ |
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; |
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return 0; |
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} |
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int checkboard(void) |
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{ |
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puts("Board: MX6Q-SabreSD\n"); |
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return 0; |
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} |
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@ -0,0 +1,170 @@ |
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/*
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* Copyright (C) 2012 Freescale Semiconductor, Inc. |
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* |
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* Configuration settings for the Freescale i.MX6Q SabreSD board. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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*/ |
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#ifndef __CONFIG_H |
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#define __CONFIG_H |
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#define CONFIG_MX6Q |
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#define CONFIG_SYS_MX6_HCLK 24000000 |
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#define CONFIG_SYS_MX6_CLK32 32768 |
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#define CONFIG_DISPLAY_CPUINFO |
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#define CONFIG_DISPLAY_BOARDINFO |
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#define CONFIG_MACH_TYPE 3980 |
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#include <asm/arch/imx-regs.h> |
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#define CONFIG_CMDLINE_TAG |
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#define CONFIG_SETUP_MEMORY_TAGS |
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#define CONFIG_INITRD_TAG |
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#define CONFIG_REVISION_TAG |
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/* Size of malloc() pool */ |
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#define CONFIG_SYS_MALLOC_LEN CONFIG_ENV_SIZE |
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#define CONFIG_ARCH_CPU_INIT |
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#define CONFIG_BOARD_EARLY_INIT_F |
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#define CONFIG_MXC_GPIO |
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#define CONFIG_MXC_UART |
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#define CONFIG_MXC_UART_BASE UART1_BASE |
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/* MMC Configs */ |
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#define CONFIG_FSL_ESDHC |
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#define CONFIG_FSL_USDHC |
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
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#define CONFIG_SYS_FSL_USDHC_NUM 2 |
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#define CONFIG_MMC |
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#define CONFIG_CMD_MMC |
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#define CONFIG_GENERIC_MMC |
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#define CONFIG_CMD_EXT2 |
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#define CONFIG_CMD_FAT |
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#define CONFIG_DOS_PARTITION |
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/* allow to overwrite serial and ethaddr */ |
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#define CONFIG_ENV_OVERWRITE |
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#define CONFIG_CONS_INDEX 1 |
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#define CONFIG_BAUDRATE 115200 |
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/* Command definition */ |
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#include <config_cmd_default.h> |
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#undef CONFIG_CMD_IMLS |
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#define CONFIG_BOOTDELAY 3 |
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#define CONFIG_LOADADDR 0x10800000 |
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#define CONFIG_SYS_TEXT_BASE 0x17800000 |
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#define CONFIG_EXTRA_ENV_SETTINGS \ |
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"script=boot.scr\0" \
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"uimage=uImage\0" \
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"console=ttymxc0\0" \
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"fdt_high=0xffffffff\0" \
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"initrd_high=0xffffffff\0" \
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"mmcdev=0\0" \
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"mmcpart=2\0" \
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"mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
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"mmcargs=setenv bootargs console=${console},${baudrate} " \
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"root=${mmcroot}\0" \
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"loadbootscript=" \
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"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
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"bootscript=echo Running bootscript from mmc ...; " \
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"source\0" \
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"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
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"mmcboot=echo Booting from mmc ...; " \
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"run mmcargs; " \
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"bootm\0" \
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"netargs=setenv bootargs console=${console},${baudrate} " \
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"root=/dev/nfs " \
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"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
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"netboot=echo Booting from net ...; " \
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"run netargs; " \
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"dhcp ${uimage}; bootm\0" \
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#define CONFIG_BOOTCOMMAND \ |
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"mmc dev ${mmcdev};" \
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"if mmc rescan ${mmcdev}; then " \
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"if run loadbootscript; then " \
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"run bootscript; " \
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"else " \
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"if run loaduimage; then " \
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"run mmcboot; " \
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"else run netboot; " \
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"fi; " \
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"fi; " \
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"else run netboot; fi" |
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#define CONFIG_ARP_TIMEOUT 200UL |
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/* Miscellaneous configurable options */ |
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#define CONFIG_SYS_LONGHELP |
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#define CONFIG_SYS_HUSH_PARSER |
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#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " |
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#define CONFIG_SYS_PROMPT "MX6QSABRESD U-Boot > " |
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#define CONFIG_AUTO_COMPLETE |
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#define CONFIG_SYS_CBSIZE 256 |
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/* Print Buffer Size */ |
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
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#define CONFIG_SYS_MAXARGS 16 |
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
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#define CONFIG_SYS_MEMTEST_START 0x10000000 |
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#define CONFIG_SYS_MEMTEST_END 0x10010000 |
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
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#define CONFIG_SYS_HZ 1000 |
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#define CONFIG_CMDLINE_EDITING |
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#define CONFIG_STACKSIZE (128 * 1024) |
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/* Physical Memory Map */ |
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#define CONFIG_NR_DRAM_BANKS 1 |
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR |
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#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) |
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM |
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR |
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE |
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#define CONFIG_SYS_INIT_SP_OFFSET \ |
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
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#define CONFIG_SYS_INIT_SP_ADDR \ |
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
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/* FLASH and environment organization */ |
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#define CONFIG_SYS_NO_FLASH |
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#define CONFIG_ENV_SIZE (8 * 1024) |
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#define CONFIG_ENV_IS_IN_MMC |
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#if defined(CONFIG_ENV_IS_IN_MMC) |
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#define CONFIG_ENV_OFFSET (6 * 64 * 1024) |
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#define CONFIG_SYS_MMC_ENV_DEV 0 |
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#endif |
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#define CONFIG_OF_LIBFDT |
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#define CONFIG_SYS_DCACHE_OFF |
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#ifndef CONFIG_SYS_DCACHE_OFF |
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#define CONFIG_CMD_CACHE |
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#endif |
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#endif /* __CONFIG_H */ |
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