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@ -100,6 +100,10 @@ |
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#error "CONFIG_MII has to be defined!" |
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#endif |
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#if defined(CONFIG_NETCONSOLE) && !defined(CONFIG_NET_MULTI) |
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#error "CONFIG_NET_MULTI has to be defined for NetConsole" |
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#endif |
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#define EMAC_RESET_TIMEOUT 1000 /* 1000 ms reset timeout */ |
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#define PHY_AUTONEGOTIATE_TIMEOUT 4000 /* 4000 ms autonegotiate timeout */ |
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@ -111,10 +115,6 @@ |
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#define ENET_MAX_MTU PKTSIZE |
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#define ENET_MAX_MTU_ALIGNED PKTSIZE_ALIGN |
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/* define the number of channels implemented */ |
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#define EMAC_RXCHL EMAC_NUM_DEV |
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#define EMAC_TXCHL EMAC_NUM_DEV |
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/*-----------------------------------------------------------------------------+
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* Defines for MAL/EMAC interrupt conditions as reported in the UIC (Universal |
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* Interrupt Controller). |
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@ -142,6 +142,19 @@ static uint32_t mal_ier; |
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struct eth_device *emac0_dev = NULL; |
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#endif |
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/*
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* Get count of EMAC devices (doesn't have to be the max. possible number |
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* supported by the cpu) |
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*/ |
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#if defined(CONFIG_HAS_ETH3) |
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#define LAST_EMAC_NUM 4 |
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#elif defined(CONFIG_HAS_ETH2) |
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#define LAST_EMAC_NUM 3 |
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#elif defined(CONFIG_HAS_ETH1) |
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#define LAST_EMAC_NUM 2 |
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#else |
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#define LAST_EMAC_NUM 1 |
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#endif |
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/*-----------------------------------------------------------------------------+
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* Prototypes and externals. |
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@ -186,7 +199,9 @@ static void ppc_4xx_eth_halt (struct eth_device *dev) |
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/* EMAC RESET */ |
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out32 (EMAC_M0 + hw_p->hw_addr, EMAC_M0_SRST); |
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#ifndef CONFIG_NETCONSOLE |
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hw_p->print_speed = 1; /* print speed message again next time */ |
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#endif |
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return; |
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} |
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@ -1343,7 +1358,7 @@ int ppc_4xx_eth_initialize (bd_t * bis) |
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#endif |
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#endif |
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for (eth_num = 0; eth_num < EMAC_NUM_DEV; eth_num++) { |
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for (eth_num = 0; eth_num < LAST_EMAC_NUM; eth_num++) { |
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/* See if we can actually bring up the interface, otherwise, skip it */ |
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switch (eth_num) { |
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