MPC8xxx DDR: align informational prints

Add spaces to cause the informational prints to line up with
the ones from init_func_ram() in board.c.  Output now looks like
this:

....
DRAM:  Detected 4096 MB of memory
       This U-Boot only supports < 4G of DDR
       You could rebuild it with CONFIG_PHYS_64BIT
       DDR: 2 GiB (DDR2, 64-bit, CL=5, ECC off)
....

The prints from lbc_sdram_init() have also been modified to line
line up and changed to start with "LBC SDRAM" instead of the
confusing "SDRAM".

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
master
Becky Bruce 14 years ago committed by Kumar Gala
parent 810c442749
commit 7ea3871e06
  1. 5
      arch/powerpc/cpu/mpc8xxx/ddr/main.c
  2. 5
      board/freescale/mpc8540ads/mpc8540ads.c
  3. 6
      board/freescale/mpc8541cds/mpc8541cds.c
  4. 6
      board/freescale/mpc8548cds/mpc8548cds.c
  5. 6
      board/freescale/mpc8555cds/mpc8555cds.c
  6. 5
      board/freescale/mpc8560ads/mpc8560ads.c
  7. 6
      board/freescale/mpc8568mds/mpc8568mds.c

@ -469,8 +469,9 @@ phys_size_t fsl_ddr_sdram(void)
/* Check for 4G or more. Bad. */
if (total_memory >= (1ull << 32)) {
printf("Detected %lld MB of memory\n", total_memory >> 20);
printf("This U-Boot only supports < 4G of DDR\n");
printf("You could rebuild it with CONFIG_PHYS_64BIT\n");
printf(" This U-Boot only supports < 4G of DDR\n");
printf(" You could rebuild it with CONFIG_PHYS_64BIT\n");
printf(" "); /* re-align to match init_func_ram print */
total_memory = CONFIG_MAX_MEM_MAPPED;
}
#endif

@ -127,8 +127,9 @@ void lbc_sdram_init(void)
volatile fsl_lbc_t *lbc = LBC_BASE_ADDR;
uint *sdram_addr = (uint *)CONFIG_SYS_LBC_SDRAM_BASE;
puts(" SDRAM: ");
print_size (CONFIG_SYS_LBC_SDRAM_SIZE * 1024 * 1024, "\n");
puts("LBC SDRAM: ");
print_size(CONFIG_SYS_LBC_SDRAM_SIZE * 1024 * 1024,
"\n ");
/*
* Setup SDRAM Base and Option Registers

@ -301,9 +301,9 @@ void lbc_sdram_init(void)
uint cpu_board_rev;
uint lsdmr_common;
puts(" SDRAM: ");
print_size (CONFIG_SYS_LBC_SDRAM_SIZE * 1024 * 1024, "\n");
puts("LBC SDRAM: ");
print_size(CONFIG_SYS_LBC_SDRAM_SIZE * 1024 * 1024,
"\n ");
/*
* Setup SDRAM Base and Option Registers

@ -121,9 +121,9 @@ void lbc_sdram_init(void)
uint cpu_board_rev;
uint lsdmr_common;
puts(" SDRAM: ");
print_size (CONFIG_SYS_LBC_SDRAM_SIZE * 1024 * 1024, "\n");
puts("LBC SDRAM: ");
print_size(CONFIG_SYS_LBC_SDRAM_SIZE * 1024 * 1024,
"\n ");
/*
* Setup SDRAM Base and Option Registers

@ -299,9 +299,9 @@ void lbc_sdram_init(void)
uint cpu_board_rev;
uint lsdmr_common;
puts(" SDRAM: ");
print_size (CONFIG_SYS_LBC_SDRAM_SIZE * 1024 * 1024, "\n");
puts("LBC SDRAM: ");
print_size(CONFIG_SYS_LBC_SDRAM_SIZE * 1024 * 1024,
"\n ");
/*
* Setup SDRAM Base and Option Registers

@ -332,8 +332,9 @@ void lbc_sdram_init(void)
volatile fsl_lbc_t *lbc = LBC_BASE_ADDR;
uint *sdram_addr = (uint *)CONFIG_SYS_LBC_SDRAM_BASE;
puts(" SDRAM: ");
print_size (CONFIG_SYS_LBC_SDRAM_SIZE * 1024 * 1024, "\n");
puts("LBC SDRAM: ");
print_size(CONFIG_SYS_LBC_SDRAM_SIZE * 1024 * 1024,
"\n ");
/*
* Setup SDRAM Base and Option Registers

@ -180,9 +180,9 @@ void lbc_sdram_init(void)
uint *sdram_addr = (uint *)CONFIG_SYS_LBC_SDRAM_BASE;
uint lsdmr_common;
puts(" SDRAM: ");
print_size (CONFIG_SYS_LBC_SDRAM_SIZE * 1024 * 1024, "\n");
puts("LBC SDRAM: ");
print_size(CONFIG_SYS_LBC_SDRAM_SIZE * 1024 * 1024,
"\n ");
/*
* Setup SDRAM Base and Option Registers

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