Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

arch/powerpc/cpu/mpc85xx/start.S

@@ -720,16 +720,39 @@ enable_l2_cluster_l2:
 	ori	r4, r4, (L2CSR0_L2FI|L2CSR0_L2LFC)@l
 	sync
 	stw	r4, 0(r3)	/* invalidate L2 */
+	/* Poll till the bits are cleared */
 1:	sync
 	lwz	r0, 0(r3)
 	twi	0, r0, 0
 	isync
 	and.	r1, r0, r4
 	bne	1b
+
+	/* L2PE must be set before L2 cache is enabled */
+	lis	r4, (L2CSR0_L2PE)@h
+	ori	r4, r4, (L2CSR0_L2PE)@l
+	sync
+	stw	r4, 0(r3)	/* enable L2 parity/ECC error checking */
+	/* Poll till the bit is set */
+1:	sync
+	lwz	r0, 0(r3)
+	twi	0, r0, 0
+	isync
+	and.	r1, r0, r4
+	beq	1b
+
 	lis	r4, (L2CSR0_L2E|L2CSR0_L2PE)@h
 	ori	r4, r4, (L2CSR0_L2REP_MODE)@l
 	sync
 	stw	r4, 0(r3)	/* enable L2 */
+	/* Poll till the bit is set */
+1:	sync
+	lwz	r0, 0(r3)
+	twi	0, r0, 0
+	isync
+	and.	r1, r0, r4
+	beq	1b
+
 delete_ccsr_l2_tlb:
 	delete_tlb0_entry 0, CONFIG_SYS_CCSRBAR + 0xC20000, MAS2_I|MAS2_G, r3
 #endif

arch/powerpc/lib/ppccache.S

@@ -65,6 +65,7 @@ ppcSync:
  * flush_dcache_range(unsigned long start, unsigned long stop)
  */
 _GLOBAL(flush_dcache_range)
+#if defined(CONFIG_4xx) || defined(CONFIG_MPC86xx)
 	li	r5,L1_CACHE_BYTES-1
 	andc	r3,r3,r5
 	subf	r4,r3,r4
@@ -77,6 +78,7 @@ _GLOBAL(flush_dcache_range)
 	addi	r3,r3,L1_CACHE_BYTES
 	bdnz	1b
 	sync				/* wait for dcbst's to get to ram */
+#endif
 	blr
 
 /*
@@ -87,6 +89,7 @@ _GLOBAL(flush_dcache_range)
  * invalidate_dcache_range(unsigned long start, unsigned long stop)
  */
 _GLOBAL(invalidate_dcache_range)
+#if defined(CONFIG_4xx) || defined(CONFIG_MPC86xx)
 	li	r5,L1_CACHE_BYTES-1
 	andc	r3,r3,r5
 	subf	r4,r3,r4
@@ -100,5 +103,6 @@ _GLOBAL(invalidate_dcache_range)
 	addi	r3,r3,L1_CACHE_BYTES
 	bdnz	1b
 	sync				/* wait for dcbi's to get to ram */
+#endif
 	blr
 

board/freescale/t208xqds/MAINTAINERS

@@ -1,5 +1,5 @@
 T208XQDS BOARD
-#M:	-
+M:	Shengzhou Liu <Shengzhou.Liu@nxp.com>
 S:	Maintained
 F:	board/freescale/t208xqds/
 F:	include/configs/T208xQDS.h

board/freescale/t208xrdb/MAINTAINERS

@@ -1,5 +1,5 @@
 T208XRDB BOARD
-#M:	-
+M:	Shengzhou Liu <Shengzhou.Liu@nxp.com>
 S:	Maintained
 F:	board/freescale/t208xrdb/
 F:	include/configs/T208xRDB.h

board/freescale/t4rdb/eth.c

@@ -77,6 +77,9 @@ int board_eth_init(bd_t *bis)
 		puts("Invalid SerDes1 protocol for T4240RDB\n");
 	}
 
+	fm_disable_port(FM1_DTSEC5);
+	fm_disable_port(FM1_DTSEC6);
+
 	for (i = FM1_DTSEC1; i < FM1_DTSEC1 + CONFIG_SYS_NUM_FM1_DTSEC; i++) {
 		interface = fm_info_get_enet_if(i);
 		switch (interface) {
@@ -115,6 +118,8 @@ int board_eth_init(bd_t *bis)
 		puts("Invalid SerDes2 protocol for T4240RDB\n");
 	}
 
+	fm_disable_port(FM2_DTSEC5);
+	fm_disable_port(FM2_DTSEC6);
 	for (i = FM2_DTSEC1; i < FM2_DTSEC1 + CONFIG_SYS_NUM_FM2_DTSEC; i++) {
 		interface = fm_info_get_enet_if(i);
 		switch (interface) {

drivers/net/fm/t4240.c

@@ -74,7 +74,7 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
 	if ((port == FM1_DTSEC9 || port == FM1_DTSEC10) &&
 	    ((is_serdes_configured(XFI_FM1_MAC9)) ||
 	     (is_serdes_configured(XFI_FM1_MAC10))))
-		return PHY_INTERFACE_MODE_XGMII;
+		return PHY_INTERFACE_MODE_NONE;
 
 	if ((port == FM2_10GEC1 || port == FM2_10GEC2) &&
 	    ((is_serdes_configured(XAUI_FM2_MAC9))	||

include/configs/T208xQDS.h

@@ -291,6 +291,10 @@ unsigned long get_board_ddr_clk(void);
 #define QIXIS_LBMAP_SHIFT		0
 #define QIXIS_LBMAP_DFLTBANK		0x00
 #define QIXIS_LBMAP_ALTBANK		0x04
+#define QIXIS_LBMAP_NAND		0x09
+#define QIXIS_LBMAP_SD			0x00
+#define QIXIS_RCW_SRC_NAND		0x104
+#define QIXIS_RCW_SRC_SD		0x040
 #define QIXIS_RST_CTL_RESET		0x83
 #define QIXIS_RST_FORCE_MEM		0x1
 #define QIXIS_RCFG_CTL_RECONFIG_IDLE	0x20