From 355683c35ee8f935c88f2a0cf300a9c697ad422e Mon Sep 17 00:00:00 2001 From: Hiroyuki Yokoyama Date: Mon, 14 Dec 2015 11:24:44 +0900 Subject: [PATCH 01/11] ARM: rmobile: Fix CPGWPR Address define and Settings on Gen3 This patch fixes the write-protect control of CPG. Signed-off-by: Hiroyuki Yokoyama --- board/renesas/draak/draak.c | 4 ++-- board/renesas/salvator-x/salvator-x.c | 4 ++-- board/renesas/ulcb/ulcb.c | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/board/renesas/draak/draak.c b/board/renesas/draak/draak.c index 852fdda..e7f0bd7 100644 --- a/board/renesas/draak/draak.c +++ b/board/renesas/draak/draak.c @@ -27,7 +27,7 @@ DECLARE_GLOBAL_DATA_PTR; #define CPGWPCR 0xE6150904 -#define CPGWPR 0xE615090C +#define CPGWPR 0xE6150900 #define CLK2MHZ(clk) (clk / 1000 / 1000) void s_init(void) @@ -39,8 +39,8 @@ void s_init(void) writel(0xA5A5A500, &rwdt->rwtcsra); writel(0xA5A5A500, &swdt->swtcsra); + writel(0x5A5AFFFF, CPGWPR); writel(0xA5A50000, CPGWPCR); - writel(0xFFFFFFFF, CPGWPR); } #define GSX_MSTP112 BIT(12) /* 3DG */ diff --git a/board/renesas/salvator-x/salvator-x.c b/board/renesas/salvator-x/salvator-x.c index 00256bc..746403a 100644 --- a/board/renesas/salvator-x/salvator-x.c +++ b/board/renesas/salvator-x/salvator-x.c @@ -28,7 +28,7 @@ DECLARE_GLOBAL_DATA_PTR; #define CPGWPCR 0xE6150904 -#define CPGWPR 0xE615090C +#define CPGWPR 0xE6150900 #define CLK2MHZ(clk) (clk / 1000 / 1000) void s_init(void) @@ -40,8 +40,8 @@ void s_init(void) writel(0xA5A5A500, &rwdt->rwtcsra); writel(0xA5A5A500, &swdt->swtcsra); + writel(0x5A5AFFFF, CPGWPR); writel(0xA5A50000, CPGWPCR); - writel(0xFFFFFFFF, CPGWPR); } #define GSX_MSTP112 BIT(12) /* 3DG */ diff --git a/board/renesas/ulcb/ulcb.c b/board/renesas/ulcb/ulcb.c index 213e869..dfe8efd 100644 --- a/board/renesas/ulcb/ulcb.c +++ b/board/renesas/ulcb/ulcb.c @@ -27,7 +27,7 @@ DECLARE_GLOBAL_DATA_PTR; #define CPGWPCR 0xE6150904 -#define CPGWPR 0xE615090C +#define CPGWPR 0xE6150900 #define CLK2MHZ(clk) (clk / 1000 / 1000) void s_init(void) @@ -39,8 +39,8 @@ void s_init(void) writel(0xA5A5A500, &rwdt->rwtcsra); writel(0xA5A5A500, &swdt->swtcsra); + writel(0x5A5AFFFF, CPGWPR); writel(0xA5A50000, CPGWPCR); - writel(0xFFFFFFFF, CPGWPR); } #define GSX_MSTP112 BIT(12) /* 3DG */ From 44c56bf8248478f4d33be5b51337f9b340f47ab7 Mon Sep 17 00:00:00 2001 From: Hiroyuki Yokoyama Date: Tue, 25 Sep 2018 16:16:14 +0900 Subject: [PATCH 02/11] ARM: rmobile: Remove console parameter from bootargs on Gen3 This patch removes 'console=' argument, because kernel uses stdout-path as parameter. Signed-off-by: Hiroyuki Yokoyama --- configs/r8a7795_salvator-x_defconfig | 2 +- configs/r8a7795_ulcb_defconfig | 2 +- configs/r8a77965_salvator-x_defconfig | 2 +- configs/r8a7796_salvator-x_defconfig | 2 +- configs/r8a7796_ulcb_defconfig | 2 +- configs/r8a77970_eagle_defconfig | 2 +- configs/r8a77990_ebisu_defconfig | 2 +- configs/r8a77995_draak_defconfig | 2 +- 8 files changed, 8 insertions(+), 8 deletions(-) diff --git a/configs/r8a7795_salvator-x_defconfig b/configs/r8a7795_salvator-x_defconfig index aae38e8..40712a4 100644 --- a/configs/r8a7795_salvator-x_defconfig +++ b/configs/r8a7795_salvator-x_defconfig @@ -8,7 +8,7 @@ CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" +CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_DEFAULT_FDT_FILE="r8a7795-salvator-x.dtb" CONFIG_VERSION_VARIABLE=y diff --git a/configs/r8a7795_ulcb_defconfig b/configs/r8a7795_ulcb_defconfig index c341e1a..f1d150b 100644 --- a/configs/r8a7795_ulcb_defconfig +++ b/configs/r8a7795_ulcb_defconfig @@ -8,7 +8,7 @@ CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" +CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_DEFAULT_FDT_FILE="r8a7795-h3ulcb.dtb" CONFIG_VERSION_VARIABLE=y diff --git a/configs/r8a77965_salvator-x_defconfig b/configs/r8a77965_salvator-x_defconfig index 567f639..72549e2 100644 --- a/configs/r8a77965_salvator-x_defconfig +++ b/configs/r8a77965_salvator-x_defconfig @@ -9,7 +9,7 @@ CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" +CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_DEFAULT_FDT_FILE="r8a77965-salvator-x.dtb" CONFIG_VERSION_VARIABLE=y diff --git a/configs/r8a7796_salvator-x_defconfig b/configs/r8a7796_salvator-x_defconfig index e3551a8..7c39268 100644 --- a/configs/r8a7796_salvator-x_defconfig +++ b/configs/r8a7796_salvator-x_defconfig @@ -9,7 +9,7 @@ CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" +CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_DEFAULT_FDT_FILE="r8a7796-salvator-x.dtb" CONFIG_VERSION_VARIABLE=y diff --git a/configs/r8a7796_ulcb_defconfig b/configs/r8a7796_ulcb_defconfig index 8086261..ef5c944 100644 --- a/configs/r8a7796_ulcb_defconfig +++ b/configs/r8a7796_ulcb_defconfig @@ -9,7 +9,7 @@ CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" +CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_DEFAULT_FDT_FILE="r8a7796-m3ulcb.dtb" CONFIG_VERSION_VARIABLE=y diff --git a/configs/r8a77970_eagle_defconfig b/configs/r8a77970_eagle_defconfig index 0cd47c1..67ef263 100644 --- a/configs/r8a77970_eagle_defconfig +++ b/configs/r8a77970_eagle_defconfig @@ -9,7 +9,7 @@ CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" +CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_DEFAULT_FDT_FILE="r8a77970-eagle.dtb" CONFIG_VERSION_VARIABLE=y diff --git a/configs/r8a77990_ebisu_defconfig b/configs/r8a77990_ebisu_defconfig index 4f9ebad..7363310 100644 --- a/configs/r8a77990_ebisu_defconfig +++ b/configs/r8a77990_ebisu_defconfig @@ -9,7 +9,7 @@ CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttySC0,115200" +CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_DEFAULT_FDT_FILE="r8a77990-ebisu.dtb" CONFIG_VERSION_VARIABLE=y diff --git a/configs/r8a77995_draak_defconfig b/configs/r8a77995_draak_defconfig index ca89a12..0f1189b 100644 --- a/configs/r8a77995_draak_defconfig +++ b/configs/r8a77995_draak_defconfig @@ -9,7 +9,7 @@ CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttySC0,115200 rw root=/dev/nfs nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" +CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" CONFIG_SUPPORT_RAW_INITRD=y CONFIG_DEFAULT_FDT_FILE="r8a77995-draak.dtb" CONFIG_VERSION_VARIABLE=y From 6f5658219886961afeacfc4af3a9eef31e36e2a9 Mon Sep 17 00:00:00 2001 From: Hiroyuki Yokoyama Date: Wed, 30 Mar 2016 10:56:21 +0900 Subject: [PATCH 03/11] ARM: rmobile: Remove TMU0/TMU1 settings on Gen3 U-Boot uses ARM generic timer, TMU0 and TMU1 are not used, remove them. Signed-off-by: Hiroyuki Yokoyama --- board/renesas/draak/draak.c | 5 ----- board/renesas/eagle/eagle.c | 5 ----- board/renesas/ebisu/ebisu.c | 5 ----- board/renesas/salvator-x/salvator-x.c | 5 ----- board/renesas/ulcb/ulcb.c | 5 ----- 5 files changed, 25 deletions(-) diff --git a/board/renesas/draak/draak.c b/board/renesas/draak/draak.c index e7f0bd7..f9ae74a 100644 --- a/board/renesas/draak/draak.c +++ b/board/renesas/draak/draak.c @@ -44,17 +44,12 @@ void s_init(void) } #define GSX_MSTP112 BIT(12) /* 3DG */ -#define TMU0_MSTP125 BIT(25) /* secure */ -#define TMU1_MSTP124 BIT(24) /* non-secure */ #define SCIF2_MSTP310 BIT(10) /* SCIF2 */ #define DVFS_MSTP926 BIT(26) #define HSUSB_MSTP704 BIT(4) /* HSUSB */ int board_early_init_f(void) { - /* TMU0,1 */ /* which use ? */ - mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125 | TMU1_MSTP124); - #if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH) /* DVFS for reset */ mstp_clrbits_le32(MSTPSR9, SMSTPCR9, DVFS_MSTP926); diff --git a/board/renesas/eagle/eagle.c b/board/renesas/eagle/eagle.c index 9317410..0e5efea 100644 --- a/board/renesas/eagle/eagle.c +++ b/board/renesas/eagle/eagle.c @@ -50,17 +50,12 @@ void s_init(void) clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc); } -#define TMU0_MSTP125 BIT(25) /* secure */ - int board_early_init_f(void) { /* Unlock CPG access */ writel(0xA5A5FFFF, CPGWPR); writel(0x5A5A0000, CPGWPCR); - /* TMU0 */ - mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); - return 0; } diff --git a/board/renesas/ebisu/ebisu.c b/board/renesas/ebisu/ebisu.c index 248223b..5d8b79e 100644 --- a/board/renesas/ebisu/ebisu.c +++ b/board/renesas/ebisu/ebisu.c @@ -30,13 +30,8 @@ void s_init(void) { } -#define TMU0_MSTP125 BIT(25) /* secure */ - int board_early_init_f(void) { - /* TMU0 */ - mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); - return 0; } diff --git a/board/renesas/salvator-x/salvator-x.c b/board/renesas/salvator-x/salvator-x.c index 746403a..cb5228a 100644 --- a/board/renesas/salvator-x/salvator-x.c +++ b/board/renesas/salvator-x/salvator-x.c @@ -45,17 +45,12 @@ void s_init(void) } #define GSX_MSTP112 BIT(12) /* 3DG */ -#define TMU0_MSTP125 BIT(25) /* secure */ -#define TMU1_MSTP124 BIT(24) /* non-secure */ #define SCIF2_MSTP310 BIT(10) /* SCIF2 */ #define DVFS_MSTP926 BIT(26) #define HSUSB_MSTP704 BIT(4) /* HSUSB */ int board_early_init_f(void) { - /* TMU0,1 */ /* which use ? */ - mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125 | TMU1_MSTP124); - #if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH) /* DVFS for reset */ mstp_clrbits_le32(MSTPSR9, SMSTPCR9, DVFS_MSTP926); diff --git a/board/renesas/ulcb/ulcb.c b/board/renesas/ulcb/ulcb.c index dfe8efd..fca6eae 100644 --- a/board/renesas/ulcb/ulcb.c +++ b/board/renesas/ulcb/ulcb.c @@ -44,17 +44,12 @@ void s_init(void) } #define GSX_MSTP112 BIT(12) /* 3DG */ -#define TMU0_MSTP125 BIT(25) /* secure */ -#define TMU1_MSTP124 BIT(24) /* non-secure */ #define SCIF2_MSTP310 BIT(10) /* SCIF2 */ #define DVFS_MSTP926 BIT(26) #define HSUSB_MSTP704 BIT(4) /* HSUSB */ int board_early_init_f(void) { - /* TMU0,1 */ /* which use ? */ - mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125 | TMU1_MSTP124); - #if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH) /* DVFS for reset */ mstp_clrbits_le32(MSTPSR9, SMSTPCR9, DVFS_MSTP926); From 1c1fd9f9689b6a963cb959d95cb884dd783af823 Mon Sep 17 00:00:00 2001 From: Hiroyuki Yokoyama Date: Tue, 25 Sep 2018 18:48:03 +0900 Subject: [PATCH 04/11] ARM: rmobile: Remove Watchdog and CPG settings on Gen3 This code is unnecessary, because these registers are set by the initial program loader (IPL). Signed-off-by: Hiroyuki Yokoyama --- board/renesas/draak/draak.c | 13 ------------- board/renesas/salvator-x/salvator-x.c | 13 ------------- board/renesas/ulcb/ulcb.c | 13 ------------- 3 files changed, 39 deletions(-) diff --git a/board/renesas/draak/draak.c b/board/renesas/draak/draak.c index f9ae74a..71fd500 100644 --- a/board/renesas/draak/draak.c +++ b/board/renesas/draak/draak.c @@ -26,21 +26,8 @@ DECLARE_GLOBAL_DATA_PTR; -#define CPGWPCR 0xE6150904 -#define CPGWPR 0xE6150900 - -#define CLK2MHZ(clk) (clk / 1000 / 1000) void s_init(void) { - struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE; - struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE; - - /* Watchdog init */ - writel(0xA5A5A500, &rwdt->rwtcsra); - writel(0xA5A5A500, &swdt->swtcsra); - - writel(0x5A5AFFFF, CPGWPR); - writel(0xA5A50000, CPGWPCR); } #define GSX_MSTP112 BIT(12) /* 3DG */ diff --git a/board/renesas/salvator-x/salvator-x.c b/board/renesas/salvator-x/salvator-x.c index cb5228a..296aa90 100644 --- a/board/renesas/salvator-x/salvator-x.c +++ b/board/renesas/salvator-x/salvator-x.c @@ -27,21 +27,8 @@ DECLARE_GLOBAL_DATA_PTR; -#define CPGWPCR 0xE6150904 -#define CPGWPR 0xE6150900 - -#define CLK2MHZ(clk) (clk / 1000 / 1000) void s_init(void) { - struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE; - struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE; - - /* Watchdog init */ - writel(0xA5A5A500, &rwdt->rwtcsra); - writel(0xA5A5A500, &swdt->swtcsra); - - writel(0x5A5AFFFF, CPGWPR); - writel(0xA5A50000, CPGWPCR); } #define GSX_MSTP112 BIT(12) /* 3DG */ diff --git a/board/renesas/ulcb/ulcb.c b/board/renesas/ulcb/ulcb.c index fca6eae..a7ca274 100644 --- a/board/renesas/ulcb/ulcb.c +++ b/board/renesas/ulcb/ulcb.c @@ -26,21 +26,8 @@ DECLARE_GLOBAL_DATA_PTR; -#define CPGWPCR 0xE6150904 -#define CPGWPR 0xE6150900 - -#define CLK2MHZ(clk) (clk / 1000 / 1000) void s_init(void) { - struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE; - struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE; - - /* Watchdog init */ - writel(0xA5A5A500, &rwdt->rwtcsra); - writel(0xA5A5A500, &swdt->swtcsra); - - writel(0x5A5AFFFF, CPGWPR); - writel(0xA5A50000, CPGWPCR); } #define GSX_MSTP112 BIT(12) /* 3DG */ From a14d2d153db7b42b9ad0b03a7b772b32bbd8746f Mon Sep 17 00:00:00 2001 From: Hiroyuki Yokoyama Date: Tue, 25 Sep 2018 19:03:03 +0900 Subject: [PATCH 05/11] ARM: rmobile: salvator-x: Remove GSX clock force supply GSX clock force supply code is unnecessary at U-Boot, because GSX clock control is supported at the kernel driver. Signed-off-by: Hiroyuki Yokoyama --- board/renesas/salvator-x/salvator-x.c | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/board/renesas/salvator-x/salvator-x.c b/board/renesas/salvator-x/salvator-x.c index 296aa90..726a236 100644 --- a/board/renesas/salvator-x/salvator-x.c +++ b/board/renesas/salvator-x/salvator-x.c @@ -31,7 +31,6 @@ void s_init(void) { } -#define GSX_MSTP112 BIT(12) /* 3DG */ #define SCIF2_MSTP310 BIT(10) /* SCIF2 */ #define DVFS_MSTP926 BIT(26) #define HSUSB_MSTP704 BIT(4) /* HSUSB */ @@ -60,20 +59,9 @@ int board_early_init_f(void) int board_init(void) { - u32 cpu_type = rmobile_get_cpu_type(); - /* adress of boot parameters */ gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000; - if (cpu_type == RMOBILE_CPU_TYPE_R8A7795) { - /* GSX: force power and clock supply */ - writel(0x0000001F, SYSC_PWRONCR2); - while (readl(SYSC_PWRSR2) != 0x000003E0) - mdelay(20); - - mstp_clrbits_le32(MSTPSR1, SMSTPCR1, GSX_MSTP112); - } - /* USB1 pull-up */ setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN); From 4cb71e248f4cee437a5913d0d618f62058ea36ef Mon Sep 17 00:00:00 2001 From: Hiroyuki Yokoyama Date: Thu, 23 Mar 2017 10:35:41 +0900 Subject: [PATCH 06/11] ARM: rmobile: Tidy up SYSC_PWRx define of 3DG on Gen3 Tidy up unused definition related to power control of 3DG. Signed-off-by: Hiroyuki Yokoyama --- board/renesas/draak/draak.c | 6 ------ board/renesas/salvator-x/salvator-x.c | 6 ------ board/renesas/ulcb/ulcb.c | 6 ------ 3 files changed, 18 deletions(-) diff --git a/board/renesas/draak/draak.c b/board/renesas/draak/draak.c index 71fd500..060343d 100644 --- a/board/renesas/draak/draak.c +++ b/board/renesas/draak/draak.c @@ -44,12 +44,6 @@ int board_early_init_f(void) return 0; } -/* SYSC */ -/* R/- 32 Power status register 2(3DG) */ -#define SYSC_PWRSR2 0xE6180100 -/* -/W 32 Power resume control register 2 (3DG) */ -#define SYSC_PWRONCR2 0xE618010C - /* HSUSB block registers */ #define HSUSB_REG_LPSTS 0xE6590102 #define HSUSB_REG_LPSTS_SUSPM_NORMAL BIT(14) diff --git a/board/renesas/salvator-x/salvator-x.c b/board/renesas/salvator-x/salvator-x.c index 726a236..a1a1531 100644 --- a/board/renesas/salvator-x/salvator-x.c +++ b/board/renesas/salvator-x/salvator-x.c @@ -44,12 +44,6 @@ int board_early_init_f(void) return 0; } -/* SYSC */ -/* R/- 32 Power status register 2(3DG) */ -#define SYSC_PWRSR2 0xE6180100 -/* -/W 32 Power resume control register 2 (3DG) */ -#define SYSC_PWRONCR2 0xE618010C - /* HSUSB block registers */ #define HSUSB_REG_LPSTS 0xE6590102 #define HSUSB_REG_LPSTS_SUSPM_NORMAL BIT(14) diff --git a/board/renesas/ulcb/ulcb.c b/board/renesas/ulcb/ulcb.c index a7ca274..e549a2e 100644 --- a/board/renesas/ulcb/ulcb.c +++ b/board/renesas/ulcb/ulcb.c @@ -44,12 +44,6 @@ int board_early_init_f(void) return 0; } -/* SYSC */ -/* R/- 32 Power status register 2(3DG) */ -#define SYSC_PWRSR2 0xE6180100 -/* -/W 32 Power resume control register 2 (3DG) */ -#define SYSC_PWRONCR2 0xE618010C - /* HSUSB block registers */ #define HSUSB_REG_LPSTS 0xE6590102 #define HSUSB_REG_LPSTS_SUSPM_NORMAL BIT(14) From feaf301f784dd73b1d792bfcf7ee6e6e38ed0476 Mon Sep 17 00:00:00 2001 From: Hiroyuki Yokoyama Date: Wed, 26 Sep 2018 14:32:13 +0900 Subject: [PATCH 07/11] ARM: rmobile: Enable cache command on Gen3 This patch enables the cache command, mostly for convenience of testing. Signed-off-by: Hiroyuki Yokoyama Signed-off-by: Marek Vasut --- arch/arm/mach-rmobile/Kconfig | 1 + configs/r8a7795_salvator-x_defconfig | 1 + include/configs/draak.h | 1 - 3 files changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-rmobile/Kconfig b/arch/arm/mach-rmobile/Kconfig index ac08d6e..d82023a 100644 --- a/arch/arm/mach-rmobile/Kconfig +++ b/arch/arm/mach-rmobile/Kconfig @@ -12,6 +12,7 @@ config RCAR_GEN3 bool "Renesas ARM SoCs R-Car Gen3 (64bit)" select ARM64 select PHY + select CMD_CACHE endchoice diff --git a/configs/r8a7795_salvator-x_defconfig b/configs/r8a7795_salvator-x_defconfig index 40712a4..87870fc 100644 --- a/configs/r8a7795_salvator-x_defconfig +++ b/configs/r8a7795_salvator-x_defconfig @@ -21,6 +21,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y diff --git a/include/configs/draak.h b/include/configs/draak.h index 5d1da21..70c4f16 100644 --- a/include/configs/draak.h +++ b/include/configs/draak.h @@ -33,6 +33,5 @@ #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 #define CONFIG_SYS_MAX_FLASH_SECT 256 #define CONFIG_SYS_WRITE_SWAPPED_DATA -#define CONFIG_CMD_CACHE #endif /* __DRAAK_H */ From cf97b2213a60417e030e530d472f25ded49ee5b8 Mon Sep 17 00:00:00 2001 From: Hiroyuki Yokoyama Date: Wed, 26 Sep 2018 16:00:09 +0900 Subject: [PATCH 08/11] ARM: rmobile: Fix module clock controls refer status on Gen3 When referring to the MSTPSR register, it contains the clock status of SYS, RT, SECURE, and controlling SMSTPCR using this value has the problem of being affected by the RT and SECURE status.This patch changes the reference register to SMSTPCR. Signed-off-by: Hiroyuki Yokoyama --- board/renesas/draak/draak.c | 4 ++-- board/renesas/salvator-x/salvator-x.c | 4 ++-- board/renesas/ulcb/ulcb.c | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/board/renesas/draak/draak.c b/board/renesas/draak/draak.c index 060343d..8f3d391 100644 --- a/board/renesas/draak/draak.c +++ b/board/renesas/draak/draak.c @@ -39,7 +39,7 @@ int board_early_init_f(void) { #if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH) /* DVFS for reset */ - mstp_clrbits_le32(MSTPSR9, SMSTPCR9, DVFS_MSTP926); + mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926); #endif return 0; } @@ -60,7 +60,7 @@ int board_init(void) setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN); /* Configure the HSUSB block */ - mstp_clrbits_le32(MSTPSR7, SMSTPCR7, HSUSB_MSTP704); + mstp_clrbits_le32(SMSTPCR7, SMSTPCR7, HSUSB_MSTP704); /* Choice USB0SEL */ clrsetbits_le32(HSUSB_REG_UGCTRL2, HSUSB_REG_UGCTRL2_USB0SEL, HSUSB_REG_UGCTRL2_USB0SEL_EHCI); diff --git a/board/renesas/salvator-x/salvator-x.c b/board/renesas/salvator-x/salvator-x.c index a1a1531..8b15267 100644 --- a/board/renesas/salvator-x/salvator-x.c +++ b/board/renesas/salvator-x/salvator-x.c @@ -39,7 +39,7 @@ int board_early_init_f(void) { #if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH) /* DVFS for reset */ - mstp_clrbits_le32(MSTPSR9, SMSTPCR9, DVFS_MSTP926); + mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926); #endif return 0; } @@ -60,7 +60,7 @@ int board_init(void) setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN); /* Configure the HSUSB block */ - mstp_clrbits_le32(MSTPSR7, SMSTPCR7, HSUSB_MSTP704); + mstp_clrbits_le32(SMSTPCR7, SMSTPCR7, HSUSB_MSTP704); /* Choice USB0SEL */ clrsetbits_le32(HSUSB_REG_UGCTRL2, HSUSB_REG_UGCTRL2_USB0SEL, HSUSB_REG_UGCTRL2_USB0SEL_EHCI); diff --git a/board/renesas/ulcb/ulcb.c b/board/renesas/ulcb/ulcb.c index e549a2e..63550af 100644 --- a/board/renesas/ulcb/ulcb.c +++ b/board/renesas/ulcb/ulcb.c @@ -39,7 +39,7 @@ int board_early_init_f(void) { #if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH) /* DVFS for reset */ - mstp_clrbits_le32(MSTPSR9, SMSTPCR9, DVFS_MSTP926); + mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926); #endif return 0; } @@ -60,7 +60,7 @@ int board_init(void) setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN); /* Configure the HSUSB block */ - mstp_clrbits_le32(MSTPSR7, SMSTPCR7, HSUSB_MSTP704); + mstp_clrbits_le32(SMSTPCR7, SMSTPCR7, HSUSB_MSTP704); /* Choice USB0SEL */ clrsetbits_le32(HSUSB_REG_UGCTRL2, HSUSB_REG_UGCTRL2_USB0SEL, HSUSB_REG_UGCTRL2_USB0SEL_EHCI); From 2a1eade825149647ffbe4da5dce0883d45d3a137 Mon Sep 17 00:00:00 2001 From: Hiroyuki Yokoyama Date: Thu, 27 Sep 2018 19:05:18 +0900 Subject: [PATCH 09/11] ARM: dts: rmobile: r8a77990: Add USB2.0(EHCI) DT nodes on Ebisu Add device tree nodes for USB2.0(EHCI) on R-Car E3 Ebisu board. Signed-off-by: Hiroyuki Yokoyama --- arch/arm/dts/r8a77990-ebisu.dts | 16 +++++++++++++ arch/arm/dts/r8a77990.dtsi | 38 +++++++++++++++++++++++++++++++ include/dt-bindings/power/r8a77990-sysc.h | 20 ++++++++++++++++ 3 files changed, 74 insertions(+) create mode 100644 include/dt-bindings/power/r8a77990-sysc.h diff --git a/arch/arm/dts/r8a77990-ebisu.dts b/arch/arm/dts/r8a77990-ebisu.dts index 8b0d24b..5e3c195 100644 --- a/arch/arm/dts/r8a77990-ebisu.dts +++ b/arch/arm/dts/r8a77990-ebisu.dts @@ -65,6 +65,10 @@ }; }; +&ehci0 { + status = "okay"; +}; + &extal_clk { clock-frequency = <48000000>; }; @@ -101,6 +105,18 @@ function = "sdhi3"; power-source = <1800>; }; + + usb0_pins: usb0 { + groups = "usb0"; + function = "usb0"; + }; +}; + +&usb2_phy0 { + pinctrl-0 = <&usb0_pins>; + pinctrl-name = "default"; + + status = "okay"; }; &sdhi0 { diff --git a/arch/arm/dts/r8a77990.dtsi b/arch/arm/dts/r8a77990.dtsi index 6d2d5e1..ad20ea1 100644 --- a/arch/arm/dts/r8a77990.dtsi +++ b/arch/arm/dts/r8a77990.dtsi @@ -7,6 +7,7 @@ #include #include +#include / { compatible = "renesas,r8a77990"; @@ -165,6 +166,43 @@ resets = <&cpg 906>; }; + ohci0: usb@ee080000 { + compatible = "generic-ohci"; + reg = <0 0xee080000 0 0x100>; + interrupts = ; + clocks = <&cpg CPG_MOD 703>; + phys = <&usb2_phy0>; + phy-names = "usb"; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 703>; + status = "disabled"; + }; + + ehci0: usb@ee080100 { + compatible = "generic-ehci"; + reg = <0 0xee080100 0 0x100>; + interrupts = ; + clocks = <&cpg CPG_MOD 703>; + phys = <&usb2_phy0>; + phy-names = "usb"; + companion = <&ohci0>; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 703>; + status = "disabled"; + }; + + usb2_phy0: usb-phy@ee080200 { + compatible = "renesas,usb2-phy-r8a7790", + "renesas,rcar-gen3-usb2-phy"; + reg = <0 0xee080200 0 0x700>; + interrupts = ; + clocks = <&cpg CPG_MOD 703>; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 703>; + #phy-cells = <0>; + status = "disabled"; + }; + pfc: pin-controller@e6060000 { compatible = "renesas,pfc-r8a77990"; reg = <0 0xe6060000 0 0x508>; diff --git a/include/dt-bindings/power/r8a77990-sysc.h b/include/dt-bindings/power/r8a77990-sysc.h new file mode 100644 index 0000000..1409c73 --- /dev/null +++ b/include/dt-bindings/power/r8a77990-sysc.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2018 Renesas Electronics Corp. + */ +#ifndef __DT_BINDINGS_POWER_R8A77990_SYSC_H__ +#define __DT_BINDINGS_POWER_R8A77990_SYSC_H__ + +/* + * These power domain indices match the numbers of the interrupt bits + * representing the power areas in the various Interrupt Registers + * (e.g. SYSCISR, Interrupt Status Register) + */ + +#define R8A77990_PD_CA53_CPU0 5 +#define R8A77990_PD_CA53_SCU 21 + +/* Always-on power area */ +#define R8A77990_PD_ALWAYS_ON 32 + +#endif /* __DT_BINDINGS_POWER_R8A77990_SYSC_H__ */ From 4cc93fc2817291be222b3be6a0ee8cf5e5a2b57e Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Thu, 18 Oct 2018 20:27:16 +0200 Subject: [PATCH 10/11] ARM: dts: rmobile: Build -u-boot variants of DTs Build the -u-boot variants of the device trees so they can be included in Multi-DTB fitImage, which in turn allows us to build single U-Boot image for multiple boards. Signed-off-by: Marek Vasut --- arch/arm/dts/Makefile | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 8e6f8e9..0de6234 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -455,14 +455,14 @@ dtb-$(CONFIG_MX7) += imx7-colibri.dtb \ dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-evk.dtb dtb-$(CONFIG_RCAR_GEN3) += \ - r8a7795-h3ulcb.dtb \ - r8a7795-salvator-x.dtb \ - r8a7796-m3ulcb.dtb \ - r8a7796-salvator-x.dtb \ - r8a77965-salvator-x.dtb \ - r8a77970-eagle.dtb \ - r8a77990-ebisu.dtb \ - r8a77995-draak.dtb + r8a7795-h3ulcb-u-boot.dtb \ + r8a7795-salvator-x-u-boot.dtb \ + r8a7796-m3ulcb-u-boot.dtb \ + r8a7796-salvator-x-u-boot.dtb \ + r8a77965-salvator-x-u-boot.dtb \ + r8a77970-eagle-u-boot.dtb \ + r8a77990-ebisu-u-boot.dtb \ + r8a77995-draak-u-boot.dtb dtb-$(CONFIG_SOC_KEYSTONE) += keystone-k2hk-evm.dtb \ keystone-k2l-evm.dtb \ From bd6debbc9409c441cd7051c7bc57ad4c038a08b7 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Thu, 18 Oct 2018 20:28:19 +0200 Subject: [PATCH 11/11] ARM: rmobile: Drop PRR syscon driver The PRR syscon driver is available too late for Multi DTB build of U-Boot. Replace it with simple check whether a platform is Gen3 or not and produce an address of the PRR. Signed-off-by: Marek Vasut --- arch/arm/mach-rmobile/cpu_info-rcar.c | 61 +++++------------------------------ 1 file changed, 8 insertions(+), 53 deletions(-) diff --git a/arch/arm/mach-rmobile/cpu_info-rcar.c b/arch/arm/mach-rmobile/cpu_info-rcar.c index ccb7a32..ce9312f 100644 --- a/arch/arm/mach-rmobile/cpu_info-rcar.c +++ b/arch/arm/mach-rmobile/cpu_info-rcar.c @@ -11,7 +11,14 @@ #define R8A7796_REV_1_0 0x5200 #define R8A7796_REV_1_1 0x5210 -static u32 rmobile_get_prr(void); +static u32 rmobile_get_prr(void) +{ +#ifdef CONFIG_RCAR_GEN3 + return readl(0xFFF00044); +#else + return readl(0xFF000044); +#endif +} u32 rmobile_get_cpu_type(void) { @@ -37,55 +44,3 @@ u32 rmobile_get_cpu_rev_fraction(void) else return prr & 0x0000000F; } - -#if !CONFIG_IS_ENABLED(DM) || !CONFIG_IS_ENABLED(SYSCON) -static u32 rmobile_get_prr(void) -{ - /* - * On RCar/RMobile Gen2 and older systems, the PRR is always - * located at the address below. On newer systems, the PRR - * may be located at different address, but that information - * is obtained from DT. This code will be removed when all - * of the older systems get converted to DM and OF control. - */ - return readl(0xFF000044); -} -#else - -#include -#include -#include - -struct renesas_prr_priv { - fdt_addr_t regs; -}; - -enum { - PRR_RCAR, -}; - -static u32 rmobile_get_prr(void) -{ - struct regmap *map; - - map = syscon_get_regmap_by_driver_data(PRR_RCAR); - if (!map) { - printf("PRR regmap failed!\n"); - hang(); - } - - return readl(map->ranges[0].start); -} - -static const struct udevice_id renesas_prr_ids[] = { - { .compatible = "renesas,prr", .data = PRR_RCAR }, - { } -}; - -U_BOOT_DRIVER(renesas_prr) = { - .name = "renesas_prr", - .id = UCLASS_SYSCON, - .of_match = renesas_prr_ids, - .flags = DM_FLAG_PRE_RELOC, -}; -#endif