commit
858dbdf841
@ -0,0 +1,43 @@ |
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/dts-v1/; |
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|
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/include/ "skeleton.dtsi" |
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/include/ "serial.dtsi" |
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/include/ "rtc.dtsi" |
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|
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/ { |
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model = "Advantech SOM-6896"; |
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compatible = "advantech,som-6896", "intel,broadwell"; |
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|
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aliases { |
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spi0 = "/spi"; |
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}; |
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|
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config { |
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silent_console = <0>; |
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}; |
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|
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chosen { |
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stdout-path = "/serial"; |
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}; |
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|
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pci { |
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compatible = "pci-x86"; |
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#address-cells = <3>; |
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#size-cells = <2>; |
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u-boot,dm-pre-reloc; |
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ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000 |
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0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 |
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0x01000000 0x0 0x2000 0x2000 0 0xe000>; |
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}; |
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|
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spi { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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compatible = "intel,ich-spi"; |
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spi-flash@0 { |
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reg = <0>; |
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compatible = "winbond,w25q128", "spi-flash"; |
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memory-map = <0xff000000 0x01000000>; |
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}; |
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}; |
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}; |
@ -1,51 +0,0 @@ |
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/*
|
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* Copyright (c) 2014 Google, Inc |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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|
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#ifndef _ASM_ARCH_MRCCACHE_H |
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#define _ASM_ARCH_MRCCACHE_H |
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|
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#define MRC_DATA_ALIGN 0x1000 |
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#define MRC_DATA_SIGNATURE (('M' << 0) | ('R' << 8) | ('C' << 16) | \ |
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('D'<<24)) |
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|
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__packed struct mrc_data_container { |
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u32 signature; /* "MRCD" */ |
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u32 data_size; /* Size of the 'data' field */ |
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u32 checksum; /* IP style checksum */ |
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u32 reserved; /* For header alignment */ |
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u8 data[0]; /* Variable size, platform/run time dependent */ |
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}; |
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|
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struct fmap_entry; |
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struct udevice; |
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|
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/**
|
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* mrccache_find_current() - find the latest MRC cache record |
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* |
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* This searches the MRC cache region looking for the latest record to use |
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* for setting up SDRAM |
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* |
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* @entry: Information about the position and size of the MRC cache |
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* @return pointer to latest record, or NULL if none |
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*/ |
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struct mrc_data_container *mrccache_find_current(struct fmap_entry *entry); |
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|
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/**
|
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* mrccache_update() - update the MRC cache with a new record |
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* |
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* This writes a new record to the end of the MRC cache. If the new record is |
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* the same as the latest record then the write is skipped |
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* |
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* @sf: SPI flash to write to |
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* @entry: Position and size of MRC cache in SPI flash |
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* @cur: Record to write |
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* @return 0 if updated, -EEXIST if the record is the same as the latest |
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* record, other error if SPI write failed |
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*/ |
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int mrccache_update(struct udevice *sf, struct fmap_entry *entry, |
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struct mrc_data_container *cur); |
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|
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#endif |
@ -0,0 +1,107 @@ |
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/*
|
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* Copyright (C) 2014 Google, Inc |
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* Copyright (C) 2015 Bin Meng <bmeng.cn@gmail.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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|
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#ifndef _ASM_MRCCACHE_H |
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#define _ASM_MRCCACHE_H |
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|
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#define MRC_DATA_ALIGN 0x1000 |
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#define MRC_DATA_SIGNATURE (('M' << 0) | ('R' << 8) | \ |
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('C' << 16) | ('D'<<24)) |
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|
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#define MRC_DATA_HEADER_SIZE 32 |
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|
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struct __packed mrc_data_container { |
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u32 signature; /* "MRCD" */ |
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u32 data_size; /* Size of the 'data' field */ |
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u32 checksum; /* IP style checksum */ |
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u32 reserved; /* For header alignment */ |
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u8 data[0]; /* Variable size, platform/run time dependent */ |
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}; |
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|
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struct mrc_region { |
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u32 base; |
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u32 offset; |
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u32 length; |
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}; |
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|
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struct udevice; |
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|
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/**
|
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* mrccache_find_current() - find the latest MRC cache record |
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* |
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* This searches the MRC cache region looking for the latest record to use |
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* for setting up SDRAM |
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* |
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* @entry: Position and size of MRC cache in SPI flash |
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* @return pointer to latest record, or NULL if none |
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*/ |
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struct mrc_data_container *mrccache_find_current(struct mrc_region *entry); |
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|
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/**
|
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* mrccache_update() - update the MRC cache with a new record |
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* |
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* This writes a new record to the end of the MRC cache region. If the new |
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* record is the same as the latest record then the write is skipped |
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* |
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* @sf: SPI flash to write to |
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* @entry: Position and size of MRC cache in SPI flash |
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* @cur: Record to write |
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* @return 0 if updated, -EEXIST if the record is the same as the latest |
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* record, -EINVAL if the record is not valid, other error if SPI write failed |
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*/ |
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int mrccache_update(struct udevice *sf, struct mrc_region *entry, |
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struct mrc_data_container *cur); |
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|
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/**
|
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* mrccache_reserve() - reserve MRC data on the stack |
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* |
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* This copies MRC data pointed by gd->arch.mrc_output to a new place on the |
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* stack with length gd->arch.mrc_output_len, and updates gd->arch.mrc_output |
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* to point to the new place once the migration is done. |
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* |
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* This routine should be called by reserve_arch() before U-Boot is relocated |
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* when MRC cache is enabled. |
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* |
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* @return 0 always |
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*/ |
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int mrccache_reserve(void); |
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|
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/**
|
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* mrccache_get_region() - get MRC region on the SPI flash |
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* |
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* This gets MRC region whose offset and size are described in the device tree |
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* as a subnode to the SPI flash. If a non-NULL device pointer is supplied, |
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* this also probes the SPI flash device and returns its device pointer for |
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* the caller to use later. |
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* |
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* Be careful when calling this routine with a non-NULL device pointer: |
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* - driver model initialization must be complete |
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* - calling in the pre-relocation phase may bring some side effects during |
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* the SPI flash device probe (eg: for SPI controllers on a PCI bus, it |
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* triggers PCI bus enumeration during which insufficient memory issue |
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* might be exposed and it causes subsequent SPI flash probe fails). |
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* |
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* @devp: Returns pointer to the SPI flash device |
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* @entry: Position and size of MRC cache in SPI flash |
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* @return 0 if success, -ENOENT if SPI flash node does not exist in the |
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* device tree, -EPERM if MRC region subnode does not exist in the device |
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* tree, -EINVAL if MRC region properties format is incorrect, other error |
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* if SPI flash probe failed. |
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*/ |
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int mrccache_get_region(struct udevice **devp, struct mrc_region *entry); |
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|
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/**
|
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* mrccache_save() - save MRC data to the SPI flash |
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* |
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* This saves MRC data stored previously by gd->arch.mrc_output to a proper |
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* place within the MRC region on the SPI flash. |
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* |
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* @return 0 if saved to SPI flash successfully, other error if failed |
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*/ |
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int mrccache_save(void); |
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|
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#endif /* _ASM_MRCCACHE_H */ |
@ -0,0 +1,236 @@ |
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/*
|
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* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> |
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* |
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* Adapted from coreboot src/include/smbios.h |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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|
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#ifndef _SMBIOS_H_ |
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#define _SMBIOS_H_ |
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|
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/* SMBIOS spec version implemented */ |
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#define SMBIOS_MAJOR_VER 3 |
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#define SMBIOS_MINOR_VER 0 |
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|
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/* SMBIOS structure types */ |
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enum { |
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SMBIOS_BIOS_INFORMATION = 0, |
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SMBIOS_SYSTEM_INFORMATION = 1, |
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SMBIOS_BOARD_INFORMATION = 2, |
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SMBIOS_SYSTEM_ENCLOSURE = 3, |
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SMBIOS_PROCESSOR_INFORMATION = 4, |
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SMBIOS_CACHE_INFORMATION = 7, |
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SMBIOS_SYSTEM_SLOTS = 9, |
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SMBIOS_PHYS_MEMORY_ARRAY = 16, |
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SMBIOS_MEMORY_DEVICE = 17, |
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SMBIOS_MEMORY_ARRAY_MAPPED_ADDRESS = 19, |
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SMBIOS_SYSTEM_BOOT_INFORMATION = 32, |
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SMBIOS_END_OF_TABLE = 127 |
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}; |
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|
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#define SMBIOS_INTERMEDIATE_OFFSET 16 |
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#define SMBIOS_STRUCT_EOS_BYTES 2 |
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|
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struct __packed smbios_entry { |
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u8 anchor[4]; |
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u8 checksum; |
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u8 length; |
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u8 major_ver; |
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u8 minor_ver; |
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u16 max_struct_size; |
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u8 entry_point_rev; |
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u8 formatted_area[5]; |
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u8 intermediate_anchor[5]; |
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u8 intermediate_checksum; |
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u16 struct_table_length; |
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u32 struct_table_address; |
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u16 struct_count; |
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u8 bcd_rev; |
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}; |
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|
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/* BIOS characteristics */ |
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#define BIOS_CHARACTERISTICS_PCI_SUPPORTED (1 << 7) |
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#define BIOS_CHARACTERISTICS_UPGRADEABLE (1 << 11) |
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#define BIOS_CHARACTERISTICS_SELECTABLE_BOOT (1 << 16) |
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|
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#define BIOS_CHARACTERISTICS_EXT1_ACPI (1 << 0) |
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#define BIOS_CHARACTERISTICS_EXT2_TARGET (1 << 2) |
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|
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struct __packed smbios_type0 { |
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u8 type; |
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u8 length; |
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u16 handle; |
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u8 vendor; |
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u8 bios_ver; |
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u16 bios_start_segment; |
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u8 bios_release_date; |
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u8 bios_rom_size; |
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u64 bios_characteristics; |
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u8 bios_characteristics_ext1; |
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u8 bios_characteristics_ext2; |
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u8 bios_major_release; |
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u8 bios_minor_release; |
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u8 ec_major_release; |
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u8 ec_minor_release; |
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char eos[SMBIOS_STRUCT_EOS_BYTES]; |
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}; |
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|
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struct __packed smbios_type1 { |
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u8 type; |
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u8 length; |
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u16 handle; |
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u8 manufacturer; |
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u8 product_name; |
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u8 version; |
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u8 serial_number; |
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u8 uuid[16]; |
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u8 wakeup_type; |
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u8 sku_number; |
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u8 family; |
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char eos[SMBIOS_STRUCT_EOS_BYTES]; |
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}; |
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|
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#define SMBIOS_BOARD_FEATURE_HOSTING (1 << 0) |
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#define SMBIOS_BOARD_MOTHERBOARD 10 |
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|
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struct __packed smbios_type2 { |
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u8 type; |
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u8 length; |
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u16 handle; |
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u8 manufacturer; |
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u8 product_name; |
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u8 version; |
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u8 serial_number; |
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u8 asset_tag_number; |
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u8 feature_flags; |
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u8 chassis_location; |
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u16 chassis_handle; |
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u8 board_type; |
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char eos[SMBIOS_STRUCT_EOS_BYTES]; |
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}; |
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|
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#define SMBIOS_ENCLOSURE_DESKTOP 3 |
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#define SMBIOS_STATE_SAFE 3 |
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#define SMBIOS_SECURITY_NONE 3 |
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|
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struct __packed smbios_type3 { |
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u8 type; |
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u8 length; |
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u16 handle; |
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u8 manufacturer; |
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u8 chassis_type; |
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u8 version; |
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u8 serial_number; |
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u8 asset_tag_number; |
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u8 bootup_state; |
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u8 power_supply_state; |
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u8 thermal_state; |
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u8 security_status; |
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u32 oem_defined; |
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u8 height; |
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u8 number_of_power_cords; |
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u8 element_count; |
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u8 element_record_length; |
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char eos[SMBIOS_STRUCT_EOS_BYTES]; |
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}; |
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|
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#define SMBIOS_PROCESSOR_TYPE_CENTRAL 3 |
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#define SMBIOS_PROCESSOR_STATUS_ENABLED 1 |
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#define SMBIOS_PROCESSOR_UPGRADE_NONE 6 |
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|
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struct __packed smbios_type4 { |
||||
u8 type; |
||||
u8 length; |
||||
u16 handle; |
||||
u8 socket_designation; |
||||
u8 processor_type; |
||||
u8 processor_family; |
||||
u8 processor_manufacturer; |
||||
u32 processor_id[2]; |
||||
u8 processor_version; |
||||
u8 voltage; |
||||
u16 external_clock; |
||||
u16 max_speed; |
||||
u16 current_speed; |
||||
u8 status; |
||||
u8 processor_upgrade; |
||||
u16 l1_cache_handle; |
||||
u16 l2_cache_handle; |
||||
u16 l3_cache_handle; |
||||
u8 serial_number; |
||||
u8 asset_tag; |
||||
u8 part_number; |
||||
u8 core_count; |
||||
u8 core_enabled; |
||||
u8 thread_count; |
||||
u16 processor_characteristics; |
||||
u16 processor_family2; |
||||
u16 core_count2; |
||||
u16 core_enabled2; |
||||
u16 thread_count2; |
||||
char eos[SMBIOS_STRUCT_EOS_BYTES]; |
||||
}; |
||||
|
||||
struct __packed smbios_type32 { |
||||
u8 type; |
||||
u8 length; |
||||
u16 handle; |
||||
u8 reserved[6]; |
||||
u8 boot_status; |
||||
u8 eos[SMBIOS_STRUCT_EOS_BYTES]; |
||||
}; |
||||
|
||||
struct __packed smbios_type127 { |
||||
u8 type; |
||||
u8 length; |
||||
u16 handle; |
||||
u8 eos[SMBIOS_STRUCT_EOS_BYTES]; |
||||
}; |
||||
|
||||
struct __packed smbios_header { |
||||
u8 type; |
||||
u8 length; |
||||
u16 handle; |
||||
}; |
||||
|
||||
/**
|
||||
* fill_smbios_header() - Fill the header of an SMBIOS table |
||||
* |
||||
* This fills the header of an SMBIOS table structure. |
||||
* |
||||
* @table: start address of the structure |
||||
* @type: the type of structure |
||||
* @length: the length of the formatted area of the structure |
||||
* @handle: the structure's handle, a unique 16-bit number |
||||
*/ |
||||
static inline void fill_smbios_header(void *table, int type, |
||||
int length, int handle) |
||||
{ |
||||
struct smbios_header *header = table; |
||||
|
||||
header->type = type; |
||||
header->length = length - SMBIOS_STRUCT_EOS_BYTES; |
||||
header->handle = handle; |
||||
} |
||||
|
||||
/**
|
||||
* Function prototype to write a specific type of SMBIOS structure |
||||
* |
||||
* @addr: start address to write the structure |
||||
* @handle: the structure's handle, a unique 16-bit number |
||||
* @return: size of the structure |
||||
*/ |
||||
typedef int (*smbios_write_type)(u32 *addr, int handle); |
||||
|
||||
/**
|
||||
* write_smbios_table() - Write SMBIOS table |
||||
* |
||||
* This writes SMBIOS table at a given address. |
||||
* |
||||
* @addr: start address to write SMBIOS table |
||||
* @return: end address of SMBIOS table |
||||
*/ |
||||
u32 write_smbios_table(u32 addr); |
||||
|
||||
#endif /* _SMBIOS_H_ */ |
@ -1,65 +0,0 @@ |
||||
/*
|
||||
* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <command.h> |
||||
#include <linux/compiler.h> |
||||
#include <asm/fsp/fsp_support.h> |
||||
|
||||
DECLARE_GLOBAL_DATA_PTR; |
||||
|
||||
static char *hob_type[] = { |
||||
"reserved", |
||||
"Hand-off", |
||||
"Memory Allocation", |
||||
"Resource Descriptor", |
||||
"GUID Extension", |
||||
"Firmware Volume", |
||||
"CPU", |
||||
"Memory Pool", |
||||
"reserved", |
||||
"Firmware Volume 2", |
||||
"Load PEIM Unused", |
||||
"UEFI Capsule", |
||||
}; |
||||
|
||||
int do_hob(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
||||
{ |
||||
const struct hob_header *hdr; |
||||
uint type; |
||||
char *desc; |
||||
int i = 0; |
||||
|
||||
hdr = gd->arch.hob_list; |
||||
|
||||
printf("HOB list address: 0x%08x\n\n", (unsigned int)hdr); |
||||
|
||||
printf("No. | Address | Type | Length in Bytes\n"); |
||||
printf("----|----------|---------------------|----------------\n"); |
||||
while (!end_of_hob(hdr)) { |
||||
printf("%-3d | %08x | ", i, (unsigned int)hdr); |
||||
type = hdr->type; |
||||
if (type == HOB_TYPE_UNUSED) |
||||
desc = "*Unused*"; |
||||
else if (type == HOB_TYPE_EOH) |
||||
desc = "*END OF HOB*"; |
||||
else if (type >= 0 && type <= ARRAY_SIZE(hob_type)) |
||||
desc = hob_type[type]; |
||||
else |
||||
desc = "*Invalid Type*"; |
||||
printf("%-19s | %-15d\n", desc, hdr->len); |
||||
hdr = get_next_hob(hdr); |
||||
i++; |
||||
} |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
U_BOOT_CMD( |
||||
hob, 1, 1, do_hob, |
||||
"print Firmware Support Package (FSP) Hand-Off Block information", |
||||
"" |
||||
); |
@ -0,0 +1,37 @@ |
||||
/*
|
||||
* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <asm/e820.h> |
||||
|
||||
DECLARE_GLOBAL_DATA_PTR; |
||||
|
||||
/*
|
||||
* Install a default e820 table with 4 entries as follows: |
||||
* |
||||
* 0x000000-0x0a0000 Useable RAM |
||||
* 0x0a0000-0x100000 Reserved for ISA |
||||
* 0x100000-gd->ram_size Useable RAM |
||||
* CONFIG_PCIE_ECAM_BASE PCIe ECAM |
||||
*/ |
||||
__weak unsigned install_e820_map(unsigned max_entries, |
||||
struct e820entry *entries) |
||||
{ |
||||
entries[0].addr = 0; |
||||
entries[0].size = ISA_START_ADDRESS; |
||||
entries[0].type = E820_RAM; |
||||
entries[1].addr = ISA_START_ADDRESS; |
||||
entries[1].size = ISA_END_ADDRESS - ISA_START_ADDRESS; |
||||
entries[1].type = E820_RESERVED; |
||||
entries[2].addr = ISA_END_ADDRESS; |
||||
entries[2].size = gd->ram_size - ISA_END_ADDRESS; |
||||
entries[2].type = E820_RAM; |
||||
entries[3].addr = CONFIG_PCIE_ECAM_BASE; |
||||
entries[3].size = CONFIG_PCIE_ECAM_SIZE; |
||||
entries[3].type = E820_RESERVED; |
||||
|
||||
return 4; |
||||
} |
@ -0,0 +1,132 @@ |
||||
/*
|
||||
* Copyright (C) 2014-2015, Bin Meng <bmeng.cn@gmail.com> |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <command.h> |
||||
#include <asm/fsp/fsp_support.h> |
||||
|
||||
DECLARE_GLOBAL_DATA_PTR; |
||||
|
||||
static char *hob_type[] = { |
||||
"reserved", |
||||
"Hand-off", |
||||
"Mem Alloc", |
||||
"Res Desc", |
||||
"GUID Ext", |
||||
"FV", |
||||
"CPU", |
||||
"Mem Pool", |
||||
"reserved", |
||||
"FV2", |
||||
"Load PEIM", |
||||
"Capsule", |
||||
}; |
||||
|
||||
static int do_hdr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
||||
{ |
||||
struct fsp_header *hdr = find_fsp_header(); |
||||
u32 img_addr = hdr->img_base; |
||||
char *sign = (char *)&hdr->sign; |
||||
int i; |
||||
|
||||
printf("FSP : binary 0x%08x, header 0x%08x\n", |
||||
CONFIG_FSP_ADDR, (int)hdr); |
||||
printf("Header : sign "); |
||||
for (i = 0; i < sizeof(hdr->sign); i++) |
||||
printf("%c", *sign++); |
||||
printf(", size %d, rev %d\n", hdr->hdr_len, hdr->hdr_rev); |
||||
printf("Image : rev %d.%d, id ", |
||||
(hdr->img_rev >> 8) & 0xff, hdr->img_rev & 0xff); |
||||
for (i = 0; i < ARRAY_SIZE(hdr->img_id); i++) |
||||
printf("%c", hdr->img_id[i]); |
||||
printf(", addr 0x%08x, size %d\n", img_addr, hdr->img_size); |
||||
printf("VPD : addr 0x%08x, size %d\n", |
||||
hdr->cfg_region_off + img_addr, hdr->cfg_region_size); |
||||
printf("\nNumber of APIs Supported : %d\n", hdr->api_num); |
||||
printf("\tTempRamInit : 0x%08x\n", hdr->fsp_tempram_init + img_addr); |
||||
printf("\tFspInit : 0x%08x\n", hdr->fsp_init + img_addr); |
||||
printf("\tFspNotify : 0x%08x\n", hdr->fsp_notify + img_addr); |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
static int do_hob(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
||||
{ |
||||
const struct hob_header *hdr; |
||||
uint type; |
||||
char *desc; |
||||
int i = 0; |
||||
|
||||
hdr = gd->arch.hob_list; |
||||
|
||||
printf("HOB list address: 0x%08x\n\n", (unsigned int)hdr); |
||||
|
||||
printf("# | Address | Type | Len | "); |
||||
printf("%42s\n", "GUID"); |
||||
printf("---|----------|-----------|------|-"); |
||||
printf("------------------------------------------\n"); |
||||
while (!end_of_hob(hdr)) { |
||||
printf("%-2d | %08x | ", i, (unsigned int)hdr); |
||||
type = hdr->type; |
||||
if (type == HOB_TYPE_UNUSED) |
||||
desc = "*Unused*"; |
||||
else if (type == HOB_TYPE_EOH) |
||||
desc = "*EOH*"; |
||||
else if (type >= 0 && type <= ARRAY_SIZE(hob_type)) |
||||
desc = hob_type[type]; |
||||
else |
||||
desc = "*Invalid*"; |
||||
printf("%-9s | %-4d | ", desc, hdr->len); |
||||
|
||||
if (type == HOB_TYPE_MEM_ALLOC || type == HOB_TYPE_RES_DESC || |
||||
type == HOB_TYPE_GUID_EXT) { |
||||
struct efi_guid *guid = (struct efi_guid *)(hdr + 1); |
||||
int j; |
||||
|
||||
printf("%08x-%04x-%04x", guid->data1, |
||||
guid->data2, guid->data3); |
||||
for (j = 0; j < ARRAY_SIZE(guid->data4); j++) |
||||
printf("-%02x", guid->data4[j]); |
||||
} else { |
||||
printf("%42s", "Not Available"); |
||||
} |
||||
printf("\n"); |
||||
hdr = get_next_hob(hdr); |
||||
i++; |
||||
} |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
static cmd_tbl_t fsp_commands[] = { |
||||
U_BOOT_CMD_MKENT(hdr, 0, 1, do_hdr, "", ""), |
||||
U_BOOT_CMD_MKENT(hob, 0, 1, do_hob, "", ""), |
||||
}; |
||||
|
||||
static int do_fsp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
||||
{ |
||||
cmd_tbl_t *fsp_cmd; |
||||
int ret; |
||||
|
||||
if (argc < 2) |
||||
return CMD_RET_USAGE; |
||||
fsp_cmd = find_cmd_tbl(argv[1], fsp_commands, ARRAY_SIZE(fsp_commands)); |
||||
argc -= 2; |
||||
argv += 2; |
||||
if (!fsp_cmd || argc > fsp_cmd->maxargs) |
||||
return CMD_RET_USAGE; |
||||
|
||||
ret = fsp_cmd->cmd(fsp_cmd, flag, argc, argv); |
||||
|
||||
return cmd_process_error(fsp_cmd, ret); |
||||
} |
||||
|
||||
U_BOOT_CMD( |
||||
fsp, 2, 1, do_fsp, |
||||
"Show Intel Firmware Support Package (FSP) related information", |
||||
"hdr - Print FSP header information\n" |
||||
"fsp hob - Print FSP Hand-Off Block (HOB) information" |
||||
); |
@ -0,0 +1,269 @@ |
||||
/*
|
||||
* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> |
||||
* |
||||
* Adapted from coreboot src/arch/x86/smbios.c |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <version.h> |
||||
#include <asm/cpu.h> |
||||
#include <asm/smbios.h> |
||||
#include <asm/tables.h> |
||||
|
||||
DECLARE_GLOBAL_DATA_PTR; |
||||
|
||||
/**
|
||||
* smbios_add_string() - add a string to the string area |
||||
* |
||||
* This adds a string to the string area which is appended directly after |
||||
* the formatted portion of an SMBIOS structure. |
||||
* |
||||
* @start: string area start address |
||||
* @str: string to add |
||||
* @return: string number in the string area |
||||
*/ |
||||
static int smbios_add_string(char *start, const char *str) |
||||
{ |
||||
int i = 1; |
||||
char *p = start; |
||||
|
||||
for (;;) { |
||||
if (!*p) { |
||||
strcpy(p, str); |
||||
p += strlen(str); |
||||
*p++ = '\0'; |
||||
*p++ = '\0'; |
||||
|
||||
return i; |
||||
} |
||||
|
||||
if (!strcmp(p, str)) |
||||
return i; |
||||
|
||||
p += strlen(p) + 1; |
||||
i++; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* smbios_string_table_len() - compute the string area size |
||||
* |
||||
* This computes the size of the string area including the string terminator. |
||||
* |
||||
* @start: string area start address |
||||
* @return: string area size |
||||
*/ |
||||
static int smbios_string_table_len(char *start) |
||||
{ |
||||
char *p = start; |
||||
int i, len = 0; |
||||
|
||||
while (*p) { |
||||
i = strlen(p) + 1; |
||||
p += i; |
||||
len += i; |
||||
} |
||||
|
||||
return len + 1; |
||||
} |
||||
|
||||
static int smbios_write_type0(u32 *current, int handle) |
||||
{ |
||||
struct smbios_type0 *t = (struct smbios_type0 *)*current; |
||||
int len = sizeof(struct smbios_type0); |
||||
|
||||
memset(t, 0, sizeof(struct smbios_type0)); |
||||
fill_smbios_header(t, SMBIOS_BIOS_INFORMATION, len, handle); |
||||
t->vendor = smbios_add_string(t->eos, "U-Boot"); |
||||
t->bios_ver = smbios_add_string(t->eos, PLAIN_VERSION); |
||||
t->bios_release_date = smbios_add_string(t->eos, U_BOOT_DMI_DATE); |
||||
t->bios_rom_size = (CONFIG_ROM_SIZE / 65536) - 1; |
||||
t->bios_characteristics = BIOS_CHARACTERISTICS_PCI_SUPPORTED | |
||||
BIOS_CHARACTERISTICS_SELECTABLE_BOOT | |
||||
BIOS_CHARACTERISTICS_UPGRADEABLE; |
||||
#ifdef CONFIG_GENERATE_ACPI_TABLE |
||||
t->bios_characteristics_ext1 = BIOS_CHARACTERISTICS_EXT1_ACPI; |
||||
#endif |
||||
t->bios_characteristics_ext2 = BIOS_CHARACTERISTICS_EXT2_TARGET; |
||||
t->bios_major_release = 0xff; |
||||
t->bios_minor_release = 0xff; |
||||
t->ec_major_release = 0xff; |
||||
t->ec_minor_release = 0xff; |
||||
|
||||
len = t->length + smbios_string_table_len(t->eos); |
||||
*current += len; |
||||
|
||||
return len; |
||||
} |
||||
|
||||
static int smbios_write_type1(u32 *current, int handle) |
||||
{ |
||||
struct smbios_type1 *t = (struct smbios_type1 *)*current; |
||||
int len = sizeof(struct smbios_type1); |
||||
|
||||
memset(t, 0, sizeof(struct smbios_type1)); |
||||
fill_smbios_header(t, SMBIOS_SYSTEM_INFORMATION, len, handle); |
||||
t->manufacturer = smbios_add_string(t->eos, CONFIG_SYS_VENDOR); |
||||
t->product_name = smbios_add_string(t->eos, CONFIG_SYS_BOARD); |
||||
|
||||
len = t->length + smbios_string_table_len(t->eos); |
||||
*current += len; |
||||
|
||||
return len; |
||||
} |
||||
|
||||
static int smbios_write_type2(u32 *current, int handle) |
||||
{ |
||||
struct smbios_type2 *t = (struct smbios_type2 *)*current; |
||||
int len = sizeof(struct smbios_type2); |
||||
|
||||
memset(t, 0, sizeof(struct smbios_type2)); |
||||
fill_smbios_header(t, SMBIOS_BOARD_INFORMATION, len, handle); |
||||
t->manufacturer = smbios_add_string(t->eos, CONFIG_SYS_VENDOR); |
||||
t->product_name = smbios_add_string(t->eos, CONFIG_SYS_BOARD); |
||||
t->feature_flags = SMBIOS_BOARD_FEATURE_HOSTING; |
||||
t->board_type = SMBIOS_BOARD_MOTHERBOARD; |
||||
|
||||
len = t->length + smbios_string_table_len(t->eos); |
||||
*current += len; |
||||
|
||||
return len; |
||||
} |
||||
|
||||
static int smbios_write_type3(u32 *current, int handle) |
||||
{ |
||||
struct smbios_type3 *t = (struct smbios_type3 *)*current; |
||||
int len = sizeof(struct smbios_type3); |
||||
|
||||
memset(t, 0, sizeof(struct smbios_type3)); |
||||
fill_smbios_header(t, SMBIOS_SYSTEM_ENCLOSURE, len, handle); |
||||
t->manufacturer = smbios_add_string(t->eos, CONFIG_SYS_VENDOR); |
||||
t->chassis_type = SMBIOS_ENCLOSURE_DESKTOP; |
||||
t->bootup_state = SMBIOS_STATE_SAFE; |
||||
t->power_supply_state = SMBIOS_STATE_SAFE; |
||||
t->thermal_state = SMBIOS_STATE_SAFE; |
||||
t->security_status = SMBIOS_SECURITY_NONE; |
||||
|
||||
len = t->length + smbios_string_table_len(t->eos); |
||||
*current += len; |
||||
|
||||
return len; |
||||
} |
||||
|
||||
static int smbios_write_type4(u32 *current, int handle) |
||||
{ |
||||
struct smbios_type4 *t = (struct smbios_type4 *)*current; |
||||
int len = sizeof(struct smbios_type4); |
||||
const char *vendor; |
||||
char *name; |
||||
char processor_name[CPU_MAX_NAME_LEN]; |
||||
struct cpuid_result res; |
||||
|
||||
memset(t, 0, sizeof(struct smbios_type4)); |
||||
fill_smbios_header(t, SMBIOS_PROCESSOR_INFORMATION, len, handle); |
||||
t->processor_type = SMBIOS_PROCESSOR_TYPE_CENTRAL; |
||||
t->processor_family = gd->arch.x86; |
||||
vendor = cpu_vendor_name(gd->arch.x86_vendor); |
||||
t->processor_manufacturer = smbios_add_string(t->eos, vendor); |
||||
res = cpuid(1); |
||||
t->processor_id[0] = res.eax; |
||||
t->processor_id[1] = res.edx; |
||||
name = cpu_get_name(processor_name); |
||||
t->processor_version = smbios_add_string(t->eos, name); |
||||
t->status = SMBIOS_PROCESSOR_STATUS_ENABLED; |
||||
t->processor_upgrade = SMBIOS_PROCESSOR_UPGRADE_NONE; |
||||
t->l1_cache_handle = 0xffff; |
||||
t->l2_cache_handle = 0xffff; |
||||
t->l3_cache_handle = 0xffff; |
||||
t->processor_family2 = t->processor_family; |
||||
|
||||
len = t->length + smbios_string_table_len(t->eos); |
||||
*current += len; |
||||
|
||||
return len; |
||||
} |
||||
|
||||
static int smbios_write_type32(u32 *current, int handle) |
||||
{ |
||||
struct smbios_type32 *t = (struct smbios_type32 *)*current; |
||||
int len = sizeof(struct smbios_type32); |
||||
|
||||
memset(t, 0, sizeof(struct smbios_type32)); |
||||
fill_smbios_header(t, SMBIOS_SYSTEM_BOOT_INFORMATION, len, handle); |
||||
|
||||
*current += len; |
||||
|
||||
return len; |
||||
} |
||||
|
||||
static int smbios_write_type127(u32 *current, int handle) |
||||
{ |
||||
struct smbios_type127 *t = (struct smbios_type127 *)*current; |
||||
int len = sizeof(struct smbios_type127); |
||||
|
||||
memset(t, 0, sizeof(struct smbios_type127)); |
||||
fill_smbios_header(t, SMBIOS_END_OF_TABLE, len, handle); |
||||
|
||||
*current += len; |
||||
|
||||
return len; |
||||
} |
||||
|
||||
static smbios_write_type smbios_write_funcs[] = { |
||||
smbios_write_type0, |
||||
smbios_write_type1, |
||||
smbios_write_type2, |
||||
smbios_write_type3, |
||||
smbios_write_type4, |
||||
smbios_write_type32, |
||||
smbios_write_type127 |
||||
}; |
||||
|
||||
u32 write_smbios_table(u32 addr) |
||||
{ |
||||
struct smbios_entry *se; |
||||
u32 tables; |
||||
int len = 0; |
||||
int max_struct_size = 0; |
||||
int handle = 0; |
||||
char *istart; |
||||
int isize; |
||||
int i; |
||||
|
||||
/* 16 byte align the table address */ |
||||
addr = ALIGN(addr, 16); |
||||
|
||||
se = (struct smbios_entry *)addr; |
||||
memset(se, 0, sizeof(struct smbios_entry)); |
||||
|
||||
addr += sizeof(struct smbios_entry); |
||||
addr = ALIGN(addr, 16); |
||||
tables = addr; |
||||
|
||||
/* populate minimum required tables */ |
||||
for (i = 0; i < ARRAY_SIZE(smbios_write_funcs); i++) { |
||||
int tmp = smbios_write_funcs[i](&addr, handle++); |
||||
max_struct_size = max(max_struct_size, tmp); |
||||
len += tmp; |
||||
} |
||||
|
||||
memcpy(se->anchor, "_SM_", 4); |
||||
se->length = sizeof(struct smbios_entry); |
||||
se->major_ver = SMBIOS_MAJOR_VER; |
||||
se->minor_ver = SMBIOS_MINOR_VER; |
||||
se->max_struct_size = max_struct_size; |
||||
memcpy(se->intermediate_anchor, "_DMI_", 5); |
||||
se->struct_table_length = len; |
||||
se->struct_table_address = tables; |
||||
se->struct_count = handle; |
||||
|
||||
/* calculate checksums */ |
||||
istart = (char *)se + SMBIOS_INTERMEDIATE_OFFSET; |
||||
isize = sizeof(struct smbios_entry) - SMBIOS_INTERMEDIATE_OFFSET; |
||||
se->intermediate_checksum = table_compute_checksum(istart, isize); |
||||
se->checksum = table_compute_checksum(se, sizeof(struct smbios_entry)); |
||||
|
||||
return addr; |
||||
} |
@ -1,4 +1,5 @@ |
||||
CONFIG_PPC=y |
||||
CONFIG_4xx=y |
||||
CONFIG_TARGET_DLVISION=y |
||||
# CONFIG_CMD_ELF is not set |
||||
# CONFIG_CMD_NFS is not set |
||||
|
@ -1,4 +1,5 @@ |
||||
CONFIG_SPARC=y |
||||
CONFIG_TARGET_GR_CPCI_AX2000=y |
||||
CONFIG_SYS_TEXT_BASE=0x00000000 |
||||
# CONFIG_CMD_ELF is not set |
||||
# CONFIG_CMD_SETEXPR is not set |
||||
|
@ -1,4 +1,5 @@ |
||||
CONFIG_SPARC=y |
||||
CONFIG_TARGET_GR_EP2S60=y |
||||
CONFIG_SYS_TEXT_BASE=0x00000000 |
||||
# CONFIG_CMD_ELF is not set |
||||
# CONFIG_CMD_SETEXPR is not set |
||||
|
@ -1,4 +1,5 @@ |
||||
CONFIG_SPARC=y |
||||
CONFIG_TARGET_GR_XC3S_1500=y |
||||
CONFIG_SYS_TEXT_BASE=0x00000000 |
||||
# CONFIG_CMD_ELF is not sets |
||||
# CONFIG_CMD_SETEXPR is not set |
||||
|
@ -1,4 +1,5 @@ |
||||
CONFIG_PPC=y |
||||
CONFIG_4xx=y |
||||
CONFIG_TARGET_NEO=y |
||||
# CONFIG_CMD_ELF is not set |
||||
# CONFIG_CMD_NFS is not set |
||||
|
@ -1,19 +1,85 @@ |
||||
From VxWorks 6.9+ (not include 6.9), VxWorks starts adopting device tree as its hardware |
||||
decription mechansim (for PowerPC and ARM), thus requiring boot interface changes. |
||||
# |
||||
# Copyright (C) 2013, Miao Yan <miao.yan@windriver.com> |
||||
# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> |
||||
# |
||||
# SPDX-License-Identifier: GPL-2.0+ |
||||
# |
||||
|
||||
VxWorks Support |
||||
=============== |
||||
|
||||
This document describes the information about U-Boot loading VxWorks kernel. |
||||
|
||||
Status |
||||
------ |
||||
U-Boot supports loading VxWorks kernels via 'bootvx' and 'bootm' commands. |
||||
For booting old kernels (6.9.x) on PowerPC and ARM, and all kernel versions |
||||
on other architectures, 'bootvx' shall be used. For booting VxWorks 7 kernels |
||||
on PowerPC and ARM, 'bootm' shall be used. |
||||
|
||||
64-bit x86 kernel cannot be loaded as of today. |
||||
|
||||
VxWork 7 on PowerPC and ARM |
||||
--------------------------- |
||||
From VxWorks 7, VxWorks starts adopting device tree as its hardware decription |
||||
mechansim (for PowerPC and ARM), thus requiring boot interface changes. |
||||
This section will describe the new interface. |
||||
|
||||
For PowerPC, the calling convention of the new VxWorks entry point conforms to the ePAPR standard, |
||||
which is shown below (see ePAPR for more details): |
||||
For PowerPC, the calling convention of the new VxWorks entry point conforms to |
||||
the ePAPR standard, which is shown below (see ePAPR for more details): |
||||
|
||||
void (*kernel_entry)(fdt_addr, |
||||
0, 0, EPAPR_MAGIC, boot_IMA, 0, 0) |
||||
void (*kernel_entry)(fdt_addr, 0, 0, EPAPR_MAGIC, boot_IMA, 0, 0) |
||||
|
||||
For ARM, the calling convention is show below: |
||||
|
||||
void (*kernel_entry)(void *fdt_addr) |
||||
|
||||
When booting new VxWorks kernel (uImage format), the parameters passed to bootm is like below: |
||||
When booting new VxWorks kernel (uImage format), the parameters passed to bootm |
||||
is like below: |
||||
|
||||
bootm <kernel image address> - <device tree address> |
||||
|
||||
The do_bootvx command still works as it was for older VxWorks kernels. |
||||
VxWorks bootline |
||||
---------------- |
||||
When using 'bootvx', the kernel bootline must be prepared by U-Boot at a |
||||
board-specific address before loading VxWorks. U-Boot supplies its address |
||||
via "bootaddr" environment variable. To check where the bootline should be |
||||
for a specific board, go to the VxWorks BSP for that board, and look for a |
||||
parameter called BOOT_LINE_ADRS. Assign its value to "bootaddr". A typical |
||||
value for "bootaddr" is 0x101200. |
||||
|
||||
If a "bootargs" variable is defined, its content will be copied to the memory |
||||
location pointed by "bootaddr" as the kernel bootline. If "bootargs" is not |
||||
there, command 'bootvx' can construct a valid bootline using the following |
||||
environments variables: bootdev, bootfile, ipaddr, netmask, serverip, |
||||
gatewayip, hostname, othbootargs. |
||||
|
||||
When using 'bootm', just define "bootargs" in the environment and U-Boot will |
||||
handle bootline fix up for the kernel dtb automatically. |
||||
|
||||
Serial console |
||||
-------------- |
||||
It's very common that VxWorks BSPs configure a different baud rate for the |
||||
serial console from what is being used by U-Boot. For example, VxWorks tends |
||||
to use 9600 as the default baud rate on all x86 BSPs while U-Boot uses 115200. |
||||
Please configure both U-Boot and VxWorks to use the same baud rate, or it may |
||||
look like VxWorks hangs somewhere as nothing outputs on the serial console. |
||||
|
||||
x86-specific information |
||||
------------------------ |
||||
Before loading an x86 kernel, two additional environment variables need to be |
||||
provided. They are "e820data" and "e820info", which represent the address of |
||||
E820 table and E820 information (defined by VxWorks) in system memory. |
||||
|
||||
Check VxWorks kernel configuration to look for BIOS_E820_DATA_START and |
||||
BIOS_E820_INFO_START, and assign their values to "e820data" and "e820info" |
||||
accordingly. If neither of these two are supplied, U-Boot assumes a default |
||||
location at 0x4000 for "e820data" and 0x4a00 for "e820info". Typical values |
||||
for "e820data" and "e820info" are 0x104000 and 0x104a00. But there is one |
||||
exception on Intel Galileo, where "e820data" and "e820info" should be left |
||||
unset, which assume the default location for VxWorks. |
||||
|
||||
Note since currently U-Boot does not support ACPI yet, VxWorks kernel must |
||||
be configured to use MP table and virtual wire interrupt mode. This requires |
||||
INCLUDE_MPTABLE_BOOT_OP and INCLUDE_VIRTUAL_WIRE_MODE to be included in a |
||||
VxWorks kernel configuration. |
||||
|
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