imx: imx7d: remove CamelCase from ENET_xMHz macros

Update these macros to use all upper-case to avoid checkpatch
warnings:

	ENET_25MHz,
	ENET_50MHz,
	ENET_125MHz,

Signed-off-by: Eric Nelson <eric@nelint.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
master
Eric Nelson 7 years ago committed by Stefano Babic
parent e203dcf23e
commit 8590786acf
  1. 6
      arch/arm/include/asm/arch-mx7/clock.h
  2. 6
      arch/arm/mach-imx/mx7/clock.c
  3. 2
      board/freescale/mx7dsabresd/mx7dsabresd.c
  4. 2
      board/technexion/pico-imx7d/pico-imx7d.c
  5. 2
      board/toradex/colibri_imx7/colibri_imx7.c

@ -318,9 +318,9 @@ struct clk_root_map {
};
enum enet_freq {
ENET_25MHz,
ENET_50MHz,
ENET_125MHz,
ENET_25MHZ,
ENET_50MHZ,
ENET_125MHZ,
};
u32 get_root_clk(enum clk_root_index clock_id);

@ -966,15 +966,15 @@ int set_clk_enet(enum enet_freq type)
clock_enable(CCGR_ENET2, 0);
switch (type) {
case ENET_125MHz:
case ENET_125MHZ:
enet1_ref = ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK;
enet2_ref = ENET2_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK;
break;
case ENET_50MHz:
case ENET_50MHZ:
enet1_ref = ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_50M_CLK;
enet2_ref = ENET2_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_50M_CLK;
break;
case ENET_25MHz:
case ENET_25MHZ:
enet1_ref = ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_25M_CLK;
enet2_ref = ENET2_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_25M_CLK;
break;

@ -260,7 +260,7 @@ static int setup_fec(void)
(IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_MASK |
IOMUXC_GPR_GPR1_GPR_ENET1_CLK_DIR_MASK), 0);
return set_clk_enet(ENET_125MHz);
return set_clk_enet(ENET_125MHZ);
}

@ -182,7 +182,7 @@ static int setup_fec(void)
(IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_MASK |
IOMUXC_GPR_GPR1_GPR_ENET1_CLK_DIR_MASK), 0);
return set_clk_enet(ENET_125MHz);
return set_clk_enet(ENET_125MHZ);
}
int board_phy_config(struct phy_device *phydev)

@ -280,7 +280,7 @@ static int setup_fec(void)
IOMUXC_GPR_GPR1_GPR_ENET1_TX_CLK_SEL_MASK);
#endif
return set_clk_enet(ENET_50MHz);
return set_clk_enet(ENET_50MHZ);
}
int board_phy_config(struct phy_device *phydev)

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